Patents Represented by Attorney, Agent or Law Firm Gary D. Clapp
  • Patent number: 6446129
    Abstract: A method and mechanism for function value synchronization among protocols in a shared resource unit providing shared resources to a plurality of resource users submitting requests for shared resource operations in a plurality of protocols wherein each request includes at least one primary function value and at least one associated function value. A database is constructed having a values entry for each primary value wherein each values entry contains a primary field for storing the corresponding primary value and an associated field for storing an associated value for each protocol. Unknown associated values are represented by sentinel values, and the sentinel values representing associated values are replaced by the appropriate associated values obtained from a system administrative function that maps the primary and associated values of the protocols.
    Type: Grant
    Filed: June 25, 2001
    Date of Patent: September 3, 2002
    Assignee: EMC Corporation
    Inventors: Miles A. DeForest, Mark A. O'Connell
  • Patent number: 6418800
    Abstract: A modular automated diagnostic analyzer having a fluid entry module for sample aspiration, a valve module for selecting fluids and a pump module for fluidic movement, so that a biological sample does not come into contact with the valve system through which calibrants and air are introduced to the fluid path. The fluid entry module encloses an aspiration tube rotatably and slidably engaged with the analysis mechanism chassis to move to different positions for the introduction of calibration and cleaning fluids and the aspiration of fluids into the analysis apparatus from different types of sample containers. A wiping seal removes residues of aspirated fluids from the exterior surfaces of the aspiration tube with the residue being aspirated into the analysis apparatus for disposal. Sensor modules mounted in a sensor chamber are structured to mechanically stack and interlock and each sensor module includes a fluid tight sealed passage and a sensor element.
    Type: Grant
    Filed: September 15, 2000
    Date of Patent: July 16, 2002
    Assignee: Medica Corporation
    Inventors: Vijay Mathur, Tyler Cote, Ronald Jones, Jane Sun, Steve Rettew, Chen Yi, Tony Mao, Will Whelan, Ken Galano, Richard Dussault
  • Patent number: 6374266
    Abstract: A method for storing data from a data source in a storage device of a data repository by reading all source allocation units, restructuring the data into data units having a size corresponding to the repository allocation units, and generating a hash value for the data of each data unit read from the data source. For each data unit, a data table is searched for a table entry having a matching hash value wherein each table entry contains the hash value of a data unit stored in a repository allocation unit and a repository allocation unit pointer to the corresponding repository allocation unit. When the hash value of a data unit does not match any hash value of any table entry in the data table, the data of the data unit is written into a newly allocated repository allocation unit a new table entry is written to the data table.
    Type: Grant
    Filed: July 24, 1999
    Date of Patent: April 16, 2002
    Inventor: Ralph Shnelvar
  • Patent number: 6295587
    Abstract: An improved method and apparatus for providing access between the processors and the mass storage devices of a computer system wherein an interprocessor bus interconnects the processors and adapters are connected from the interprocessor bus for communication between the processors and the mass storage devices and the system includes binding utility for communicating with the processors and the adapters to generate pairings between the processors and the adapters. A switch is connected between the adapters and the mass storage devices for connecting each adapter to each mass storage device and a binding mapper operates with the binding utility at each binding of a processor/adapter pair to enumerate the mass storage devices with which a processor/adapter pair is to communicate and determines a mass storage identifier by which the processor identifies the mass storage device. An address mapper references the binding mapper to construct and store an address map having processor set for each mass storage device.
    Type: Grant
    Filed: September 3, 1999
    Date of Patent: September 25, 2001
    Assignee: EMC Corporation
    Inventors: Brian James Martin, George Garfield Peters, Michael Scott Ryan
  • Patent number: 6293162
    Abstract: A modular automated diagnostic analyzer having a fluid entry module for sample aspiration, a valve module for selecting fluids and a pump module for fluidic movement, so that a biological sample does not come into contact with the valve system through which calibrants and air are introduced to the fluid path. The fluid entry module encloses an aspiration tube rotatably and slidably engaged with the analysis mechanism chassis to move to different positions for the introduction of calibration and cleaning fluids and the aspiration of fluids into the analysis apparatus from different tpes of sample containers. A wiping seal removes residues of aspirated fluids from the exterior surfaces of the aspiration tube with the residue being aspirated into the analysis apparatus for disposal. Sensor modules mounted in a sensor chamber are structured to mechanically stack and interlock and each sensor module includes a fluid tight sealed passage and a sensor element.
    Type: Grant
    Filed: July 8, 1999
    Date of Patent: September 25, 2001
    Assignee: Medica Corporation
    Inventors: Vijay Mathur, Tyler Cote, Ronald Jones, Jane Sun, Steve Rettew, Chen Yi, Tony Mao, Will Whelan, Ken Galano, Richard Dussault
  • Patent number: 6289751
    Abstract: A modular automated diagnostic analyzer having a fluid entry module for sample aspiration, a valve module for selecting fluids and a pump module for fluidic movement. so that a biological sample does not come into contact with the valve system through which calibrants and air are introduced to the fluid path. The fluid entry module encloses an aspiration tube rotatably and slidably engaged with the analysis mechanism chassis to move to different positions for the introduction of calibration and cleaning fluids and the aspiration of fluids into the analysis apparatus from different types of sample containers. A wiping seal removes residues of aspirated fluids from the exterior surfaces of the aspiration tube with the residue being aspirated into the analysis apparatus for disposal. Sensor modules mounted in a sensor chamber are structured to mechanically stack and interlock and each sensor module includes a fluid tight sealed passage and a sensor element.
    Type: Grant
    Filed: July 8, 1999
    Date of Patent: September 18, 2001
    Assignee: Medica Corporation
    Inventors: Vijay Mathur, Tyler Cote, Ronald Jones, Jane Sun, Steve Rettew, Chen Yi, Tony Mao, Will Whelan, Ken Galano, Richard Dussault
  • Patent number: 6275860
    Abstract: A method and mechanism for function value synchronization among protocols in a shared resource unit providing shared resources to a plurality of resource users submitting requests for shared resource operations in a plurality of protocols wherein each request includes at least one primary function value and at least one associated function value. A database is constructed having a values entry for each primary value wherein each values entry contains a primary field for storing the corresponding primary value and an associated field for storing an associated value for each protocol. Unknown associated values are represented by sentinel values, and the sentinel values representing associated values are replaced by the appropriate associated values obtained from a system administrative function that maps the primary and associated values of the protocols.
    Type: Grant
    Filed: September 9, 1999
    Date of Patent: August 14, 2001
    Assignee: EMC Corporation
    Inventors: Miles A. DeForest, Mark A. O'Connell
  • Patent number: 6175247
    Abstract: A context switching logic cell with public and context private data sharing for use in a context switching system. A context switching logic cell includes a programmable logic unit using configuration bits for implementing programmable logic functions for each context, a context memory for storing and providing results of context dependent logic operations, and carry logic. The context memory includes private registers, public registers and an active register. Each private register corresponds to a context and is addressable only within the corresponding context while public registers are addressable within all contexts and the active register stores results of logic operations for the current context. A context switching logic cell may include a data memory that is accessible within all contexts. The context switching logic cells may be arranged into a context switching logic array for use in a context switching system by level 1 buses and carry bit lines.
    Type: Grant
    Filed: April 9, 1999
    Date of Patent: January 16, 2001
    Assignee: Lockheed Martin Corporation
    Inventors: Stephen M. Scalera, Jose R. Vazquez
  • Patent number: 6038595
    Abstract: A network service device and a system or computer system for providing network based services in an area defined by a wireless local area network. The system includes a local area server having at least one network link to at least one network server and supporting a local area wireless network communicating with one or more network service devices wherein a network service device is tailored to provide specific network based services. Each network service device includes a processor and a program memory and a transceiver for local area communications of data between a network services device and the local area server. A local area server includes a processor and a program memory for executing local area server programs, a transceiver for providing local area communications and a modem connected to the network and at least one network server.
    Type: Grant
    Filed: March 2, 1998
    Date of Patent: March 14, 2000
    Assignee: EMC Corporation
    Inventor: Felix Sebastian Ortony
  • Patent number: 6006029
    Abstract: The emulation of a first system disk drive on a second processing system including a second system user level process including first system user and executive tasks issuing disk input/output requests. An emulator level is interposed between the second system user level process and a kernel level and includes a pseudo device driver corresponding to the first system disk drive and the kernel level includes a kernel process corresponding to the pseudo device driver and emulating the disk drive. The pseudo device driver and the kernel process execute in a second system process to emulate the operations of the disk drive and the kernel process emulating the disk drive is a file input/output process. The pseudo device driver includes a pseudo device queue, a return queue and a queue manager responsive to first system disk input/output instructions and to completed disk operations.
    Type: Grant
    Filed: September 28, 1993
    Date of Patent: December 21, 1999
    Assignee: Bull HN Information Systems Inc.
    Inventors: Richard S. Bianchi, Marcia T. Fogelgren, Mathew J. Kubik
  • Patent number: 5991441
    Abstract: A handwritten character recognizer having an input cluster buffer and a point buffer with dynamic and static stroke feature extraction and segment analysis by conical boundaries for identification of stroke segments dynamic stroke feature extractor static stroke feature extractor. A stroke recognizer compares single copies of idealized stroke representations with hierarchically approximated multiple scaled topological representations of a current stroke, followed by stroke proportion discrimination comparing a selected topological representation of the current stroke with boundaries defined by linear combinations of features of direct and reversed ideal stroke prototypes to provide a stroke identification. A cluster recognizer maintains a time ordered current stroke buffer and previous stroke buffer and constructs a per stroke area of influence list. The time ordered buffers are scanned to generate a spatially ordered window buffer.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: November 23, 1999
    Assignee: Wang Laboratories, Inc.
    Inventor: Alexander N. Jourjine
  • Patent number: 5983012
    Abstract: An emulator executes on a second data processing system as a second system user level process including a first system user level program, a first system executive program, and first system user and executive tasks. An emulator level is interposed between the second system user level process and a kernel level and contains pseudo device drivers. Each pseudo device driver corresponds to a first system input/output device. The kernel level includes kernel processes, each kernel process corresponding to a pseudo device driver. The second system hardware platform includes a plurality of second system input/output devices, wherein each second system input output device corresponds to a kernel process. Each combination of a pseudo device driver, a corresponding kernel process and a corresponding second system input/output device executes in a second system process and emulates the operations of a corresponding first system input/output task and the corresponding first system input/output device.
    Type: Grant
    Filed: September 28, 1993
    Date of Patent: November 9, 1999
    Assignee: Bull HN Information Systems Inc.
    Inventors: Richard S. Bianchi, Dennis R. Flynn, Marcia T. Fogelgren, Richard A. Lemay, Mary E. Tovell, William E. Woods
  • Patent number: 5970170
    Abstract: A handwritten character recognition system that includes a document scanner for generating scanned images of a previously created document containing handwritten characters, and a pen and digitizing tablet for real time entry of handwritten characters by a user. The handwritten character recognition system includes an image processor connected from the document scanner for receiving the scanned image of a previously created document and generating one or more ordered cluster arrays. The ordered cluster arrays contain spatially ordered coordinate arrays of skeletal image arcs representing and corresponding to the strokes of the handwritten characters wherein the spatial order represents an induced time ordered sequence of creation of the strokes of the handwritten characters that emulates the sequence of creation of the character strokes.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: October 19, 1999
    Assignee: Kodak Limited
    Inventors: A. Julie Kadashevich, Mary F. Harvey, Kenneth C. Knowlton, Alexander N. Jourjine
  • Patent number: 5940624
    Abstract: An first apparatus for searching a collection of words based upon an input word, the first apparatus including means for generating a first set of words containing members that are lexically related to the input word, the first set of words including words that are other than regular inflectional nouns; and a search engine for searching the collection of words to detect the occurrence of any of the words from a group of search words, the group of search words comprising the input word and the first set of words.
    Type: Grant
    Filed: September 26, 1994
    Date of Patent: August 17, 1999
    Assignee: Wang Laboratories, Inc.
    Inventors: A. Julie Kadashevich, Mary F. Harvey, Cheryl Clark
  • Patent number: 5920870
    Abstract: A multi-layer abstraction bucket mechanism connected between applications programs and at least one data source and providing to the users transformations of data and the results of processes performed on the data. The multi-layer abstraction bucket mechanism includes hierarchically connected abstraction layers, each including a methods object for storing methods for performing operations on data received from a data bucket of a hierarchically next lower abstraction layer, a data operation object for selecting a method to be executed by the method object, a data bucket for storing the results of an executed method, and a map for storing information for constructing the data bucket and for relating requests to methods residing in the methods object. The mechanism includes a data extraction layer and an abstraction layer. At least one abstraction layer is a data transformation layer while others include a data processing layer and a rules transformation layer for performing the rule based decision operations.
    Type: Grant
    Filed: August 18, 1997
    Date of Patent: July 6, 1999
    Assignee: Wang Laboratories, Inc.
    Inventors: Roy A. Briscoe, Robert J. Burke, Thomas E. Hanson, Paul Holland, John M. Moriarty
  • Patent number: 5878248
    Abstract: A device access controller residing in a first computer system for transferring virtual inputs and outputs representing operations of the first system between the first system and a second system. The device access controller includes a video controller for performing video display operations, a video memory for storing video data representing operations of the first system, a network controller for transferring information between the first system and the second system, a controller processor, and a device access controller bus interconnecting the video controller, the network controller and the processor.
    Type: Grant
    Filed: June 11, 1996
    Date of Patent: March 2, 1999
    Assignee: Data General Corporation
    Inventors: Michael Tehranian, Brian Martin, Michael Giancioppo, Jonathan Shapiro, Sheldon P. Gringorten, Paul D. Linton
  • Patent number: 5860139
    Abstract: A BIOS address decoder for addressing an extended BIOS memory for storing additional microprograms in a computer system. A system component is connected from the bus for receiving program instruction addresses in a first address range and providing corresponding BIOS memory addresses in a corresponding first BIOS address range. The BIOS address decoder includes the system component to receive a first subset of bus address bits representing bus addresses in the first instruction address range and responsive to the first subset of bus address bits to generate corresponding BIOS addresses in the first BIOS address range and a BIOS address indication indicating that the first subset of bus address bits indicates a bus address in the first instruction address range.
    Type: Grant
    Filed: June 11, 1996
    Date of Patent: January 12, 1999
    Assignee: Data General Corporation
    Inventor: Brian Martin
  • Patent number: 5845094
    Abstract: A support facility for installation of interprocessor unit cabling interconnecting the processor units of a multiple processor unit system in a first network, including a second system for directing the cabling interconnections of the first system and, in each processor unit of the first system, a device access controller connected through a second network to a second system, each device access controller including a memory for storing a unique identifier, and a network controller to interconnect to a network controller of at least one other processor unit. There is a selectably settable anchor bit indicator to indicate a processor unit selected as a first processor unit of the first network, a next connection indicator connected from the device access controller, and connected from the network controller, a transmit test indicator connected from the device access controller and a receive indicator connected from the device access controller.
    Type: Grant
    Filed: June 11, 1996
    Date of Patent: December 1, 1998
    Assignee: Data General Corporation
    Inventors: Robert Beauchamp, Brian Martin, Brian Milas, Brian Gruttadauria, Michael Tehranian
  • Patent number: 5809256
    Abstract: A soft power switch for insertion and removal of a logic unit in a system during continuing operation of the system, including a current switch for each supply voltage to the logic unit that is to be protected, each current switch having a current input connected from a corresponding system power source and a current output connected to the logic unit. The switch includes a gate drive delay connected to each current switch that provides a gate signal controlling the flow of current through each current switch, and a connector having staggered connector pins for sequenced connection of power and control signals as the logic unit is inserted or withdrawn, the soft switch responding to the sequence of control and power signals by controllably and gradually increasing or decreasing the current through the current switches as the logic unit is inserted or withdrawn.
    Type: Grant
    Filed: June 11, 1996
    Date of Patent: September 15, 1998
    Assignee: Data General Corporation
    Inventor: Daniel Dennis Najemy
  • Patent number: 5805811
    Abstract: An electronic mail facility for dynamically adding a direct electronic mail capability to applications programs in a computer system having an integrated operating environment and connected to a plurality of electronic mail systems and including mail modules providing a drivers and interfaces to the mail systems, an administrative module, a user interface and a data interface. The administrative module includes a mail system manger including a mail system detector for detecting each of the mail systems and a mail system table for selecting and enabling a current one of the electronic mail modules and an application program manager for detecting the invocation of an application program to be supported by the electronic mail facility. The user interface includes user interface modifiers, each including a user interface representation of an electronic mail operation and an electronic mail procedure, including resources, scripts and macros, and drag and drop icons.
    Type: Grant
    Filed: March 6, 1996
    Date of Patent: September 8, 1998
    Assignee: Wang Laboratories, Inc.
    Inventors: John M. Pratt, Garry W. Sager