Patents Represented by Attorney Gary S. Flehr Hohbach Test Albritton & Herbert LLP Williams
  • Patent number: 5740433
    Abstract: A local computer system has a local database, application programs that modify the database and a transaction manager that stores audit records in a local audit trail reflecting the application programs' modifications to the local database. A remote computer system has a backup database. A remote data duplication facility (RDF) is distributed in the local computer system and the remote computer for maintaining synchronization of the backup database with the local database. The RDF has an extractor process and a receiver process. The extractor process has multiple updater processes, extracts audit records from the local audit trail and transmits them to the receiver process, which distributes them to the updater processes which in tuna initiate redo operations of database modifications in at least a subset of the audit records against the backup database.
    Type: Grant
    Filed: August 28, 1996
    Date of Patent: April 14, 1998
    Assignee: Tandem Computers, Inc.
    Inventors: Richard W. Carr, Brian Garrard, Malcolm Mosher, Jr.
  • Patent number: 5740441
    Abstract: A program interpreter for computer programs written in a bytecode language, which uses a restricted set of data type specific bytecodes. The interpreter, prior to executing any bytecode program, executes a bytecode program verifier procedure that verifies the integrity of a specified program by identifying any bytecode instruction that would process data of the wrong type for such a bytecode and any bytecode instruction sequences in the specified program that would cause underflow or overflow of the operand stack. If the program verifier finds any instructions that violate predefined stack usage and data type usage restrictions, execution of the program by the interpreter is prevented. After pre-processing of the program by the verifier, if no program faults were found, the interpreter executes the program without performing operand stack overflow and underflow checks and without performing data type checks on operands stored in operand stack. As a result, program execution speed is greatly improved.
    Type: Grant
    Filed: December 20, 1995
    Date of Patent: April 14, 1998
    Assignee: Sun Microsystems, Inc.
    Inventors: Frank Yellin, James A. Gosling
  • Patent number: 5734905
    Abstract: A computer system having an object oriented operating system utilizes a user interface that includes a display and user command input apparatus. Objects data structures are stored in the computer system's memory, each object having an associated image that can be displayed, and an assigned object type. Furthermore, each object can access a corresponding communication interface for the purpose of exchanging messages with other objects. The computer system's user enables a user to select a first object to be used as a transformer object and to select a second object as a transformee object. Once the transformer and transformee objects have been selected, the communication interfaces of the transformer and transformee objects exchange messages so as to determine, based on the object types of the transformer and transformee objects, a transformation action to be performed on the transformee object, and then the transformation action is performed so as to produce a transformed object.
    Type: Grant
    Filed: April 11, 1995
    Date of Patent: March 31, 1998
    Assignee: Board of Trustees of the Leland Stanford Junior University
    Inventor: Daniel V. Oppenheim
  • Patent number: 5729551
    Abstract: The present invention is a space efficient redundant column decoder circuit for use in a non-volatile memory device. The redundant column decoder compares a n-bit stored defective address with a n-bit presented address. Based on this comparison, an output signal is generated. This output signal is used both to specify the redundant column (or set of columns) associated with the redundant column decoder circuit, and to de-activate all of the other column decoders in the device. The redundant column decoder has a pull-up path and a parallel combination of n pairs of complementary pull-down paths. The pull-up path is connected to the pull-down paths at an output node, and the output signal is taken at this output node. Each pair of complementary pull-down paths has a first pull-down path and a second pull-down path. The first pull down path has a first non-volatile memory cell in series with and connected to a first address transistor. The first address transistor is also connected to the output node.
    Type: Grant
    Filed: December 17, 1996
    Date of Patent: March 17, 1998
    Assignee: Integrated Silicon Solution, Inc.
    Inventors: Eung Joon Park, Hsi-Hsien Hung
  • Patent number: 5727147
    Abstract: When an interpreter on a client computer encounters a symbolic reference to a remotely stored method while interpreting a locally stored method, and the object class for the remotely stored method has not previously been loaded, the client computer, the client computer creates an application specific loader that is then used to load the remotely stored method into the client computer. The application specific class loader contains location information associated with the server computer on which the remotely stored method is stored, and also contains methods for loading onto the client computer the object class for the remotely stored method as well as the object classes for any additional methods referenced by that method. The application specific class loader preferably also includes symbol table for storing information about method references that have been resolved by the application specific class loader.
    Type: Grant
    Filed: December 8, 1995
    Date of Patent: March 10, 1998
    Assignee: Sun Microsystems, Inc.
    Inventor: Arthur A. van Hoff
  • Patent number: 5727214
    Abstract: An event dispatching subsystem pre-processes event messages received by an event driven main system having a context consisting of a defined set of major and minor state variables each having a defined range of values. The event dispatching subsystem defines a set of ports, and bands within each port, where each distinct type of event message that can be received is assigned to a respective one of the ports and bands. The messages in each band are stored in a FIFO queue until the messages in the band are processed. Each band has an assigned priority, which imposes a processing priority order on the messages stored in the various bands, and a band status value. An event dispatcher considers one event message at a time, where the event message to be considered is selected in accordance with the priority values of those bands, if any, having a band status value indicating that processing of events messages stored in the band is enabled.
    Type: Grant
    Filed: August 26, 1996
    Date of Patent: March 10, 1998
    Assignee: Metasphere, Inc.
    Inventor: Arthur D. Allen
  • Patent number: 5717403
    Abstract: A method and apparatus for synthesizing a stable reference signal of a desired frequency within a spread spectrum receiver is disclosed herein. The spread spectrum receiver is designed for use in conjunction with a global positioning system (GPS) receiver, and operates to receive broadcast differential GPS correction information. The present frequency synthesis technique contemplates generating a sequence of timing signals within the GPS receiver on the basis of GPS satellite signals received thereby, and providing the timing signals to the signal receiver. Within the signal receiver, the signal cycles of a local oscillator occurring between ones of the timing signals are counted. The frequency of the local oscillator is then determined by dividing the counted cycles of the local oscillator by one of the known time intervals. The determined frequency of output signals produced by the local oscillator is then scaled so as necessary to produce the reference signal of desired frequency.
    Type: Grant
    Filed: September 6, 1995
    Date of Patent: February 10, 1998
    Assignee: Litton Consulting Group, Inc.
    Inventors: Frederick Nelson, Richard Kai-Tuen Woo, Ronald R. Hatch
  • Patent number: 5717362
    Abstract: An array oscillator circuit is disclosed herein. The array oscillator circuit includes a plurality of ring oscillators, each ring oscillator having a plurality of buffer stages for generating output signals on a like plurality of oscillator output ports. Interconnections are provided between each of the plurality of ring oscillators and at least one other of the plurality of ring oscillators such that the plurality of ring oscillators oscillate at identical frequencies and such that the output signals on the each ring oscillator's plurality of oscillator output ports have a phase offset from the signals generated on corresponding ones of the other ring oscillator's oscillator output ports. A multiplexer provides an electrical connection to a selected one of the plurality of oscillator output ports of the plurality of ring oscillators.
    Type: Grant
    Filed: December 11, 1995
    Date of Patent: February 10, 1998
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: John George Maneatis, Mark Alan Horowitz
  • Patent number: 5713018
    Abstract: A distributed computer system has an information server and a plurality of client computers coupled by one or more communication paths to the information server. The information server includes a database management system (DBMS) with an interface procedure for receiving and responding to SQL statements from client computers. At least one client computer has a database access procedure for sending SQL statements to the DBMS in the information server. The database access procedure includes embedded encrypted SQL statements, representing a predefined subset of a predefined full set of SQL statements recognized as legal SQL statements by the DBMS. For instance, the predefined subset of SQL statement might include only SQL statements for reading data in the DBMS, but not include SQL statements for modifying and adding data to the DBMS. Each of the SQL statements sent by the database access procedure to the DBMS includes a corresponding one of the encrypted SQL statements.
    Type: Grant
    Filed: September 27, 1995
    Date of Patent: January 27, 1998
    Assignee: Sun Microsystems, Inc.
    Inventor: Patrick P. Chan
  • Patent number: 5710891
    Abstract: The present invention provides a scalable, modular and pipelined distributed bus arbitration system for efficiently resolving bus contention between sub-systems, e.g., processors, coupled to a common system bus. The arbitration system includes a plurality of distributed bus arbiters which receives the bus requests from the sub-systems and independently determine the next bus master. The arbitration protocol enables the arbitration process to be eliminated from the critical timing path thereby allowing the system to operate at the maximum system clock frequency possible for a given integrated circuit (IC) technology to reduce overall system clock latencies. Any change among the sub-systems during an arbitration clock cycle is based on any system bus request(s) which are active during a clock cycle immediately preceding the arbitration clock cycle, and is independent of any system bus request(s) asserted during the arbitration clock cycle. In addition, the arbitration protocol treats a current bus master, i.e.
    Type: Grant
    Filed: March 31, 1995
    Date of Patent: January 20, 1998
    Assignee: Sun Microsystems, Inc.
    Inventors: Kevin B. Normoyle, Zahir Ebrahim, Satyanarayana Nishtala, William C. Van Loo, Louis F. Coffin, III
  • Patent number: 5706515
    Abstract: In a computer system having a data processing unit, memory, and a multitasking operating system that supports multiple threads of execution in a shared address space, a resource allocation subsystem includes an initialization procedure for initializing monitors, a notify procedure and a wait procedure. Each monitor has an associated event data structure denoting the status of the monitor as Signaled or Unsignaled. Each monitor also stores a waiters value indicating how many threads are waiting on the monitor, a tickets value indicating how many of the threads are to receive notifications, and an epoch counter value. The notify procedure updates any specified monitor to the Signaled status, updates the specified monitor's tickets value to indicate how many waiting threads are to receive notifications, and updates the epoch counter to indicate an epoch value associated with the updating of the specified monitor's status to Signaled.
    Type: Grant
    Filed: March 25, 1996
    Date of Patent: January 6, 1998
    Assignee: Sun Microsystems, Inc.
    Inventors: David W. Connelly, Patrick P. Chan
  • Patent number: 5703313
    Abstract: A music synthesizer includes main resonator, such as a digital waveguide network, that is coupled to a digital passive nonlinear filter. The passive nonlinear filter receives traveling wave signals from the resonator and generates modified traveling wave signals having a different frequency spectrum than the received traveling wave signals without changing the received traveling wave signals' energy content. The passive nonlinear filter then transmits the modified traveling wave signals back into the resonator. The passive nonlinear filter includes a first memory element for retaining an internal energy state and a dual-mode signal generator that generates the modified traveling wave signal from the received signals and the internal energy state using a first signal processing method when the internal energy state has a negative value and using a second distinct signal processing method when the internal energy state has a positive value.
    Type: Grant
    Filed: May 10, 1994
    Date of Patent: December 30, 1997
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: John R. Pierce, Scott A. Van Duyne
  • Patent number: 5701471
    Abstract: A database management system (DBMS) benchmark testing system for testing performance of a plurality of DBMS's stores both DBMS independent and DBMS specific files in a computer memory. The DBMS specific files include performance statistics collection procedures for each said DBMS, procedures for performing various DBMS operations for each DBMS, and environmental parameter definition files for each DBMS for specifying DBMS environmental parameters that control the configuration and operation of each DBMS. DBMS independent test scripts specify operations to be performed by specified ones of the DBMS's so as to test performance of the DBMS's, and specify performance statistics to be collected by the performance statistics collection procedures while the DBMS performs the specified operations.
    Type: Grant
    Filed: July 5, 1995
    Date of Patent: December 23, 1997
    Assignee: Sun Microsystems, Inc.
    Inventor: Shanti Subramanyam
  • Patent number: 5701393
    Abstract: Sinusoidal waveforms are synthesized using one or more waveguide resonance oscillators. The waveguide resonance oscillator has two digital delay elements coupled to a digital waveguide junction. Each digital delay element receives a signal on its respective input node and outputs the received signal on its respective output node after a delay of one sample period. In the preferred embodiment, the waveguide junction has three digital signal adders and one signal multiplier interconnected so as to compute, once each sample period, a new input value for each digital delay element as a function of the two signals output by the digital delay elements. The multiplier coefficient used by the waveguide junction's multiplier determines the generated waveform's frequency of oscillation. The two output signals from the waveguide junction are sinusoidal waveforms that are 90 degrees out of phase with each other.
    Type: Grant
    Filed: June 28, 1994
    Date of Patent: December 23, 1997
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Julius O. Smith, III, Perry R. Cook
  • Patent number: 5701470
    Abstract: In summary, the present invention is a multithreaded computer system having a memory that stores a plurality of objects and a plurality of procedures. Each object has a lock status of locked or unlocked, and includes a data pointer to a data structure. The system uses a first object locking procedure to service lock requests on objects that have never been locked as well as object that have not recently been locked, and uses a second object locking procedure to service lock requests on locked objects and object that have been recently locked. The first object locking procedure has instructions for changing a specified unlocked object's lock status to locked, for copying the data structure referenced by the data pointer to an enlarged data structure including a lock data subarray for storing lock data, and for updating the data pointer to point to the enlarged data structure. The second object locking procedure has instructions for updating a specified object's stored lock data.
    Type: Grant
    Filed: December 8, 1995
    Date of Patent: December 23, 1997
    Assignee: Sun Microsystems, Inc.
    Inventors: William N. Joy, Arthur A. van Hoff
  • Patent number: 5700717
    Abstract: A system and method for reducing the contact resistance associated with tungsten plug contacts to P-doped diffusion regions of a semiconductor device. Before or during the formation of the tungsten plug contacts, a high energy, low dosage of an N-dopant or neutral species such as silicon or germanium is implanted into the P-doped diffusion regions of the semiconductor device. The implantation causes lattice damage within the P-doped diffusion regions, enhancing diffusion of the P-dopant within the P-doped diffusion regions. This results in the P-dopant diffusing toward the contact, replacing dopant lost to segregation into the contact metalization, and thus reducing the contact resistance.
    Type: Grant
    Filed: November 13, 1995
    Date of Patent: December 23, 1997
    Assignee: VLSI Technology, Inc.
    Inventors: Edward D. Nowak, Ying-Tsong Loh, Lily Ding
  • Patent number: 5699539
    Abstract: A virtual memory system and method enable a computer system to use a virtual memory address space larger than the size of physical primary memory while swapping few, if any, pages out to secondary memory. Primary memory is divided into a work space, used for storing uncompressed pages in current use, and a "Compression Heap". A MappedOut storage space, which includes the Compression Heap and a portion of secondary memory, is used to store all pages swapped out of the work space. A virtual memory manager dynamically determines the number of pages of primary memory which need to be included in the work space, and moves pages of primary memory into the work space from the Compression Heap as needed. Pages are selected to be swapped out of the work space to the MappedOut storage space on the basis of memory usage data.
    Type: Grant
    Filed: May 7, 1996
    Date of Patent: December 16, 1997
    Assignee: Connectix Corporation
    Inventors: Jonathan Forrest Garber, Jorg Anthony Brown, Chad Perry Walters
  • Patent number: 5692047
    Abstract: A computer system includes a program executer that executes verifiable architecture neutral programs and a class loader that prohibits the loading and execution of non-verifiable programs unless (A) the non-verifiable program resides in a trusted repository of such programs, or (B) the non-verifiable program is indirectly verifiable by way of a digital signature on the non-verifiable program that proves the program was produced by a trusted source. In the preferred embodiment, verifiable architecture neutral programs are Java bytecode programs whose integrity is verified using a Java bytecode program verifier. The non-verifiable programs are generally architecture specific compiled programs generated with the assistance of a compiler. Each architecture specific program typically includes two signatures, including one by the compiling party and one by the compiler. Each digital signature includes a signing party identifier and an encrypted message.
    Type: Grant
    Filed: December 8, 1995
    Date of Patent: November 25, 1997
    Assignee: Sun Microsystems, Inc.
    Inventor: Charles E. McManis
  • Patent number: 5692197
    Abstract: A method and apparatus for actively managing the overall power consumption of a computer network which includes a plurality of computer systems interconnected to each other. In turn, each computer system has one or more modules. Each computer system of the computer network is capable of independently initiating a transition into a power-conserving mode, i.e., a "sleep" state, while keeping its network interface "alive" and fully operational. Subsequently, each computer system can independently transition back into fully operational state, i.e., an "awake" state, when triggered by either a deterministic or an asynchronous event. As a result, the sleep states of the computer systems are transparent to the computer network. Deterministic events are events triggered internally by a computer system, e.g., an internal timer waking the computer system up at midnight to perform housekeeping chores such as daily tape backups.
    Type: Grant
    Filed: March 31, 1995
    Date of Patent: November 25, 1997
    Assignee: Sun Microsystems, Inc.
    Inventors: Charles E. Narad, Zahir Ebrahim, Satyanarayana Nishtala, William C. Van Loo, Kevin B. Normoyle, Louis F. Coffin, III, Leslie Kohn
  • Patent number: 5689270
    Abstract: A positioning system uses a multiplicity of commercial broadcast stereo FM radio signal transmitters, at known fixed locations, each of which transmits a beacon signal having a phase that is un-synchronized with the phases of the beacon signals of the other transmitters. All the beacon signals have a frequency approximately equal to a 19 KHz. A fixed position observer unit, positioned at a known location, receives the beacon signals from all the transmitters in the vicinity, determines their relative phases, and broadcasts data representing these relative phases. Mobile units, at unknown locations, receive these broadcast values, as well as beacon signals from at least three radio transmitters. Each mobile unit includes phase detection circuitry that detects the phases of the beacon signals at the mobile receivers current position. This is accomplished using a single radio signal receiver. A digital phase-locked loop, coupled to the radio signal receiver, generates a phase error signal for each beacon signal.
    Type: Grant
    Filed: March 12, 1996
    Date of Patent: November 18, 1997
    Assignee: Pinterra Corporation
    Inventors: David C. Kelley, Joseph Cisneros, Louis A. Greenbaum