Abstract: During system initialization, a cache is completely loaded with valid information from main memory. The directory and data buffer are organized in levels of memory locations. Each level of the directory and data buffer is loaded in turn from main memory. Round Robin apparatus, which is preset during system initialization, identifies the next level into which a replacement data word is written on a first in-first out basis. The round robin count for each address location of cache indentifying the next level to be written is stored in a random access memory (RAM). The contents of a particular address location of RAM is incremented each time replacement information is written into that address location in cache.

Abstract: A Data Processing System comprises a central processor unit, a main memory and a cache, all coupled in common to a system bus. The central processor unit is also separately coupled to the cache. Apparatus in cache is responsive to signals received from the central processor unit to initiate a test and verification mode of operation in cache. This mode enables the cache to exercise various logic areas of cache and to indicate to the central processor unit hardware faults.

Abstract: A method and apparatus for printing electrographically upon two sides of a chemically pre-treated recording medium, at comparatively high speed such as is required in a computer print-out apparatus.A pre-treated paper medium comprised of a conductively treated paper base supporting a plastic dielectric coating on each of its sides, is positioned between electrode assemblies comprised of matrices of a plurality of styli which receive variable information from a data processor, or other equipment and by selectively changing the plurality of styli generating a latent image of alphanumeric characters or other variable printing by electrostatic discharge on the paper which is retained by the coating. The latent image is developed, i.e., made visible, by subjecting the paper medium to charged toning particles suspended in a liquid toning carrier. The image is then fixed, i.e., made permanent by vaporizing the liquid carrier with heat.

Abstract: A data processing system includes a plurality of system units all connected in common to a system bus. The system units include a central processor (CPU), a memory system and a high speed buffer or cache system. The cache system is word oriented and comprises a directory, a data buffer and associated control logic. The CPU requests data words by sending a main memory address of the requested data word to the cache system. If the cache does not have the information, apparatus in the cache requests the information from main memory, and in addition, the apparatus requests additional information from consecutively higher addresses. If main memory is busy, the cache has apparatus to request fewer words.

Abstract: An apparatus in a digital communication system for receiving and/or transmitting link control bytes of eight bits or in the alternative information bytes of any number of bits. Dynamic switching to different byte size in an information field is accomplished by utilizing a logic control field (LCF) as part of a message received or transmitted, comprising 8-bit bytes which are recursively extendable. The first octet of the LCF is a text control byte for identifying the number of bits in each byte contained in the accompanying text field transmitted or received, whereas the last LCF octet is indicated by setting the most significant bit (MSB) of the octet to 1. Apparatus responsive to the above fields for accomplishing the transition is disclosed.

Abstract: A power supply provides a low-level DC voltage to one or more DC load circuits by first rectifying either of the two standard AC voltages and thereafter reducing the rectified AC voltage to the low-level DC voltage. The reduction of the rectified AC voltage to the low-level DC voltage is accomplished by a power transformer which is switched on or off by a pair of switching transistors. The switching transistors are activated by a control transformer operating in combination with a control circuit. The control circuit timely produces various pulse conditions in the control transformer which turns the switching transistors on or off in a prescribed manner.

Abstract: A digital computing system includes an addressable read only memory for storing microprogram control words. A plurality of the microprogram control words each include a predetermined bit used for branching. When the predetermined bit within a control word is not set, the next microprogram control word is read from the next microprogram memory address. When the predetermined bit is set, the next microprogram word is read from the microprogram memory address having a value which corresponds to the next address plus a weighted value of the predetermined bit.

Abstract: In a data storage apparatus, a motor isolation mount for isolating a linear magnetic motor from a base plate so that forces imparted by the motor to the base plate do not excite resonance which might cause head-to-track positioning errors.

Abstract: An improved bias field assembly for reducing power losses in a magnetic domain memory device. A preferred embodiment employs rectangular permanent magnets positioned above and below a drive coil/substrates assembly. Ferrite shields of the same general size as the permanent magnets are interposed between the magnets and the drive coil/substrates assembly. These shields provide a highly resistive, relatively impermeable path for induced eddy currents and flux to reduce the effective resistance of the drive coil during high frequency operation and to minimize hysteresis losses.

Abstract: A communications terminal having a video output wherein new data is displayed on the bottom line of the CRT and each line of previously displayed data is moved up one line. Logic internal to the terminal increments the address of the storage locations within a memory to accomplish this. The new data being displayed replaced the oldest data stored in the memory.