Abstract: A high speed link used to connect peer computer systems. The link includes data lines and control lines connected to a device adapter in the I/O system of each of the peer computer systems and logic in each device adapter. The data lines carry data words in parallel; the control lines include status lines indicating status of each of the peer systems, arbitration lines for indicating which of the peer systems currently desires to transmit data across the link and whether the link is available, and receiver acquisition lines for specifying which of the peer systems is to receive a transmission and whether the specified system is able to receive the transmission.

Abstract: Method, apparatus, and document structure used to translate a document having one structure into a document having another structure. A document having the first structure is translated into an equivalent document having an intermediate structure, and the document having the intermediate structure is translated into an equivalent document having the second structure. The intermediate document structure is sequential, and translation from the document having the intermediate structure to the document having the second structure may begin before the translation from the document having the first structure to the document having the second structure is complete. The sequential document structure consists of segments representing components of the document. If a given component is dependent from another component, the dependent component is nested within the component it is dependent from. The entire document is represented by a segment in which all segments representing components are nested.

Abstract: Apparatus for removably attaching display apparatus such as an LCD screen to electrical apparatus. The attachment apparatus provides for electrical and mechanical attachment and detachment of the display apparatus in a single operation. When the display apparatus is detached, the attachment apparatus also provides for attachment of different display apparatus to the electrical apparatus. The attachment apparatus consists of a socket including a male electrical connector and a plug including a female electrical connector. When the plug is inserted into the socket, the male and female electrical connectors are connected, thereby providing power and signals to the display apparatus. The plug is held in the socket by means of a lever-actuated friction mechanism.

Abstract: Apparatus and method for reconfiguring a memory in a data processing system to increase the rate of information transfer between system memory and processor. The system memory is comprised of a plurality M of memory banks, each having a separate data output path. In a first configuration a memory controller addresses the memory banks sequentially to read from one address location at a time. The memory is reconfigured by an address translator providing addresses addressing M banks in parallel, so that M locations are read in each read operation, and a bus reconfiguration multiplexer which reconfigures the bank output busses in parallel and selects one or more bank output busses as the memory output to the system processor.

Abstract: Apparatus for temporarily attaching one object to another object which includes a channel on one object, a form on the other object which may be slidably inserted into the channel, a flap on one object, and means for engaging the flap on the other object. The objects are connected to each other by sliding the form into the channel and then engaging the flap with the engagement means when engaged, the flap prevents sliding motion, and thereby ensures that the form does not slid out of the channel.

Abstract: Protocols for communicating between a digital data processing system and a terminal. The terminal permits specification of attributes for characters, of fill characters and their attributes, of key board bit maps, and of different modes of specifying a group of shifted characters. The protocols include a protocol which takes another as an operand and specifies how the second protocol is to be executed, protocols which control the use of fill characters, a protocol which resets the attributes of a string of characters, protocols for shifting fields to the left and right and scrolling regions up and down, protocols which save and restore the current cursor state, protocols for loading bit maps and checking their correctness, a protocol for setting the current mode of specifying shifted characters, a protocol for setting the high bit of a following code, and a protocol for obtaining the attribute of the character at the current cursor position.

Abstract: Attachment apparatus for attaching a first object to a second object. The first object has a groove with parallel sides; the second object has attached thereto a spline with a flexible blade. When the spline is inserted in the groove, the blade exerts a force against one wall of the groove which forces the spline against the other wall, thereby retaining the spline in the groove. Also disclosed is label attachment apparatus employed generally to removably attach a label to a surface and specifically to removably attach a function key strip to a keyboard. The surface has a groove and the label has means which frictionally engage the groove. A preferred embodiment of the label attachment apparatus employs the groove, spline, and flexible blade as described above.

Abstract: A system bus and bus interface apparatus for connecting components in a data processing system having a plurality of non-memory and memory components. The system bus has the following sets of lines; A first plurality of lines carries a plurality of codes specifying a plurality of memory operations involving communications between a non-memory component and a memory component and a single code specifying an interprocessor communication between two non-memory components. A second plurality of lines carries an address in a memory component when the code on the first plurality of lines specifies a memory operation and a target address, an interprocessor communication type, and in some cases, a message, when the code on the first plurality of lines specifies an interprocessor communication.

Abstract: A memory system connected by means of a system bus to other components of a data processing system. The memory system includes a memory control unit and at least one memory unit in which information units containing two words are stored. The memory control unit is connected to the system bus and receives system addresses and memory commands from the system bus, and depending on the memory command, receives data from or provides data to the system bus. A memory bus and lines for control signals specifying memory requests connect the memory control unit and the memory unit. The memory bus is time multiplexed between memory addresses and information units. The memory control unit receives a memory command, a system address, and in the case of a write command, system data on the system bus and produces the memory requests, memory addresses, and information units required to carry out the memory command.

Abstract: Apparatus for removably attaching a cable to a point on another piece of apparatus. The apparatus consists of means such as a jack for attaching an end of the cable to the piece of apparatus and a clip at another point on the piece of apparatus which may be employed at the option of the user of the piece of apparatus to retain an intermediate point of the cable. The cable may be inserted in and removed from the clip without use of tools. The attaching apparatus is employed in devices such as keyboards for the cables which attach the keyboard to the rest of the system and auxiliary input devices to the keyboard. In a preferred embodiment, the clip consists of a short channel in the case of the keyboard which will accept a number of cables having different sizes and a flexible snap which retains the cables in the channel.

Abstract: A simplified cache with automatic updating for use in a memory system. The cache and the main memory receive data from a common input, and when a memory write operation is performed on data stored at a memory location for which there is a corresponding cache location, the data is written simultaneously to the cache and to the main memory. Since a cache location coresponding to a memory location always contains a copy of the data at the memory location, there is no need for dirty bits or valid bits in the cache resisters and the associated logic in the cache control. The main memory used with the invention may receive data either from a CPU or from I/O devices, and the cache includes apparatus permitting the CPU to perform cache read operations while the main memory is receiving data from an I/O device.

Abstract: A method is disclosed for compressing binary numbers to be stored in a memory. A first number to be stored is first determined to be in one of several bit size ranges, and depending on the bit size range a fixed value number is subtracted from the first number. A second number resulting from the subtraction process has two binary bits are prefixed thereto and the combination is stored in memory. The two binary bit prefix identifies the particular bit size range and thereby the fixed value number originally subtracted from the first number. On reading out the second number with two bit prefix, the fixed value number identified by the two bit prefix is added back to the second number to get the first number. The combination of the second number plus two bit prefix has fewer total bits than the first number thus achieving compression of the first number.

Abstract: Variable length data (e.g., for hospital patients) is embedded in a B-tree type index structure of a relational data base. A logically related inverted B-tree index is used to access the original index. Access time, and storage space for the inverted lists, are decreased by data compression techniques and by encoding certain inverted list parameters in sparse array bit maps.

Abstract: Automatic telephone answering equipment is disclosed which is associated with a telephone set connected to a switching system along with other telephone sets, and the answering equipment functions with central message recording equipment which is also connected to the switching system. Unanswered incoming calls originating from within or without the switching system are answered by the automatic answering equipment which then transfers the call to either another of the telephone sets or to the message recording equipment, as selected by the user of the answering equipment. When the call is transferred to the central message recording equipment the identity of the telephone set to which the call was directed is forwarded to the recording equipment. Only upon the calling party recording a message in the central message recording equipment, the recording equipment uses the called telephone set identity to call the originally called telephone set.

Abstract: Apparatus and methods for the calculation of addresses of data items in digital computer systems which perform call and return operations. In the digital computer systems of the invention, items of data called immediate names represent other items of data and specify how the address of the represented item is to be calculated. Certain immediate names represent items of data whose addresses are calculated using linkage pointers. Such an immediate name specifies the linkage pointer to be used in the calculation. Linkage pointers are pointers whose values remain unchanged during an execution of a procedure. When the digital computer system's processor executes the call operation, the processor places the addresses represented by the linkage pointers in internal registers.

Abstract: A method for executing call and return instructions in a digital computer system operating under control of microcode. The microcode may specify calls to and returns from sequences of microinstructions. A call microinstruction sequence corresponds to the call instruction. The call microcode in turn calls other microinstruction sequences for deriving pointers representing the location of the called procedure and of arguments from operands in the call instruction. As the call microcode obtains each argument pointer, it places the pointer on the stack. After it has obtained all of the argument pointers, it passes the pointer to the called procedure and a pointer to the argument pointers to a general call microinstruction sequence. That microinstruction sequence locates the called procedure, makes a new frame including the argument pointers, and saves the state necessary to resume execution of the call microinstruction sequence itself.

Abstract: A system for performing operations on data items in digital computer systems in which the instructions may not specify internal registers in the processor as destinations of data received from memory or sources of data provided to memory. The system includes a result memory, apparatus for executing operations, instructions containing operation codes which specify that the result memory is to be a source of data to be operated on by the apparatus for executing operations, and control apparatus responsive to the operation codes for controlling the apparatus for executing operations. The result memory stores only the results of previous operations and may serve only as an input to the apparatus for executing instructions. The apparatus for executing operations may receive items to be operated on from either the computer system memory or the result memory.