Patents Represented by Attorney Graybeal Jackson Haley LLP
  • Patent number: 7151402
    Abstract: A circuit for controlling a triac, comprising: a bidirectional current-limiting active element connecting the triac gate to its opposite power electrode; and a switch connecting the gate to the other power electrode of the triac.
    Type: Grant
    Filed: April 29, 2004
    Date of Patent: December 19, 2006
    Assignee: STMicroelectronics S.A.
    Inventors: Benoit Peron, Ghafour Benabdelaziz
  • Patent number: 7151705
    Abstract: The present invention relates to a non volatile memory device architecture, for example of the Flash type, incorporating a memory cell array and an input/output interface to receive memory data and/or addresses from and to the outside of the device. The interface operates generally according to a serial communication protocol, but it is equipped with a further pseudo-parallel communication portion with a low pin number incorporating circuit blocks for selecting the one or the other communication mode against an input-received selection signal.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: December 19, 2006
    Assignee: STMicroelectronics, S.r.l.
    Inventors: Salvatore Polizzi, Maurizio Francesco Perroni, Paolino Schillaci
  • Patent number: 7149428
    Abstract: The present invention provides a method and an apparatus for monitoring optical signal to noise ratio (OSNR) in a wavelength division multiplexing optical transmission system. The present invention utilizes a polarization nulling method and a tunable optical bandpass filter in order to reliably monitor the OSNR by considering a finite polarization nulling ratio, polarization mode dispersion and non-linear birefringence of the optical system in real time measurement of the OSNR. Further, the tunable optical bandpass filter is controlled to filter all wavelength bands of wavelength division multiplexed signals. Since the invention may monitor a plurality of demultiplexed optical signals with a single apparatus, the overall cost of the OSNR monitoring equipment is significantly reduced.
    Type: Grant
    Filed: May 20, 2003
    Date of Patent: December 12, 2006
    Assignee: Teralink Communications, Inc.
    Inventors: Yun Chur Chung, Seung Kyun Shin, Chul Han Kim
  • Patent number: 7149844
    Abstract: A non-volatile memory device is proposed. The non-volatile memory device includes a flash memory and means for executing external commands, the external commands including a first subset of commands for accessing the flash memory directly; the memory device further includes a programmable logic unit and means for storing program code for the logic unit, the external commands including a second subset of at least one command for causing the logic unit to process information stored in at least one portion of the flash memory under the control of the program code.
    Type: Grant
    Filed: March 14, 2003
    Date of Patent: December 12, 2006
    Assignee: STMicroelectronics S.R.L.
    Inventors: Oreste Bernardi, Marco Redaelli, Corrado Villa
  • Patent number: 7143935
    Abstract: A machine for the mechanical personalization of supports of the type identification card, comprising a mechanical personalization group of the cards adapted to interact with a card to be mechanically personalized so as to form, on a surface of the card, strings of symbols, and a moving and positioning device of the cards to be mechanically personalized with respect to the mechanical personalization group. The moving and positioning device of the cards includes a pair of elements belt-like extending and jointly movable along a first direction of a plane containing the card to be personalized, said belt-like elements being arranged at a mutual distance, in a second direction orthogonal to the plane, such as to allow said pair of belt-like elements to receive, accommodate and hold therebetween by friction the card.
    Type: Grant
    Filed: June 1, 2004
    Date of Patent: December 5, 2006
    Assignee: Fractalos S.R.L.
    Inventor: Federico Marta
  • Patent number: 7143327
    Abstract: Described herein is a method for compressing a sequence of repetitive data, which uses in combination one or more words with a format for non-compressible data and one or more words with a format for compressible data, in which a word with a format for non-compressible data is made up of a set of bits, in which the most significant bit is set at the logic value “1” and the remaining bits are the bits of a non-compressible datum to be encoded, whilst a word with a format for compressible data is made up of a set of bits, in which the most significant bit is set at a the logic value “0”, the next five most significant bits indicate the total number of subsequent words which encode the sequence of repetitive data, and the remaining eleven bits indicate the number of times that the words indicated by the preceding five most significant bits are repeated.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: November 28, 2006
    Assignee: STMicroelectronics, S.r.l.
    Inventor: Massimiliano Barone
  • Patent number: 7137799
    Abstract: The present invention provides a pressure vessel for exerting pressure on a repair to a component made of composite materials to cure the repair in the field. The pressure vessel includes a body having a chamber for receiving the repair to the component; a portal operable to permit a heating element of a heater located inside the chamber to be coupled with a power source located outside the chamber to power the heating element; and a pump operable to pressurize the chamber. By pressurizing the chamber, the pressure vessel may exert pressure on a repair placed inside the chamber that exceeds 14.7 psi, and thus, provide a better cure in the field to produce a stronger repair. Furthermore, the pressure vessel may be more easily transported from one location in the field to another than an autoclave.
    Type: Grant
    Filed: July 29, 2003
    Date of Patent: November 21, 2006
    Inventor: Howard Victor Banasky
  • Patent number: 7138987
    Abstract: There is provided an input-output (I/O) protective circuit having more stable I/O protective function for use in the liquid crystal display device. An IO protective circuit includes: a resistance 13 provided between an I/O terminal pad 11 and an I/O primary stage thin film transistor 12, a wiring connecting the I/O terminal pad 11 with the resistance 13, and two I/O protective thin film transistors 14 connected in series between a ground terminal 20 and a power source terminal 21.
    Type: Grant
    Filed: March 26, 2003
    Date of Patent: November 21, 2006
    Assignee: Kabushiki Kaisha Ekisho Sentan Gijutsu Kaihatsu Center
    Inventor: Yoshiaki Nakazaki
  • Patent number: 7133204
    Abstract: A diffraction grating generates even-order, odd-order, and 0th-order exit-pupil images. The even-order exit-pupil images have brightness levels within a first range and the odd-order exit-pupil images have brightness levels within a second range that is different from the first range. In one example, the even-order exit-pupil images are virtually invisible, i.e., missing, the odd-order exit-pupil images have the same or approximately the same intensities, and the 0th-order exit-pupil image has an intensity greater than the respective intensities of the odd-order exit-pupil images.
    Type: Grant
    Filed: July 12, 2004
    Date of Patent: November 7, 2006
    Assignee: Microvision, Inc.
    Inventor: Hakan Urey
  • Patent number: 7126413
    Abstract: A method and related circuit structure correlate the transconductance value of transistors of different type, for example MOS transistors and bipolar transistors. The structure comprises a first differential cell formed by transistors of the first type and a second differential cell formed by transistors of the second type connected to each other by means of a circuit portion responsible for calculating an error signal obtained as difference between the cell differential currents and applied to said first differential cell and to an output node of the same circuit structure obtaining a transconductance correlation independent from process tolerances and temperature.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: October 24, 2006
    Assignee: Simicroelectronics, S.R.L.
    Inventors: Pietro Filoramo, Giovanni Calì
  • Patent number: 7127085
    Abstract: There is provided an image processing method for use in a computer system having a database for storing a reference image, control point chips (CP chips) of the reference image, and auxiliary data including geographic coordinates, incidence angles and orientation angles of the reference image and the CP chips, comprising the steps of (a) a CP chip extraction step of, when a target image and auxiliary data including location information and incidence and orientation angle information of the target image are inputted, finding out a region of the reference image corresponding to a region including the target image, selecting the found region as a control region, and extracting the CP chips included in the control region of the reference image, (b) an image matching step of searching matching points of the target image for the control points within the CP chips extracted from the CP chip extraction step, (c) a mismatching point removing step of finding out and removing mismatching points among matching results ob
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: October 24, 2006
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Tae Jung Kim, Yong Jo Im
  • Patent number: 7119561
    Abstract: The electrical connecting apparatus according to the present invention includes first, second and third plate members having plate-like portions at intervals from each other in the thickness direction, each plate-like member having a plurality of through holes in the plate-like portions; and a plurality of probes having projected portions passed through the through holes of the first, second and third plate-like members, the probes including projected portions between said first and second plate-like members. Each through hole of the first and second plate-like members has a small diameter portion for preventing the projected portion of the probe from passing and a large diameter portion communicated to the small diameter portion.
    Type: Grant
    Filed: December 29, 2004
    Date of Patent: October 10, 2006
    Assignee: Kabushiki Kaisha Nihon Micronics
    Inventor: Minoru Sato
  • Patent number: 7120533
    Abstract: A soft-computing method for establishing the dissipation law of the heat in a diesel Common Rail engine, in particular for establishing the dissipation mean speed (HRR) of the heat, includes the following steps: choosing a number of Wiebe functions whereon a dissipation speed signal (HRR) of the heat is decomposed; applying a Transform ? to the dissipation speed signal (HRR) of the heat; carrying out analysis of homogeneity of the Transform ? output; realizing a corresponding neural network MLP wherein the design is guided by an evolutive algorithm; and training and testing the neural network MLP.
    Type: Grant
    Filed: May 31, 2005
    Date of Patent: October 10, 2006
    Assignee: STMicroelectronics S.R.L.
    Inventors: Nicola Cesario, Claudio Muscio, Marco Farina, Paolo Amato
  • Patent number: 7115465
    Abstract: A method for manufacturing a bipolar transistor, comprising the steps of: growing on the substrate a first semiconductor; depositing an encapsulation layer etchable with respect to the first semiconductor, forming a sacrificial block at the location of the base-emitter junction; exposing the first semiconductor around spacers formed around said block; forming a second semiconductor, then a third semiconductor etchable with respect to the second semiconductor layer, the encapsulation layer, and the spacers, the sum of the thicknesses of the second semiconductor and the sacrificial layer being substantially equal to the sum of the thicknesses of the encapsulation layer and of the sacrificial block; removing the block and the encapsulation layer; depositing a fourth semiconductor; removing the third semiconductor; and etching an insulating layer to maintain it on the emitter walls and between said emitter and the second semiconductor.
    Type: Grant
    Filed: May 3, 2004
    Date of Patent: October 3, 2006
    Assignee: STMicroelectronics, S.A.
    Inventors: Michel Marty, Bertrand Martinet, Cyril Fellous
  • Patent number: 7115472
    Abstract: A process for manufacturing a dual charge storage location electrically programmable memory cell that includes the steps of forming a central insulated gate over a semiconductor substrate; forming physically separated charge-confining layers stack portions of a dielectric-charge trapping material-dielectric layers stack at the sides of the central gate, the charge trapping material layer in each charge-confining layers stack portion forming a charge storage element; forming side control gates over each of the charge-confining layers stack portions; forming memory cell source/drain regions laterally to the side control gates; and electrically connecting the side control gates to the central gate. Each of the charge-confining layers stack portions at the sides of the central gate is formed with an “L” shape, with a base charge-confining layers stack portion lying on the substrate surface and an upright charge-confining layers stack portion lying against a respective side of the insulated gate.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: October 3, 2006
    Assignee: STMicroelectronics, S.r.l.
    Inventors: Paolo Caprara, Claudio Brambilla, Manlio Sergio Cereda
  • Patent number: 7116525
    Abstract: A read/write assembly for magnetic hard disks includes at least: one supporting element; one read/write (R/W) transducer; one micro-actuator, set between the R/W transducer and the supporting element; one electrical-connection structure for connection to a remote device carried by the supporting element and connected to the R/W transducer and to the micro-actuator. In addition, a protective structure, set so as to cover the micro-actuator is made of a single piece with the electrical-connection structure.
    Type: Grant
    Filed: May 2, 2003
    Date of Patent: October 3, 2006
    Assignee: STMicroelectronics S.R.L.
    Inventors: Marco Del Sarto, Mauro Marchi, Lorenzo Baldo, Simone Sassolini
  • Patent number: 7113032
    Abstract: A multi-channel power amplifier for driving a plurality of loads, each associated to a respective channel, each channel comprising a pair of operational amplifiers, first and second, one operational amplifier of each channel being connectable through switches either in a bridge configuration with the other operational amplifier or in single-ended configuration to a constant reference voltage for driving the load of the respective channel, the amplifier comprises circuit means for comparing the signal level of the channels with at least a threshold and outputting a logic control signal for the switches. A relative method of controlling a power amplifier that allows a sensible reduction of distortion at the price of a negligible increase of dissipated power is disclosed.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: September 26, 2006
    Assignee: STMicroelectronics, S.r.l.
    Inventors: Edoardo Botti, Fabio Cagnetti
  • Patent number: 7109689
    Abstract: A regulator supplies a regulated voltage to an electronic component with a plurality of phases with varying response rates. The regulator includes an output node that provides a regulated supply voltage, a first main-phase drive circuit that provides a first main load current to the output node and that has an on time and an off time, and a first transient-phase drive circuit that has a first transient load current to the output node that has an on time and an off time that are respectively less than the on and off times of the first main-phase drive circuit.
    Type: Grant
    Filed: October 17, 2003
    Date of Patent: September 19, 2006
    Assignee: Intersil Americas Inc.
    Inventor: Michael Edwin Schneider
  • Patent number: 7109671
    Abstract: This invention is a back EMF permanent electromagnetic motor generator and method using a regauging process for capturing available electromagnetic energy in the system. The device is comprised of a rotor with magnets of the same polarity; a timing wheel in apposition to a magnetic Hall Effect pickup switch semiconductor; and a stator comprised of two bars connected by a permanent magnet with magnetized pole pieces at one end of each bar. There are input and output coils created by wrapping each bar with a conducting material such as copper wire. Energy from the output coils is transferred to a recovery rectifier or diode. The magnets of the rotor, which is located on a shaft along with the timing wheel, are in apposition to the magnetized pole pieces of the two bars. The invention works through a process of regauging, that is, the flux fields created by the coils is collapsed because of a reversal of the magnetic field in the magnetized pole pieces thus allowing the capture of available back EMF energy.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: September 19, 2006
    Assignee: Energenx, Inc.
    Inventor: John C. Bedini
  • Patent number: D531134
    Type: Grant
    Filed: June 13, 2003
    Date of Patent: October 31, 2006
    Assignee: YXLON International X-ray GmbH
    Inventors: John Nielsen, Nils Birkedal Kristiansen