Abstract: A high speed, low power 3-2 adder (300, 500) with latchable outputs comprises a most significant bit (MSB) adder circuit (100) and a least significant bit (LSB) adder circuit (200). MSB adder circuit (100) includes three differential data inputs (A1, B1, and C1), a latch enable input (LE1), three separate bias points, and an MSB output. In addition the LSB adder circuit includes three differential data inputs (A2, B2, and C2), a latch enable input (LE2), three separate bias points and a LSB output. Internal latch circuits (172, 272) and latch enable circuits (174, 274) are provided in each adder stage. Internal latch enable inputs are connected in parallel in one configuration. Separate latch enable inputs are provide in a second configuration. Separate bias points are also provided in each adder stage.

Abstract: A distributed MMIC active quadrature hybrid (10) provides in-phase (I) and quadrature-phase (Q) outputs (22, 24) over an octave bandwidth. The quadrature hybrid includes in-phase and quadrature-phase amplifying elements (14, 12) arranged in a distributed manner. The in-phase amplifying elements (14) include FETs (42) with series inductive feedback (44) in the source path. The quadrature-phase amplifying elements (12) includes FETs (52) with series capacitive feedback (54) in the source path. The series inductive and capacitive feedback provides the phase difference between the hybrid's outputs. The FETs of the in-phase and quadrature-phase amplifying elements have differing gate peripheries to provide amplitude tracking over the bandwidth.

Abstract: A telephone, such as a radiotelephone, is provided having the capability to concurrently operate with two subscriber identification module (SIM) cards. The telephone advantageously permits a single phone to have two telephone numbers associated therewith.

Abstract: A MMIC power amplifier (100) uses MMIC FET cells (104, 112) and provides high gain at microwave and millimeter-wave frequencies. The power amplifier includes an input matching network (102), a first plurality of unit FET cells (104) for amplifying in-phase signals provided by the input matching network, a second plurality of unit FET cells (112), an interstage matching network (106) for combining output signals provided by the first plurality of unit FET cells, and providing in-phase signals to the second plurality of unit FET cells; and a combiner (113) for combining output signals of the second plurality of unit FET cells to provide an output signal. The FET cells are designed to be unconditionally stable without the use of an external series gate resistance. The FET cells are combined to provide total device periphery suitable for output power levels exceeding 0.8 watt at frequencies ranging from 19 to 23.5 GHz. The FET cells are designed using device scaling and device modeling techniques.

Abstract: A three-way phase shifting power coupler (20) processes a primary signal (26) to provide first, second, and third secondary signals (32, 38, and 44) of substantially equal amplitudes. The first and second secondary signals (32 and 38) are phase shifted to be in-phase relative to the primary signal (26). The third secondary signal (44) is phase shifted to produce a quarter-wavelength difference between third secondary signal (44) and the first and second secondary signals (32 and 38). First, second, and third secondary signals (32, 38, and 44) are provided for distribution into a multi-stage amplifier (22). The power coupler (20) is preferably implemented in microstrip.

Abstract: A paging repeater (22) receives (152) a paging signal (30) transmitted (138) by a low-earth orbit satellite (24) while compensating (150) for Doppler effects, modifying (156) the paging signal (30) to produce a repeat signal (40), and transmitting (166) the repeat signal shifted in both the time and frequency domains so as to preclude the generation of interference. A pager (28) receives a paging signal (30) directly from the satellite (24) while compensating (108) for Doppler effects whenever the pager (28) is unshadowed with regard to the satellite (24), or receiving a repeat signal (40) from a paging repeater (22) whenever the pager (28) is shadowed with regard to the satellite (24).

Abstract: Interface processor (IP)(50) sends and receives data units to and from an external host and a processor. The IP is capable of simultaneous, full duplex operation via high speed serial and parallel interfaces. The IP provides a highly flexible and configurable interface which is capable of interfacing to a variety of systems with minimal external hardware. The IP also provides a method of converting received data into data packets. The IP provides buffering of multiple data packets for use in systems having "bursty" data traffic. The IP has a memory expansion capability allowing for changeable buffer capacities.

Abstract: An architecture model (10) provides a model of a data processing system. Pre-condition checks (51-52) and post-condition checks (71-72) are added to the architecture model (10) produce a reliability enhanced architecture model (50) to detect faults achieving a desired fault grade. Applying optimization techniques to the conditional checks of the reliability enhanced architecture model (50) reduces the complexity of implementing the model while maintaining or increasing the overall fault grade. The implementation of the reliability enhanced architecture model (50) when hosted on a separation architecture ensures the fault grade specified for the model.

Abstract: A switch (10) having a beam-forming network (12) generates independently steerable beams (26). One or more of the independently steerable beams couple in radiating communication with selected ones of M beam ports (18). A feeder array (11) or second beam-former (13) provides signals to radiating elements 19 to form multiple antenna beams for communication.

Abstract: A multiple-user subscriber unit (MCU) (110) is used by subscribers (240) in a group of subscribers to obtain communications services from the communication system. MCU (110) is co-located with a mobile vehicle and a group of subscribers. The MCU (110) and procedure (300) enable the MCU to reduce impulsive loading of the communication system caused by simultaneously requests for service. MCU (110) determines a set of tasks which includes a number of call-processing tasks, a number of hand-off tasks, and a number of re-registration tasks. Priorities are established for the tasks which must be performed. A schedule is established based on the priorities and the amount of time required to perform the tasks and the total amount of time available to perform the tasks. Tasks are performed according to the schedule and this reduces impulsive loading of the communication system (100).

Abstract: A multistage MMIC power amplifier with diagonal oriented field effect transistors (FETs) provides higher power output for a smaller MMIC die size. Corporate feed structures divide the RF input signal and combine the RF output signals and in a base two fashion. The corporate feed structures allow the FETs of the amplifier stages operate in-phase with adjacent circuitry appearing as an even-mode open circuit. The MMIC power amplifier is suitable for applications where reduced size, high efficiency and high gain are important, such as in commercial communication systems.

Abstract: A multiple band termination circuit, comprising a first resistor coupled in signal communication with an input and an open stub to form a nominal termination at a high frequency band, and a second resistor coupled in series to the first resistor with a high impedance transmission line, the second resistor and the first resistor cooperating together to form a nominal termination at a low frequency band.

Abstract: A single event upset (SEU) sensitivity control system (42) dynamically hardens a digital circuit (48) to single event upsets. The sensitivity control system (42) includes an upset rate sensor (66) for detecting a quantity of particles (38) that cause single event upsets. A noise margin control circuit (70) is configured to adjust a noise margin (46) of the digital circuit (48) in response to the quantity of particles (38). Noise margin (46) is increased when a particle density (34) is high to decrease the sensitivity of the digital circuit (48) to single event upsets. Additionally, noise margin (46) is decreased when a particle density (36) is low to decrease the power consumption level of digital circuit (48).

Abstract: A MMIC for providing a suspended transmission medium, comprising a MMIC chip, an upper ground plane overlying and spaced from critical circuitry and a lower ground plane underlying and spaced from the critical circuitry. The upper and lower ground planes are spaced from the critical circuitry at electrically similar distances. The portion of the MMIC chip that has the critical circuitry is suspended over a recess in the housing floor.

Abstract: A self-aligned enhancement mode metal-oxide-compound semiconductor FET (10) includes a stoichiometric Ga.sub.2 O.sub.3 gate oxide layer (14) positioned on upper surface (16) of a compound semiconductor wafer structure (13). The stoichiometric Ga.sub.2 O.sub.3 layer forms an atomically abrupt interface with the compound semiconductor wafer structure. A refractory metal gate electrode (17) is positioned on upper surface (18) of the stoichiometric Ga.sub.2 O.sub.3 gate oxide layer (14). The refractory metal is stable on the stoichiometric Ga.sub.2 O.sub.3 gate oxide layer at elevated temperature. Self-aligned source and drain areas, and source and drain contacts (19, 20) are positioned on the source and drain areas (21, 22).

Abstract: An improved method of training a SISRS uses less processing and memory resources by operating on vectors instead of matrices which represent spoken commands. Memory requirements are linearly proportional to the number of spoken commands for storing each command model. A spoken command is identified from the set of spoken commands by a command recognition procedure (200). The command recognition procedure (200) includes sampling the speaker's speech, deriving cepstral coefficients and delta-cepstral coefficients, and performing a polynomial expansion on cepstral coefficients. The identified spoken command is selected using the dot product of the command model data and the average command structure representing the unidentified spoken command.

Abstract: A device driver (104) is used to provide a fail-safe interface between a plurality of client applications and a cryptographic card. Device driver (104) ensures separation between red data, black data, and command data. Device driver (104) uses objects and object handles to control data flow. Device driver (104) uses several simplex channels to control data flow. Each channel is managed separately using its own object, and each channel has unique access protection through the object handles. Within device driver (104), the simplex channel interfaces are kept separate and functional separation of the data and command memory is maintained to provide fail-safe data isolation.

Abstract: A system is disclosed for an adaptive rate voice system to provide improvements in coded operation over changing communication channel (50) conditions. This adaptive rate system efficiently determines optimal voice/channel coding rates , coding strategies and modulation/demodulation for optimum voice quality and intelligibility. A system state estimator (100), channel status estimator (110) and channel status monitor (120) provides feedback in the system to optimize the communication channel. The system maintains a continuous link despite changing channel conditions and minimizes delays through the system. Even though simple in design, it provides relatively low complexity and powerful channel coding operation. Operating conditions are thus extended for CDMA and portable communication systems. Voice intelligibility is preserved in extremely noisy or even hostile channel conditions.

Abstract: A telephone includes a SIM card reader which receives SIM cards. The SIM card may contain two or more telephone numbers for which the phone is activated. One of the numbers may be a temporary number which is linked in use to, for example, a time period. By providing the capability of having two or more numbers on a SIM card, a single phone may respond to incoming calls for a different number of telephone numbers.