Patents Represented by Attorney, Agent or Law Firm Gregory J. Koerner
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Patent number: 7365318Abstract: A system and method are disclosed for effectively compensating for an unbalanced or non-zero centerline radio-frequency potential in a quadrupolar ion trap, the unbalanced centerline potential created by a compensation feature that minimizes non-linear field components created by one or more ejection slots in the ion trap. The ion trap includes a centerline that passes longitudinally through a trapping volume inside of the ion trap, a pair of Y electrodes with inner Y electrode surfaces that are approximately parallel to the centerline, and a pair of X electrodes with inner X electrode surfaces that are approximately parallel to the centerline. The X electrodes have ejection slots through which trapped ions are ejected from the ion trap. A Y signal with a Y signal amplitude is coupled to both of the Y electrodes. An X signal with an X signal amplitude is coupled to both of the X electrodes.Type: GrantFiled: May 19, 2006Date of Patent: April 29, 2008Assignee: Thermo Finnigan LLCInventor: Jae C. Schwartz
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Patent number: 6826528Abstract: A method for implementing a noise suppressor in a speech recognition system comprises a filter bank for separating source speech data into discrete frequency sub-bands to generate filtered channel energy, and a noise suppressor for weighting the frequency sub-bands to improve the signal-to-noise ratio of the resultant noise-suppressed channel energy. The noise suppressor preferably includes a noise calculator for calculating background noise values, a speech energy calculator for calculating speech energy values for each channel of the filter bank, and a weighting module for applying calculated weighting values to the projected channel energy to generate the noise-suppressed channel energy.Type: GrantFiled: October 18, 2000Date of Patent: November 30, 2004Assignees: Sony Corporation, Sony Electronics Inc.Inventors: Duanpei Wu, Miyuki Tanaka, Xavier Menendez-Pidal
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Patent number: 6813139Abstract: A method of making a double layer capacitor, in accordance with one embodiment, includes coupling a top collector disk to a proximal end of a double layer capacitor electrode assembly; electrically coupling a bottom collector disk to a distal end; heating a can; inserting the double layer capacitor electrode assembly into the can; cooling the can, wherein a peripheral edge of the bottom collector disk is coupled to the can as the diameter of the can is decreased; forming a bead around an exterior of the can; heating a lid; placing a concave structure of the lid in juxtaposition with a convex structure on the top collector disk; cooling the lid, wherein the concave structure is coupled to the convex structure as the diameter of the can is decreased; creating a seal between the lid and the can; and placing an electrolyte solution into the electrode assembly.Type: GrantFiled: May 29, 2002Date of Patent: November 2, 2004Assignee: Maxwell Technologies, Inc.Inventors: Priya Bendale, Manuel R. Malay, John M. Dispennette, Chenniah Nanjundiah, Frederic Spiess
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Patent number: 6799205Abstract: Methods and systems consistent with the present invention provide help and configuration information for a plurality of consumer electronic devices in an audio/video network. More specifically, each network device provides help information, identifying the device and its features to other network devices. A help utility program interfaces with a presentation device to provide help information to a user. Another implementation consistent with the present invention provides help information related to configuring two or more devices to perform an operation.Type: GrantFiled: March 31, 2003Date of Patent: September 28, 2004Assignees: Sony Corporation, Sony Electronics Inc.Inventor: Harold Aaron Ludtke
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Patent number: 6798687Abstract: A system and method for effectively implementing a high-speed DRAM device may include memory cells that each have a bitline for transferring storage data, a wordline for enabling an accelerated-write operation in the memory cell, and a data storage node with a corresponding cell voltage. An accelerated-write circuit may then directly provide the storage data to an appropriate bitline in a pre-toggled state in response to one or more accelerated-write enable signals. The corresponding cell voltage may therefore begin a state-change transition towards the pre-toggled state immediately after the wordline is activated to successfully reach a full-state level before the wordline is deactivated during a high-speed memory cycle.Type: GrantFiled: December 16, 2002Date of Patent: September 28, 2004Assignees: Sony Corporation, Sony Electronics Inc.Inventors: Kuoyuan Hsu, Gary Chang, Patrick Chuang
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System and method for effectively implementing an active termination circuit in an electronic device
Patent number: 6788099Abstract: A system and method for effectively transferring electronic information in an electronic device may include a transmission line that connects a source device and a destination device. The foregoing transmission line may be implemented to include a conductor A and a conductor B for transferring the electronic information. One or more active termination circuits may coupled to conductor A and conductor B for being dynamically switched between a differential mode termination configuration and a single-ended mode termination configuration with respect to the transmission line. Control logic may be configured to dynamically place the active termination circuit into the foregoing differential mode termination configuration during a differential transmission mode. Alternately, the control logic may place the active termination circuit into the foregoing single-ended mode termination configuration during a single-ended transmission mode.Type: GrantFiled: December 16, 2002Date of Patent: September 7, 2004Assignees: Sony Corporation, Sony Electronics Inc.Inventor: Rehan A. Zakai -
Patent number: 6788350Abstract: An apparatus and method for effectively implementing a unified clock-recovery system includes an analog frontend module that is configured to generate an analog-source timing reference signal that is based upon analog-source data. Similarly, a digital frontend module may extract a digital-source timing reference signal based upon digital-source data. A switch module may then select between the analog-source timing reference signal and the digital-source timing reference signal to thereby provide a selected input timing reference signal to a unified backend clock recovery module. The backend clock recovery module may then compare the selected input timing reference signal with an output timing reference signal in order to generate a timing error for advantageously adjusting a local clock to thereby compensate for the foregoing timing error.Type: GrantFiled: November 1, 2001Date of Patent: September 7, 2004Assignees: Sony Corporation, Sony Electronics Inc.Inventor: Klaus Zimmermann
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Patent number: 6788813Abstract: A system and method for effectively performing a white balance operation preferably includes an electronic camera device that captures image data using a image sensor device. A color manager may then analyze the image data to selectively locate one or more neutral areas in the image data. The color manager may analyze the neutral areas to determine one or more associated color values, and then responsively produce one or more composite color values for the image data by utilizing the individual color values of the neutral areas. From the foregoing composite color values, the color manager may derive one or more color correction values which the camera device may then apply to color channel amplifiers of the camera device to complete the white balance operation. However, if no neutral areas are located in the image data, the color manager may then analyze the image data to selectively locate one or more memory color areas in the image data.Type: GrantFiled: March 15, 2001Date of Patent: September 7, 2004Assignees: Sony Corporation, Sony Electronics Inc.Inventor: Ted J Cooper
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Patent number: 6785648Abstract: A system and method for performing speech recognition in cyclostationary noise environments includes a characterization module that may access original cyclostationary noise from an intended operating environment of a speech recognition device. The characterization module may then convert the original cyclostationary noise into target stationary noise which retains characteristics of the original cyclostationary noise. A conversion module may then generate a modified training database by utilizing the target stationary noise to modify an original training database that was prepared for training a recognizer in the speech recognition device. A training module may then train the recognizer with the modified training database to thereby optimize speech recognition procedures in cyclostationary noise environments.Type: GrantFiled: May 31, 2001Date of Patent: August 31, 2004Assignees: Sony Corporation, Sony Electronics Inc.Inventors: Xavier Menendez-Pidal, Gustavo Hernandez Abrego
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Patent number: 6778959Abstract: A system and method for speech verification using out-of-vocabulary models includes a speech recognizer that has a model bank with system vocabulary word models, a garbage model, and one or more noise models. The model bank may reject an utterance or other sound as an invalid vocabulary word when the model bank identifies the utterance or other sound as corresponding to the garbage model or the noise models. Initial noise models may be selectively combined into a pre-determined number of final noise model clusters to effectively reduce the number of noise models that are utilized by the model bank of the speech recognizer to verify system vocabulary words.Type: GrantFiled: October 18, 2000Date of Patent: August 17, 2004Assignees: Sony Corporation, Sony Electronics Inc.Inventors: Duanpei Wu, Lex Olorenshaw, Xavier Menendez-Pidal, Ruxin Chen
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Patent number: 6775730Abstract: A system and method for implementing a flexible interrupt mechanism in an electronic system includes a processor that may initially execute an initialization routine for performing an interrupt configuration procedure. The foregoing interrupt configuration procedure may preferably be initiated when the processor programs a configuration register with certain selectable interrupt parameters that may be utilized to flexibly configure an interrupt module in the electronic system. Internal and external interrupt sources may then subsequently provide various interrupts to the configured interrupt module which may responsively detect and route the interrupts to the processor based upon interrupt information provided during the foregoing interrupt configuration procedure. The processor may then effectively service the interrupts during appropriate interrupt servicing procedures by utilizing corresponding interrupt handler routines.Type: GrantFiled: April 18, 2001Date of Patent: August 10, 2004Assignees: Sony Corporation, Sony Electronics Inc.Inventors: Delmar Marr, Harry Chue, Teiichi Shiga, James A. Chee
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Patent number: 6772147Abstract: A system and method for effectively implementing a personal channel for interactive television comprises a personal channel manager that may include a configuration module, a search module, and a content packaging module. A system user may utilize the configuration module to perform a personal channel configuration procedure to specify personal channel configuration data for performing a content record search procedure. The search module may manage the content record search procedure according to one or more search parameters that may be defined during the personal channel configuration procedure. The search module may selectively locate and access one or more content records from one or more remote content databases during the foregoing content record search procedure. The content packaging module may then responsively coordinate a content record sorting procedure according to user-specified sorting criteria to thereby organize the located content records into a personal channel program.Type: GrantFiled: February 26, 2002Date of Patent: August 3, 2004Assignees: Sony Corporation, Sony Electronics Inc.Inventor: David S. Wang
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Patent number: 6768979Abstract: The noise suppressor utilizes statistical characteristics of the noise signal to attenuate amplitude values of the noisy speech signal that have a probability of containing noise. In one embodiment, the noise suppressor utilizes an attenuation function having a shape determined in part by a noise average and a noise standard deviation. In a further embodiment, the noise suppressor also utilizes an adaptive attenuation coefficient that depends on signal-to-noise conditions in the speech recognition system.Type: GrantFiled: March 31, 1999Date of Patent: July 27, 2004Assignees: Sony Corporation, Sony Electronics Inc.Inventors: Xavier Menéndez-Pidal, Miyuki Tanaka, Ruxin Chen
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Patent number: 6751588Abstract: A method for performing microphone conversions in a speech recognition system comprises a speech module that simultaneously captures an identical input signal using both an original microphone and a final microphone. The original microphone is also used to record an original training database. The final microphone is also used to capture input signals during normal use of the speech recognition system. A characterization module then analyzes the recorded identical input signal to generate characterization values that are subsequently utilized by a conversion module to convert the original training database into a final training database. A training program then uses the final training database to train a recognizer in the speech module in order to optimally perform a speech recognition process, in accordance with the present invention.Type: GrantFiled: November 23, 1999Date of Patent: June 15, 2004Assignees: Sony Corporation, Sony Electronics Inc.Inventors: Xavier Menendez-Pidal, Miyuki Tanaka, Duanpei Wu
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Patent number: 6741794Abstract: A system and method for flexibly blending multiple image planes in a video device comprises a timing controller configured to generate adjusted synchronization signals for pretiming multiple video image planes. The timing controller preferably generates the adjusted synchronization signals in response to programmable delay signals and a master synchronization signal. A blender device then receives and flexibly combines the multiple video image planes to generate a synchronized composite blender output signal. The blender preferably includes a selectable pseudo-output signal that may be routed through an external processing device, and returned as a feedback loop to an external input of the blender device.Type: GrantFiled: January 29, 1999Date of Patent: May 25, 2004Assignees: Sony Corporation, Sony Electronics Inc.Inventors: Tetsuji Sumioka, Shirish Gadre, Tomonari Tohara, Fay Massian
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Patent number: 6728834Abstract: A system and method for effectively implementing isochronous processor cache comprises a memory device for storing high-priority isochronous information, an isochronous cache coupled to the memory device for locally caching the isochronous information from the memory device, and a processor device for accessing and utilizing the isochronous information that is stored in the isochronous cache. The isochronous cache is reserved for storing the isochronous information, and may be reconfigured into a selectable number of cache channels of varying size that each corresponds to an associated isochronous process.Type: GrantFiled: January 27, 2003Date of Patent: April 27, 2004Assignees: Sony Corporation, Sony Electronics Inc.Inventors: Glen D. Stone, Scott D. Smyers, Bruce A. Fairman
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Patent number: 6718302Abstract: A method for utilizing validity constraints in a speech endpoint detector comprises a validity manager that may utilize a pulse width module to validate utterances that include a plurality of energy pulses during a certain time period. The validity manager also may utilize a minimum power module to ensure that speech energy below a pre-determined level is not classified as a valid utterance. In addition the validity manager may use a duration module to ensure that valid utterances fall within a specified duration. Finally, the validity manager may utilize a short-utterance minimum power module to specifically distinguish an utterance of short duration from background noise based on the energy level of the short utterance.Type: GrantFiled: January 12, 2000Date of Patent: April 6, 2004Assignees: Sony Corporation, Sony Electronics Inc.Inventors: Duanpei Wu, Miyuki Tanaka, Ruxin Chen, Lex Olorenshaw
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Patent number: 6678362Abstract: A system and method for effectively managing telephone functionality by utilizing a settop box may preferably include a television coupled to the settop box for displaying television programming from a television programming source, and a telephone coupled to the settop box for receiving telephone calls from a telephone network. The settop box may include a TV mute manager for controlling a television mute mode that may be activated to mute audio programming on the television when receiving incoming telephone calls. The settop box may further include a caller ID manager that controls a caller ID mode that may be activated to display caller identifications on the television when receiving incoming telephone calls. The settop box may also include a phone mute manager that controls a telephone mute mode that may be activated to mute telephone ringing when receiving incoming telephone calls.Type: GrantFiled: January 31, 2002Date of Patent: January 13, 2004Assignees: Sony Corporation, Sony Electronics Inc.Inventors: Yan Hong, Takahiro Fujimori
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Patent number: 6678749Abstract: An apparatus and method for efficiently performing data transfer operations in an electronic system preferably includes a plurality of buffers that may store data and commands during execution of data transfer operations. Initially, at least a portion of a plurality of commands defining data transfer operations between a memory and peripheral devices may be temporarily stored in a command buffer associated with a processor interface. The processor interface may then issue commands directly to a memory interface, peripheral devices, and peripheral interfaces within the electronic system. Commands received by the memory interface may be temporarily stored in a command buffer associated with the memory interface. When a memory associated with the memory interface is ready, the memory interface may access the memory, and transfer data to or from one or more buffers associated with a peripheral device.Type: GrantFiled: June 28, 2001Date of Patent: January 13, 2004Assignees: Sony Corporation, Sony Electronics Inc.Inventors: Praveen K. Kolli, Harry Chue, Mitsuaki Shiraga
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Patent number: 6667988Abstract: A system and method for multi-level context switching in an electronic network comprises a control state machine configured to implement a data priority scheme, a return address generator configured to hold and release return addresses for interrupted instruction modules in accordance with the data priority scheme and context information from the electronic network, and a processor configured to process data from the electronic network in accordance with the data priority scheme and the context information. Receive registers stores data received from the electronic network. The control state machine includes a switch address generator and a program counter select. The switch address generator outputs a switch address, which is an address for a first instruction for a selected-context instruction module. The return address generator holds and releases the return addresses, which are addresses of next consecutive instructions, when an instruction module is interrupted for a context switch.Type: GrantFiled: August 14, 2000Date of Patent: December 23, 2003Assignees: Sony Corporation, Sony Electronics Inc.Inventors: Jung-Jen Liu, Scott Smyers, Bruce A. Fairman, Steve Pham, Jose L. Diaz, Richard A. Bardini