Patents Represented by Attorney, Agent or Law Firm Gregory M. Howison
  • Patent number: 5477166
    Abstract: An integrated circuit with programmable output drive/program pins includes a plurality of output pads (30) which are each operable to interface with a separate and dedicated output driver (38). The output driver (38) is operable to drive an LED output device (14) in an operating mode. In a program mode, the driver (38) is disabled and a program buffer (40) enabled. At the same time, the LED output device (14) is disabled such that no impedance is presented to the output pad (30) due to operation of the LED output device (14). A programming resistor (18) is disposed between the pad (30) and one of three program reference voltages. A first program state is represented when the resistor (18) is tied to ground, a second program state is represented when the resistor (18) is tied to an open circuit and a third program state is represented when the resistor (18) is tied to a positive voltage.
    Type: Grant
    Filed: May 25, 1995
    Date of Patent: December 19, 1995
    Assignee: Benchmarq Microelectronics
    Inventor: Wallace E. Matthews
  • Patent number: 5477347
    Abstract: A holographic storage media for storing digital data in the form of an interference grating is provided which includes a substrate (48) over which a perforated opaque structure (50) is disposed. The opaque structure (50) has wells (52) disposed therein. In the wells, a photopolymer material (54) is disposed to form data storage regions (54). This is covered by a capping layer (56). The wells (52) are chemically and/or optically isolated from each other.
    Type: Grant
    Filed: July 14, 1993
    Date of Patent: December 19, 1995
    Assignee: Tamarack Storage Devices
    Inventors: Stephen R. Redfield, Gerald R. Willenbring
  • Patent number: 5475642
    Abstract: A preamp/driver circuit (18) is disclosed which is operable to interface a Bit Line (14) with a Data Line (20). The Bit Line (14) has a plurality of memory cells associated therewith which are selectable by Word Lines. The preamp/driver (18) decouples the Bit Line (14) from the Data Line (20) and drives Data Line (20) from a separate source. The preamp/driver (18) is comprised of a depletion transistor (22) that has the gate thereof connected to the Bit Line (14) and drives a source follower (26). The source follower (26) drives the Data Line (20) from the supply potential. The system is operable during a restore operation to write back to the Bit Line (14) from the Data Line (20) through a Write transistor (28). The restore operation is effected with a restore amplifier with the Read operation effected through a separate sensing device that converts the voltage on the Data Lines to full logic potentials.
    Type: Grant
    Filed: June 23, 1992
    Date of Patent: December 12, 1995
    Inventor: David L. Taylor
  • Patent number: 5462631
    Abstract: A tape loader has a splicing station including a splicing block whose underside is grooved and provided with perforations constituting vacuum shoes. A slitting head mounts a blade which cooperates with the grooved under surface in slitting tape across its lateral dimension while it is received in its groove retained by vacuum. A splicing arm operates through an orifice in a face plate to splice together two lengths of tape retained in the groove. Operating on the front face of the face plate is a final guide assembly comprising an eccentric plate having a leader tape extraction arm; a bearing block housing a journal into which a cylindrical boss, integral with the plate, is rotatably received; and an internal flange of the boss forming a tooth wheel operably with a belt to apply the output of a motor to drive the plate. The changeover arm is comprised of a cranked changeover arm member mounted to a sleeve secured to a shaft passing through an orifice in the face plate.
    Type: Grant
    Filed: February 1, 1993
    Date of Patent: October 31, 1995
    Inventor: John P. Gardner
  • Patent number: 5459560
    Abstract: A buried electrode drum (48) includes a rigid core (10) over which a controlled durometer layer (12) is disposed. On the surface of the controlled durometer layer (12) is disposed a buried electrode layer (14), having electrodes (16) disposed therein along the longitudinal axis of the drum (48). The electrode layer (14) is covered by a controlled resistivity layer (18). The controlled resistivity layer (18) is operable to be contacted on the surface thereof by an electrode (24) to allow a voltage to be transferred to the underlying electrodes (16) and therefrom along the longitudinal axis of the drum (48). Various electrodes can be disposed about the peripheral edge of the drum (48) to allow any pattern to be formed on the surface of the drum (48).
    Type: Grant
    Filed: December 6, 1993
    Date of Patent: October 17, 1995
    Assignee: T/R Systems, Inc.
    Inventors: Jack N. Bartholmae, E. Neal Tompkins
  • Patent number: 5459790
    Abstract: A head mounted surround sound virtual positioning system that includes a video recorder (200), which is operable to have disposed therein a tape (202), having a surround sound audio track associated therewith. The surround sound system is encoded on two channels, which are output to a Dolby.RTM. decoder (204), which is operable to extract the five surround sound system channels therefrom. The left front, left rear, right front and right rear channels are input to a virtual positioning system (264), which is operable to virtually position each of the speakers relative to the head of the listener (26). These signals are then combined with a combining circuit (268) to provide the virtual positioning of only two speaker lines (58) and (60), disposed adjacent the right and left ears of the listener (26). The speakers (58) and (60) are disposed on the head mounted system such that they are fixed relative to the ear of the listener and slightly forward of the ears and adjacent the head.
    Type: Grant
    Filed: March 8, 1994
    Date of Patent: October 17, 1995
    Assignee: Sonics Associates, Ltd.
    Inventors: William C. Scofield, Stevan O. Saunders
  • Patent number: 5454710
    Abstract: A battery detect circuit (32) is connected to a battery, with the current A battery V:the battery and the current extracted from the battery measured with a sense resistor (50) and convened to charge and discharge voltages with a V/F converter (52). A microcontroller (64) is operable to increment a nominal available charge (NAC) register (180) during a charge operation and to increment a discharge rate counter (DCR) (184) during a discharge operation. The NAC register (180) indicates the available charge, i.e. the charge state of the battery, which value is output to a display (34). The display (34) is controlled to operate in either an absolute full mode or a relative full mode. This is determined by an external programming pin which has first and second programming states associated with the two modes.
    Type: Grant
    Filed: February 8, 1994
    Date of Patent: October 3, 1995
    Assignee: Benchmarg Microelectronics, Inc.
    Inventors: John E. Landau, Wallace E. Matthews, David L. Freeman
  • Patent number: 5451763
    Abstract: Reading data from, writing data to and storing data in an IC card, utilizing an external Read/Write unit. An IC card (12) is provided. The IC card (12) comprises a rigid substrate (86) and electrical components (88) disposed on the substrate. A card coil (32) is provided about the periphery of the substrate (86) and is placed in a coil form (94). Card capacitive plates (24) and (26) are disposed on the bottom of the substrate (86). Power circuitry is provided for receiving inductive power from the card coil (32) and generating a regulated power supply voltage for powering the electrical components (88). I/O circuitry is provided for capacitively coupling data via the card capacitor plates (24) and (26). A cover (130) is also provided for covering the electric components (88) on the substrate (86). An IC card Read/Write unit (14) is provided. The IC card Read/Write unit comprises a receptacle (16) shaped similar to the substrate (86) of the IC card (12).
    Type: Grant
    Filed: July 5, 1994
    Date of Patent: September 19, 1995
    Assignee: Alto Corporation
    Inventors: David R. Pickett, Richard M. Altobellis
  • Patent number: 5452263
    Abstract: A method and apparatus for detecting the location of subterranean pipe includes sensors 24 and 26 which detect seismic energy. A pulsing valve (20) is disposed on one end of a water line (10) to allow water to intermittently flow and be shut off. This results in a water hammer effect which send shock waves (22) outward from the pipe (10). This is detected by the sensors (24) and (26) and then transmitted to a detector (32) to provide a differential indication. The locations of the sensors (24) and (26) will determine the differential balances therebetween such that when the sensors (24) and (26) are directly over the pipe (10), an indication of the location of the pipe is provided. Further, a reference sensor (19) is provided to allow distance measurement along the pipe by measuring the difference between the received energy at sensor (19) and either of sensors (24) or (26).
    Type: Grant
    Filed: December 14, 1993
    Date of Patent: September 19, 1995
    Inventor: Lynn B. Heitman
  • Patent number: 5449112
    Abstract: A flow control device (34) is provided and is interfaced with at least one of the HVAC ducts (14). The flow control device (34) is operable to control the flow of air through the HVAC ducts (14) in response to flow control signals. A flow control command device (24) is disposed proximate to one efferent end (16) of the HVAC duct (14) for generating flow control commands. An ultrasonic transmitter (23) is provided and is coupled to the flow control command device (24). The transmitter (24) is operable to generate and transmit an ultrasonic carrier (26) modulated with the flow control commands to the flow control device (34) through the HVAC duct (14). An ultrasonic receiver (28) is provided for receiving the ultrasonic carrier modulated with the flow control commands and extracting the flow commands therefrom. A control system (30) is provided for converting the flow control commands to flow control signals for transfer to the flow control device (34) to control the operation thereof.
    Type: Grant
    Filed: March 15, 1994
    Date of Patent: September 12, 1995
    Inventors: Lynn B. Heitman, George D. Ezell
  • Patent number: 5440305
    Abstract: A method and apparatus for calibration of errors in a monolithic reference includes a bandgap voltage reference (50) that outputs an untrimmed voltage and a temperature voltage. The untrimmed voltage and temperature voltage are input to a delta-sigma A/D converter (52) which has the output thereof processed through a digital filter (54) to output data on a data bus (58) for storage in an EEPROM (60). The EEPROM (60) is operable in one mode to store temperature history data and, in another mode, to store temperature compensation data. In one mode, temperature compensation parameters are retrieved from the EEPROM (60) and utilized by a multiplier/accumulator circuit (74) to generate compensation factors which are output as a digital word to a DAC (76) for controlling a trim circuit (14). The trim circuit (14) provides a temperature compensation for the output of the bandgap voltage reference (50).
    Type: Grant
    Filed: August 31, 1992
    Date of Patent: August 8, 1995
    Assignee: Crystal Semiconductor Corporation
    Inventors: Bruce D. Signore, Eric J. Swanson
  • Patent number: 5440651
    Abstract: A multi-layered pattern recognition neural network that comprises an input layer (28) that is operable to be mapped onto an input space comprising a scan window (12). Two hidden layers (30) and (32) map the input space to an output layer (16). The hidden layers utilize a local receptor field architecture and store representations of objects within the scan window (12) for mapping into one of a plurality of output nodes. Each of the plurality of output nodes and associated representations stored in the hidden layer define an object that is centered within the scan window (12). When centered, the object and its associated representation in the hidden layer result in activation of the associated output node. The output node is only activated when the character is centered in the scan window (12). As the scan window (12) scans a string of text, the output nodes are only activated when the associated character moves within the substantial center of the scan window.
    Type: Grant
    Filed: April 20, 1993
    Date of Patent: August 8, 1995
    Assignee: Microelectronics and Computer Technology Corp.
    Inventor: Gale L. Martin
  • Patent number: 5440221
    Abstract: A battery detect circuit (32) is connected to the battery with the current input to the battery and extracted from the battery measured with a sense resistor (50) and then converted to charge and discharge pulses with a V/F converter (52). A microcontroller (64) is operable to increment a Nominal Available Charge (NAC) register (180) during a charge operation, and to increment a Discharge Count Register (DCR) (184) during a discharge operation. The NAC register (180) indicates the available charge, which value is output to a display (34). The maximum value to which the NAC value can rise is limited by a value stored in the last measured discharge register (182). This value represents the value stored in the DCR (184) whenever the battery is discharged from an apparent full state to a fully discharged state. This results in a qualified transfer to the LMD register (182) such that no knowledge of the actual battery charge is necessary.
    Type: Grant
    Filed: July 8, 1992
    Date of Patent: August 8, 1995
    Assignee: Benchmarg Microelectronics, Inc.
    Inventors: John E. Landau, Wallace E. Matthews, David L. Freeman
  • Patent number: 5432429
    Abstract: A battery monitoring/control device includes a monitor/control device (35) that is operable to be integrated with a microprocessor system. The system includes a CPU (12) that interfaces with a data bus (14) and an address bus (16). The CPU (12) interfaces through a data line (40) with the control/monitor device (35) and control lines (28) and (34). Commands and data can be input to the control/monitor circuit (35) and data received therefrom. The control/monitor device (35) includes a controller/data register block (36) and a battery charge control/monitor block (44). The device (35) is operable to monitor the battery voltage of a secondary battery (46) during charging thereof and to control the rate of charge through a transistor (66). The battery monitor (90) determines when the voltage on the battery (46) reaches a predetermined level indicating full-charge.
    Type: Grant
    Filed: October 23, 1990
    Date of Patent: July 11, 1995
    Assignee: Benchmarq Microelectronics, Inc.
    Inventors: Gene L. Armstrong, II, William F. Davies, Jr., David L. Freeman
  • Patent number: 5426059
    Abstract: A vertical bipolar structure is fabricated utilizing high energy implant techniques. An epitaxial substrate (10) is first formed of the first conductivity material. A deep implant is formed in the substrate to a first level to form a layer (12) of the first conductivity type. Thereafter, a second implant at a slightly lower energy level is made to provide a second conductivity type layer (14) on top of the layer (12). A third implant of a lower energy of the first conductivity type material is then made to form an even shallower depth layer (16). This is followed by a final lower energy implant to form a second conductivity type layer (18) above the layer (16). This therefore results in a vertical stack of alternating conductivity type layers. The substrate is then patterned and etched to form vertical structures (26) which are disposed in an array with trenches aligned along the columns and the rows.
    Type: Grant
    Filed: May 26, 1994
    Date of Patent: June 20, 1995
    Inventor: Daniel G. Queyssac
  • Patent number: 5426386
    Abstract: The low power voltage comparator with hysteresis includes a comparator (10) that is operable to receive the output from a battery (14) on the positive input thereof and the output of a battery (16) on the negative input thereof. An offset circuit (22) is provided in series with the voltage of the battery (14) and the comparator (10), and an offset circuit (24) is provided between the battery (16) and the comparator (10). The offset circuits (22) and (24) are adjustable by a hysteresis control circuit (26) to offset the voltage thereof for the non-selected battery to be higher than that for the selected battery such that the voltage drop across the offset for the non-selected battery is greater than that for the selected battery. When the voltage on the selected battery falls below the offset voltage of the non-selected battery, the hysteresis control then decreases the offset upon selecting the other battery and increases the offset or the battery that is deselected.
    Type: Grant
    Filed: April 21, 1992
    Date of Patent: June 20, 1995
    Assignee: Benchmarq Microelectronics, Inc.
    Inventors: Wallace E. Matthews, Gene L. Armstrong, II
  • Patent number: D360876
    Type: Grant
    Filed: January 19, 1994
    Date of Patent: August 1, 1995
    Inventor: Richard R. Hughes
  • Patent number: D361484
    Type: Grant
    Filed: December 20, 1994
    Date of Patent: August 22, 1995
    Assignee: Stanley Mechanics Tools
    Inventor: Lowell B. Whitley
  • Patent number: D362904
    Type: Grant
    Filed: July 15, 1994
    Date of Patent: October 3, 1995
    Assignee: General Shelters of Texas, S.B., Inc.
    Inventors: Fred Wulf, Philip Calvert
  • Patent number: D362905
    Type: Grant
    Filed: July 15, 1994
    Date of Patent: October 3, 1995
    Assignee: General Shelters of Texas, S.B., Inc.
    Inventors: Fred Wulf, Philip Calvert