Patents Represented by Attorney Gunnison, McKay & Hodgson, L.L.P.
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Patent number: 7587724Abstract: Systems and method of computer security are provided. In one implementation, a method is provided. The method includes monitoring incoming kernel mode calls and identifying a kernel mode call to verify using a predetermined criterion. The method also includes validating the identified kernel mode call, and processing the kernel mode call in accordance with the results of the validation of the kernel mode call. In another implementation a kernel application programming interface validation device is provided. The kernel application programming interface validation device includes a monitoring engine for monitoring incoming kernel mode calls, an analysis engine operable to examiner kernel mode calls, a validation engine operable to determine if a kernel mode call is valid using the results of the analysis engine, and a processing engine.Type: GrantFiled: July 13, 2005Date of Patent: September 8, 2009Assignee: Symantec CorporationInventor: Yuen-Pin Yeap
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Patent number: 7587582Abstract: A method and apparatus for efficiently performing graphic operations are provided. This is accomplished by providing a processor that supports any combination of the following instructions: parallel multiply-add, conditional pick, parallel averaging, parallel power, parallel reciprocal square root and parallel shifts.Type: GrantFiled: August 16, 2000Date of Patent: September 8, 2009Assignee: Sun Microsystems, Inc.Inventors: Subramania Sudharsanan, Jeffrey Meng Wah Chan, Michael F. Deering, Marc Tremblay, Scott R. Nelson
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Patent number: 7587581Abstract: A processor reduces wasted cycle time resulting from stalling and idling, and increases the proportion of execution time, by supporting and implementing both vertical multithreading and horizontal multithreading. Vertical multithreading permits overlapping or “hiding” of cache miss wait times. In vertical multithreading, multiple hardware threads share the same processor pipeline. A hardware thread is typically a process, a lightweight process, a native thread, or the like in an operating system that supports multithreading. Horizontal multithreading increases parallelism within the processor circuit structure, for example within a single integrated circuit die that makes up a single-chip processor. To further increase system parallelism in some processor embodiments, multiple processor cores are formed in a single die. Advances in on-chip multiprocessor horizontal threading are gained as processor core sizes are reduced through technological advancements.Type: GrantFiled: February 23, 2007Date of Patent: September 8, 2009Assignee: Sun Microsystems, Inc.Inventors: William N. Joy, Marc Tremblay, Gary Lauterbach, Joseph I. Chamdani
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Patent number: 7587084Abstract: A method for identifying anti aliased images of two or three colors makes use of the fact that in most anti-aliasing techniques, the color values of the source images are known with sub-pixel accuracy, e.g., the boundaries of text characters are described with arbitrary high precision and averaging ensures that the destination pixel values are interpolations of the two source colors so that all of the color values of the image lie on a single line, or a single plane, in 3-dimensional color space.Type: GrantFiled: July 15, 2004Date of Patent: September 8, 2009Assignee: Sun Microsystems, Inc.Inventors: Thomas G. O'Neill, Richard G. Fell
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Patent number: 7576401Abstract: An optical module includes an image sensor having an active area and a window mounted directly to the image sensor above the active area. The optical module further includes a mount mounted to the window, the mount supporting a barrel having a lens assembly. By mounting the window directly to the image sensor and the mount directly to the window, the substrate surface area of the optical module is minimized.Type: GrantFiled: July 7, 2005Date of Patent: August 18, 2009Assignee: Amkor Technology, Inc.Inventors: Arsenio de Guzman, Robert F. Darveaux, Young Ho Kim
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Patent number: 7572681Abstract: A method of forming an embedded electronic component package includes coupling a substrate to a first dielectric layer, strip, or panel, and forming first electrically conductive vias and traces in the first dielectric layer. A cavity is then formed in the first dielectric layer and an electronic component is attached in the cavity. A second dielectric layer, strip, or panel, is then applied to the first dielectric layer, thereby encasing the electronic component in dielectric. Second via apertures are then formed through the second dielectric layer to expose selected electronic component bond pads and/or selected first electrically conductive vias and traces. The second via apertures are then filled with an electrically conductive material to form second electrically conductive vias electrically coupled to selected bond pads and selected first electrically conductive vias and traces.Type: GrantFiled: December 8, 2005Date of Patent: August 11, 2009Assignee: Amkor Technology, Inc.Inventors: Ronald Patrick Huemoeller, Sukianto Rusli, David J. Hiner
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Patent number: 7567984Abstract: A target, such as one or more computer systems, is automatically provisioned with the latest available versions of programs, such as an operating system program and/or application programs, in accordance with a selected policy and based on a stored user state package. In some embodiments, user state settings present in the stored user state package are restored to the target. In some embodiments, user confirmation or denial of the selection of a program for installation to the target is requested where the program was not identified in the user state package.Type: GrantFiled: August 31, 2006Date of Patent: July 28, 2009Assignee: Symantec Operating CorporationInventor: Xan Todd
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Patent number: 7565511Abstract: A technique for operating a computing apparatus includes allocating a working register file entry corresponding to a register in a working register file when an instruction referencing the register proceeds through a particular stage of the computing apparatus. The technique maintains the working register file entry until at least a predetermined number of subsequent instructions have similarly proceeded through the particular stage.Type: GrantFiled: June 22, 2006Date of Patent: July 21, 2009Assignee: Sun Microsystems, Inc.Inventors: Shailender Chaudhry, Quinn A. Jacobson, Marc Tremblay
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Patent number: 7564201Abstract: An electronic control circuit for intelligently controlling a gas discharge lamp associated with an HVAC system. The circuit includes a microcontroller having a memory containing instructions executable by the microcontroller to process a plurality of dynamic lamp state signals and dynamically generate control signals in at least partial dependence on a plurality of pre-established control parameters to maintain the gas discharge lamp in a minimum operable state defined by the pre-established control parameters. The gas discharge lamp is coupled to an electronic ballast circuit configured to dynamically control a current flow through the gas discharge lamp in dependence on the dynamically generated control signals sent by the microcontroller. The executable instructions cause the microcontroller to iteratively determine the minimum operable state of the gas discharge tube in at least partial dependence on a voltage excursion included as one of the plurality of dynamic lamp state signals.Type: GrantFiled: August 4, 2006Date of Patent: July 21, 2009Assignee: Clearwater Technology, LLCInventor: Philip J. Steckling
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Patent number: 7552477Abstract: A method makes use of the fact that call modules, such as APIS, making calls to a critical operating system (OS) function are typically called by a call instruction while, in contrast, a RLIBC attack typically uses call modules that are jumped to, returned to, or invoked by some means other than a call instruction. The method includes stalling a call to critical OS function and checking to ensure that the call module making the call to the critical OS function was called by a call instruction. If it is determined that the call module making the call to the critical OS function was not called by a call instruction, the method further includes taking protective action to protect a computer system.Type: GrantFiled: February 23, 2005Date of Patent: June 23, 2009Assignee: Symantec CorporationInventors: Sourabh Satish, Matthew Conover
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Patent number: 7552479Abstract: On start up of a process, a critical imported functions table including resolved addresses of critical imported functions that an application, such as a host intrusion detection system application depends upon to have data integrity, is dynamically allocated and marked read only to impede modification by malicious code. The critical imported functions are hooked so that execution of a call to a critical imported function is made using a corresponding entry in the critical imported functions table rather than an entry in a current process IAT, which may have been modified by malicious code. The current process IAT is evaluated to determine whether it has changed from an initial start up state, in a way that is indicative of an evasion attempt by malicious code. If an evasion attempt is detected, a notification is provided to a user and/or system administrator. Optionally, protective action is taken, such as saving a copy of the current process IAT to permit later analysis of the change.Type: GrantFiled: March 22, 2005Date of Patent: June 23, 2009Assignee: Symantec CorporationInventors: Matthew Conover, Sourabh Satish
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Patent number: 7552356Abstract: In accordance with the invention, a data storage system for fixed content includes one or more peer node computer systems interconnected by a storage system network, where each peer node computer system includes a symmetric storage system application and locally attached storage. A data object is distributively stored on one or more of the one or more peer node computer systems and identified using a unique object identifier. A data object is flexibly stored on the data storage system according to external criteria. Stored data objects are accessible from any of the one or more peer node computer systems. Applications can be executed on the data storage system using data objects that are stored on, being written to, or being read from the data storage system to generate results accessible by a user.Type: GrantFiled: October 12, 2004Date of Patent: June 23, 2009Assignee: Sun Microsystems, Inc.Inventors: Steven Richard Waterhouse, Yaroslav Faybishenko, Sherif M. Botros
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Patent number: 7550857Abstract: A stacked redistribution layer (RDL) die assembly package includes a substrate, a first level RDL die assembly mounted to the substrate and a second level RDL die assembly mounted to the first level RDL die assembly. The first level RDL die assembly includes a first die comprising bond pads, a first fan out support extending outwardly from sides of the first die, and first traces electrically connected to the bond pads, the first traces being supported by the first fan out support. Similarly, the second level RDL die assembly includes a second die comprising bond pads, a second fan out support extending outwardly from sides of the second die, and second traces electrically connected to the bond pads of the second die, the second traces being supported by the second fan out support.Type: GrantFiled: November 16, 2006Date of Patent: June 23, 2009Assignee: Amkor Technology, Inc.Inventors: Joseph Marco Longo, Christopher M. Scanlan
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Patent number: 7549169Abstract: A method includes generating new update name lists and providing malicious code protection update information including the new update name lists to host computer systems. In one embodiment, the new update name lists are generated by registering domain names, and only a subset of the registered domain names are used to create an update name list provided to any one of the host computer systems.Type: GrantFiled: August 26, 2004Date of Patent: June 16, 2009Assignee: Symantec CorporationInventors: William E. Sobel, Peter Szor, Bruce McCorkendale
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Patent number: 7548430Abstract: A method of manufacturing a semiconductor package includes mounting and electrically connecting a semiconductor die to a substrate. The semiconductor die and the substrate are encapsulated to form an encapsulation. Via holes are laser-ablated through the encapsulation and conductive material is deposited within the via holes to form vias. A first buildup dielectric layer is formed on the encapsulation. Laser-ablated artifacts are laser-ablated in the first buildup layer. The laser-ablated artifacts in the first buildup layer are filled with a first metal layer to form a first electrically conductive pattern in the first build up layer. The operations of forming a buildup layer, forming laser-ablated artifacts in the buildup layer, and filling the laser-ablated artifacts with an electrically conductive material to form an electrically conductive pattern can be performed any one of a number of times to achieve the desired redistribution.Type: GrantFiled: August 1, 2006Date of Patent: June 16, 2009Assignee: Amkor Technology, Inc.Inventors: Ronald Patrick Huemoeller, Sukianto Rusli, David Jon Hiner
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Patent number: 7546637Abstract: Information, e.g., a source address, in packets on a network is processed by a geo-location detector The geo-location detector generates a related location identifier, which, for example, is inclusive of one or more source addresses, known or unknown. The location identifier serves as a less precise indicator than the exact location of the system associated with the particular source address of interest, but a more accurate location indicator than was previously available. One of the addresses in a set of source addresses represented by the location identifier is the source address of interest. Although other source addresses represented by the location identifier may not be attacker sources, the location identifier is an identity that can be used as a variable for correlation, trend analysis, or search keys in accessing a network security threat.Type: GrantFiled: November 22, 2004Date of Patent: June 9, 2009Assignee: Symantec CorproationInventors: Paul Agbabian, William E. Sobel
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Patent number: 7543744Abstract: An assembly job tracking system includes tracking devices for employees and inventory sets required for the job. As the inventory moves from assembly location to assembly location, in one embodiment, wireless stations receive data identifying the tracking device and information related to the job. Various techniques for determining the location of the tracking devices include radio frequency signal source triangulation, assembly location specific RFID tags, local wireless stations located in the assembly location, and barcode scanning stations. A system controller and an associated data storage device control the tracking process and record data associated with the assembly job, equipment utilization, and employee efficiency. Based on location determination of the tracking devices, assembly job tracking records start and end times of multiple process steps.Type: GrantFiled: February 24, 2005Date of Patent: June 9, 2009Assignee: Intuit Inc.Inventor: Matt E. Hart
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Patent number: 7543112Abstract: The storage of data line in one or more L1 caches and/or a shared L2 cache of a chip multiprocessor is dynamically optimized based on the sharing of the data line. In one embodiment, an enhanced L2 cache directory entry associated with the data line is generated in an L2 cache directory of the shared L2 cache. The enhanced L2 cache directory entry includes a cache mask indicating a storage state of the data line in the one or more L1 caches and the shared L2 cache. In some embodiments, where the data line is stored in the shared L2 cache only, a portion of the cache mask indicates a storage history of the data line in the one or more L2 caches.Type: GrantFiled: June 20, 2006Date of Patent: June 2, 2009Assignee: Sun Microsystems, Inc.Inventors: Yuan C. Chou, Santosh G. Abraham, Lawrence A. Spracklen
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Patent number: 7540026Abstract: A method includes stalling execution of a model specific register write function to write to a model specific register of a processor having a no-execute processor feature enabled, determining that the model specific register is a no-execute model specific register of the processor, and determining whether a no-execute field in the no-execute model specific register is being altered. Upon a determination that the no-execute field is being altered, the method further includes taking protective action to prevent disabling of the no-execute processor feature.Type: GrantFiled: January 24, 2005Date of Patent: May 26, 2009Assignee: Symantec CorporationInventors: Peter Szor, Peter Ferrie
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Patent number: 7536693Abstract: Incoming requests to a data storage system are distributed among one or more peer node computer systems of the data storage system in accordance with a load spreading configuration. A hash value is computed from the request utilizing selected header information of the request. The hash value is utilized in selecting a peer node computer system to receive the request in accordance with the load spreading configuration, and the request is redirected to the selected peer node computer system. In one embodiment, the load spreading configuration is implemented at a layer 2 switch and the load spreading configuration is reconfigurable by a peer node computer system of the data storage system.Type: GrantFiled: June 30, 2004Date of Patent: May 19, 2009Assignee: Sun Microsystems, Inc.Inventors: Olaf Manczak, Michael Goff, Patrick Gates