Patents Represented by Law Firm Hale and Dorr
  • Patent number: 7867489
    Abstract: A method of treating or preventing a disorder, or a complication of a disorder, of an eye of a subject comprising contacting a vitreous and/or aqueous humor with a composition comprising a truncated form of plasmin comprising a catalytic domain of plasmin (TPCD). TPCDs include, but are not limited to, miniplasmin, microplasmin and derivatives and variants thereof. The methods of the invention can be used to reduce the viscosity of the vitreous, liquefy the vitreous, induce posterior vitreous detachment, reduce hemorrhagic blood from the eye, clear or reduce materials toxic to the eye, clear or reduce intraocular foreign substances from the eye, increase diffusion of a composition administered to an eye, reduce extraretinal neovascularization and any combinations thereof. The method can be used in the absence of, or as an adjunct to, vitrectomy.
    Type: Grant
    Filed: June 5, 2008
    Date of Patent: January 11, 2011
    Assignee: ThromboGenics NV
    Inventors: Steve Pakola, Marc De Smet
  • Patent number: 7868355
    Abstract: A hetero field effect transistor includes: a main semiconductor region including a first semiconductor layer and a second semiconductor layer formed thereon to allow a generation of a two-dimensional carrier gas layer of a first conductive type on a heterojunction interface therebetween; a source electrode formed on the main semiconductor region; a drain electrode formed on the main semiconductor region and separated from the source electrode; a third semiconductor layer of a second conductive type different from the first conductive type, the third semiconductor layer being formed on the second semiconductor layer and located between the source electrode and the drain electrode; and a gate electrode formed on the third semiconductor layer. A concave portion is formed in an upper surface of the second semiconductor layer at a region immediately below the gate electrode.
    Type: Grant
    Filed: February 20, 2009
    Date of Patent: January 11, 2011
    Assignee: Sanken Electric Co., Ltd.
    Inventor: Ken Sato
  • Patent number: 7864936
    Abstract: Methods of avoiding or minimizing cost of stateful connections between application servers (ASs) and S-CSCF nodes in an IMS network with multiple domains. S-CSCF service logic is provided and connected to a co-located AS. The IMS includes a network operator administration domain and an MVNO service domain, and the S-CSCF logic and AS are maintained in the same domain, e.g., the MVNO or network operator domain.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: January 4, 2011
    Assignee: Aylus Networks, Inc.
    Inventors: Shamim A. Naqvi, Prasad S. Dorbala, Ellis L. Wong, Mahesh N. Ganmukhi
  • Patent number: 7863953
    Abstract: Embodiments of the present invention provide a current mode logic circuit, comprising first and second differential switching stages, each stage arranged being arranged to receive a plurality of clock signals, such that the first and second differential switching stages respond to a combination of the plurality of clock signals.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: January 4, 2011
    Assignee: Jennic Limited
    Inventor: Kim Li
  • Patent number: 7858185
    Abstract: Certain spin-coatable liquids and application techniques are described, which can be used to form nanotube films or fabrics of controlled properties. A spin-coatable liquid for formation of a nanotube film includes a liquid medium containing a controlled concentration of purified nanotubes, wherein the controlled concentration is sufficient to form a nanotube fabric or film of preselected density and uniformity, and wherein the spin-coatable liquid comprises less than 1×1018 atoms/cm3 of metal impurities. The spin-coatable liquid is substantially free of particle impurities having a diameter of greater than about 500 nm.
    Type: Grant
    Filed: June 3, 2004
    Date of Patent: December 28, 2010
    Assignee: Nantero, Inc.
    Inventors: Rahul Sen, Ramesh Sivarajan, Thomas Rueckes, Brent M. Segal
  • Patent number: 7859385
    Abstract: Resistive elements include a patterned region of nanofabric having a predetermined area, where the nanofabric has a selected sheet resistance; and first and second electrical contacts contacting the patterned region of nanofabric and in spaced relation to each other. The resistance of the element between the first and second electrical contacts is determined by the selected sheet resistance of the nanofabric, the area of nanofabric, and the spaced relation of the first and second electrical contacts. The bulk resistance is tunable.
    Type: Grant
    Filed: April 29, 2008
    Date of Patent: December 28, 2010
    Assignee: Nantero, Inc.
    Inventors: Claude L. Bertin, Thomas Rueckes, Brent M. Segal, Jonathan W. Ward
  • Patent number: 7861110
    Abstract: A system, method, and adapter for creating fault-tolerant communication busses from standard components, are described. Fault-tolerant interface logic is provided for transmitting and receiving system health and system management signals to and from a module that is designed to be connected to a single RS-485 bus. The fault-tolerant interface logic enables the module to selectively communicate via at least two redundant half-duplex, multipoint, differential RS-485 busses. The fault-tolerant interface logic includes a first RS-485 transceiver connected to a first RS-485 bus, a second RS-485 transceiver connected to a second RS-485 bus, selector logic responsive to a control signal for selecting one of the first and the second busses to receive signals from and for transmitting the received signals to the module, and software logic executable on a baseboard management controller (BMC) chip.
    Type: Grant
    Filed: April 30, 2008
    Date of Patent: December 28, 2010
    Assignee: Egenera, Inc.
    Inventors: Neil Haley, Paul Curtis, Michael T. Ferrari
  • Patent number: 7859311
    Abstract: Hybrid switching devices integrate nanotube switching elements with field effect devices, such as NFETs and PFETs. A switching device forms and unforms a conductive channel from the signal input to the output subject to the relative state of the control input. In embodiments of the invention, the conductive channel includes a nanotube channel element and a field modulatable semiconductor channel element. The switching device may include a nanotube switching element and a field effect device electrically disposed in series. According to one aspect of the invention, an integrated switching device is a four-terminal device with a signal input terminal, a control input terminal, a second input terminal, and an output terminal. The devices may be non-volatile. The devices can form the basis for a hybrid NT-FET logic family and can be used to implement any Boolean logic circuit.
    Type: Grant
    Filed: July 21, 2009
    Date of Patent: December 28, 2010
    Assignee: Nantero, Inc.
    Inventor: Claude L. Bertin
  • Patent number: 7858979
    Abstract: A method of forming an aligned connection between a nanotube layer and a raised feature is disclosed. A substrate having a raised feature has spacers formed next to the side of the raised feature. The spacers are etched until the sidewalls of the raised feature are exposed forming a notched feature at the top of the spacers. A patterned nanotube layer is formed such that the nanotube layer overlies the top of the spacer and contacts a side portion of the raised feature in the notched feature. The nanotube layer is then covered with an insulating layer. Then a top portion of the insulating layer is removed to expose a top portion of the etched feature.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: December 28, 2010
    Assignee: Nantero, Inc.
    Inventors: Colin D. Yates, Christopher L. Neville, Thomas Rueckes, Steven L. Konsek, Mitchell Meinhold, Claude L. Bertin
  • Patent number: 7855403
    Abstract: Hybrid carbon nanotube FET (CNFET), static ram (SRAM) and method of making same. A static ram memory cell has two cross-coupled semiconductor-type field effect transistors (FETs) and two nanotube FETs (NTFETs), each having a channel region made of at least one semiconductive nanotube, a first NTFET connected to the drain or source of the first semiconductor-type FET and the second NTFET connected to the drain or source of the second semiconductor-type FET.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: December 21, 2010
    Assignee: Nantero, Inc.
    Inventors: Claude L. Bertin, Mitchell Meinhold, Steven L. Konsek, Thomas Rueckes, Frank Guo
  • Patent number: 7856226
    Abstract: Under one aspect, a system generates dynamic call models within an IMS network, allowing different user entities (UEs) to have different service experiences. The IMS network includes application servers (ASs) and a serving call state control function (S-CSCF) that receives and then forwards UE service requests. The system includes storage media storing a service tree, which defines potential call models that map potential UE service requests onto ASs. At least two potential call models map a specified potential UE service request onto different ASs that can provide different service experiences. The system includes control logic for providing session control, which receives UE service requests from the S-CSCF, receives the service tree from the storage media, generates a call model for each UE based on potential call models defined by the service tree and on the requested service, and invokes a specified AS based on the generated call model.
    Type: Grant
    Filed: April 17, 2007
    Date of Patent: December 21, 2010
    Assignee: Aylus Networks, Inc.
    Inventors: Ellis L. Wong, Shamim A. Naqvi, Anju Day
  • Patent number: 7855982
    Abstract: A system and method for providing services to packet flows in a communication network. The services include enhanced charging, stateful firewalls, traffic performance optimization (TPO) and advanced services such as content differentiated charging, per-subscriber stateful firewalls, and VPNs, for example. A gateway can be used to route each packet flow through the services on a per-subscriber basis by inspecting accounting messages and checking subscriber profiles prior to setting up a new packet flow session. By directing the packet flow through the services requested latency can be reduced as well as the need to have equipment for each session regardless of whether the service is provided to the packet flow. The services can be provided in-line as well.
    Type: Grant
    Filed: November 19, 2007
    Date of Patent: December 21, 2010
    Inventors: Rajesh Ramankutty, Sanil Kumar Puthiyandyil, Timothy G. Mortsolf, Matthew H. Harper
  • Patent number: 7856234
    Abstract: The invention features a method of estimating an expected error of a position estimate for use in a WLAN positioning system that estimates the position of a WLAN-enabled device. The WLAN-enabled device receives signals transmitted by a WLAN access point in range of the WLAN-enabled device. The method estimates the position of the WLAN-enabled device based on the received signals from the WLAN access point in range of the WLAN enabled device. The method also estimates an expected error of the position estimate based on characteristics of the WLAN access point in range of the WLAN enabled device, wherein the expected error predicts a relative accuracy of the position estimate.
    Type: Grant
    Filed: January 22, 2007
    Date of Patent: December 21, 2010
    Assignee: Skyhook Wireless, Inc.
    Inventors: Farshid Alizadeh-Shabdiz, Edward J. Morgan
  • Patent number: 7853085
    Abstract: A method and system for detecting a source multifeatured three-dimensional object from two-dimensional source imagery, and for locating a best-matching three-dimensional object from a candidate database of such objects by performing a viewpoint and lighting invariant search among the candidate objects. The invention further includes the method and system for determining the optimally-fitting viewpoint, lighting, and deformation of the located three-dimensional candidate and basing an identification of the candidate with the source on the quality of fit between projections of the candidate and the source imagery.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: December 14, 2010
    Assignee: Animetrics, Inc.
    Inventor: Michael Miller
  • Patent number: 7852114
    Abstract: Field programmable device (FPD) chips with large logic capacity and field programmability that are in-circuit programmable are described. FPDs use small versatile nonvolatile nanotube switches that enable efficient architectures for dense low power and high performance chip implementations and are compatible with low cost CMOS technologies and simple to integrate.
    Type: Grant
    Filed: August 6, 2009
    Date of Patent: December 14, 2010
    Assignee: Nantero, Inc.
    Inventors: Claude L. Bertin, Brent M. Segal
  • Patent number: 7847588
    Abstract: Field programmable device (FPD) chips with large logic capacity and field programmability that are in-circuit programmable are described. FPDs use small versatile nonvolatile nanotube switches that enable efficient architectures for dense low power and high performance chip implementations and are compatible with low cost CMOS technologies and simple to integrate.
    Type: Grant
    Filed: August 6, 2009
    Date of Patent: December 7, 2010
    Assignee: Nantero, Inc.
    Inventor: Claude L. Bertin
  • Patent number: 7847188
    Abstract: A method of applying a premold to a cable. The cable may have a plurality of shielded pairs, where the shielded pairs have conductors. A premold is applied to the cable, where the shielded pairs are aligned within the premold. A deformable material is wrapped over the premold. A shell is applied over the deformable material. The premold is sufficiently hard so as to protect the conductors from deformation when applying the shell. A portion of the conductors may be deformed before being welded.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: December 7, 2010
    Assignee: Volex Group P.L.C.
    Inventors: Yao-Hsuan Liu, Atul Sharma, Yuhtseng Chew
  • Patent number: 7841718
    Abstract: The invention administers an objective clinical test to an eye that measures the visual sensitivity of the superior retina and the inferior retina, by alternately presenting a stimulus pair comprising a shaped superior light stimulus and a shaped inferior light stimulus that are horizontal mirror images of one another and have shapes encompassing visual field defects. The shaped superior and inferior light stimuli stimulate pupillary responses whose amplitudes are measured. A cycle-averaged pupillary response balance and a luminance ratio are computed for each presentation of a stimulus pair. A stimulus pair response curve is computed by fitting cycle-averaged pupillary response balances to a sigmoid function of the luminance ratios. A balanced luminance ratio at which the cycle-averaged pupillary response balance is equal to about zero is computed from the sigmoid function. The balanced luminance ratio is indicative of the presence and location of retinal nerve damage.
    Type: Grant
    Filed: April 24, 2009
    Date of Patent: November 30, 2010
    Assignee: The Research Foundation of State University of New York
    Inventor: Harry J. Wyatt
  • Patent number: 7842420
    Abstract: Materials useful as electrodes for lithium batteries have very good electronic and ionic conductivities. They are fabricated from a starting mixture which includes a metal, a phosphate ion, and an additive which enhances the transport of lithium ions in the resultant material. The mixture is heated in a reducing environment to produce the material. The additive may comprise a pentavalent metal or a carbon. In certain embodiments the material is a two-phase material. Also disclosed are electrodes which incorporate the materials and lithium batteries which incorporate those electrodes.
    Type: Grant
    Filed: February 2, 2006
    Date of Patent: November 30, 2010
    Assignee: A123 Systems, Inc.
    Inventors: Michael R. Wixom, Chuanjing Xu
  • Patent number: 7837338
    Abstract: A mirror mounting assembly for mounting a mirror on a vehicle bulkhead. The assembly includes a mirror element and a main support arm having a first end and a second end. The mirror element is connected to the first end of the main support arm. The second end of the main support arm is mountable to the vehicle. A pair of brackets are configured to conform to an engine bay side wall of the vehicle. Each bracket has a center portion and two laterally extending flanges that extend at an angle from the center portion in opposite directions. One of the flanges of each bracket is connectable to the bulkhead of the vehicle in the engine bay. A first additional support arm has a first end connected to a first one of the brackets and a second end connected to the main support arm. A second additional support arm has a first end connected to the main support arm and a second end connectable to the vehicle.
    Type: Grant
    Filed: June 26, 2008
    Date of Patent: November 23, 2010
    Assignee: Rosco, Inc.
    Inventor: Benjamin Englander