Abstract: An integrated circuit device having a select circuit, a summing circuit and a phase mixer. The select circuit selects one of a plurality of offset values as a selected offset. The summing circuit sums the selected offset with a phase count value, the phase count value indicating a phase difference between a reference clock signal and a first plurality of clock signals. The phase mixer combines the first plurality of clock signals in accordance with the sum of the selected offset and the phase count value to generate an output clock signal.

Abstract: An interface engine provides animated views in a user interface. The interface engine directs the operation of a rendering environment to create an interface in a rendering area. The interface engine includes views, layouts, animators, and constraints. Views identify child views and resources for display in the rendering area. In response to events, such as user inputs, a view modifies itself by calling layouts, animators, and constraints. A layout manages the attributes of a view's child views, including child view position and size. An animator modifies the view's appearance over a specified period of time. A constraint imposes limits on view properties. In one implementation, an Internet site delivers an interface engine to a browser to supply content and a user interface. A presentation server compiles an interface engine description and specified resources into an interface engine.

Abstract: A device, a system, a computer readable medium and a method provide status information of a device and/or devices in a short distance wireless network in an embodiment of the present invention. Status information, such as the quality of the received signal and/or available battery power of each device in the short distance wireless network is provided to a device having a display according to an embodiment of the present invention. Status information may be selectively displayed in an easily viewable and preferable type in an embodiment of the present invention.

Abstract: An integrated circuit device having a select circuit, a summing circuit and a phase mixer. The select circuit selects one of a plurality of offset values as a selected offset. The summing circuit sums the selected offset with a phase count value, the phase count value indicating a phase difference between a reference clock signal and one of a first plurality of clock signals. The phase mixer combines the first plurality of clock signals in accordance with the sum of the selected offset and the phase count value to generate an output clock signal.

Abstract: A novel workpiece engaging nose body for holding a screwstrip having screws held in a strap is provided. The workpiece engaging nose body includes a nose portion and a rear portion with the nose portion slidably mounted on the rear portion for movement rearwardly when the nose is urged into a workpiece to drive a screw. An exitway is defined between the nose portion and rear portion through which spent strap from which screws have been driven exit the nose body. On urging the nose body into the workpiece, the nose portion slides rearwardly to engage the strap in the exitway and move it rearwardly into engagement with the rear portion in the exitway. The strap is preferably “pinched” in the exitway between the nose portion and rear portion to assist in locating a screw to be driven from the nose body.

Abstract: A method for transferring public information to a private information store maintained by a private information space manager. The method may include the steps of selecting public information from a public information source; initiating a sync request by selecting a sync request button on the public information web site; and identifying the private information space were the public information is to be stored. In a further aspect, the invention comprises a system for synchronizing public content from a public information web site to a private information store. The system may include a sync enable button on the public information web site; a pop-up window provided by a private information store provided responsive to the sync enable button on the public information web site; and a sync interface transfer button on the pop-up window initiating transfer of the public information to the private information store.

Abstract: A server machine receives an input string of characters from a client machine, and the string includes at least one abbreviated substring preceded and followed by word delimiters. Each abbreviated substring represents an expanded substring. The server machine automatically finds one of the abbreviated substrings based on the preceding and following word delimiters, determines that it is one of a set of abbreviated substrings, and produces an expanded version of the string of characters with the abbreviated substring replaced by its expanded substring. The case of the beginning character of the expanded substring can be the same as that of the abbreviated substring. The expanded substring can depend on time, such as the current time.

Abstract: A system and method for performing data transfers within a computer system is provided. The system includes a controller configured to dynamically adjust the interleave of the communications required to perform a series of data transfer operations to maximize utilization of the channel over which the communications are to be performed. The controller is able to vary the time interval between the transmission of control information that requests a data transfer and the performance of the data transfer by signaling the beginning of the data transfer with a strobe signal sent separate from the control information. The controller is able to defer the determination of how much data will be transferred in the operation by initiating the termination of a data transfer with a termination signal. The method provides a technique for distinguishing between identical control signals that are carried on the same line.

Abstract: Clock alignment circuits and techniques for reducing power dissipation, increasing power supply noise immunity, decreasing process and temperature variation sensitivity, and providing a wide operating range. A power supply generator generates an isolated supply voltage for a delay line used in a clock alignment circuit. The delay line generates a delayed clock from a reference clock. A comparator detects a correction information (i.e., delay or phase error) between the delayed clock and the reference clock and generates error information representative of the correction information. A charge pump circuit converts the error information into a voltage signal, wherein the voltage signal is a scaled representation of the error information.

Abstract: A change log aggregation and optimization mechanism and methodology for updating and synchronizing application data and application files in a client device of a data transfer and synchronization system. The contents of a plurality of change logs reflecting the then current changes to the application data of the client device are downloaded and merged into an aggregate log. Instead of applying each change log as it is downloaded, the contents of the aggregate log, representing all changes to application data and/or application files recorded in prior change logs, are then applied to the client device to update application data and/or application files in the client device.

Abstract: A locked loop circuit having a clock hold function. The locked loop circuit includes a select circuit, phase mixing circuit, hold signal generator and latch circuit. The select circuit selects one of a plurality of phase values in response to a select signal, and the phase mixing circuit generates a first clock signal having a phase angle according to the selected phase value. The hold signal generator asserts a hold signal in response to a transition of the select signal, and the latch circuit latches the state of the first clock signal in response to assertion of the hold signal.

Abstract: In a non-volatile semiconductor memory system (or other type of memory system), a memory cell is programmed by changing the threshold voltage of that memory cell. Because of variations in the programming speeds of different memory cells in the system, the possibility exists that some memory cells will be over programmed. That is, in one example, the threshold voltage will be moved past the intended value or range of values. The present invention includes determining whether the memory cells are over programmed.

Abstract: In a non-volatile semiconductor memory system (or other type of memory system), a memory cell is programmed by changing the threshold voltage of that memory cell. Because of variations in the programming speeds of different memory cells in the system, the possibility exists that some memory cells will be over programmed. That is, in one example, the threshold voltage will be moved past the intended value or range of values. The present invention includes determining whether the memory cells are over programmed.

Abstract: An apparatus having a dual rail regulated reference loop. The reference loop includes a delay circuit powered by upper and lower supply voltages to generate a plurality of reference clock signals, and a voltage regulation circuit to adjust the upper and lower supply voltages according to a phase difference between a selected pair of the reference clock signals.

Abstract: A method is described for providing a memory with a serial sequence of write enable signals that are offset in time with respect to respective data received by a plurality of data inputs of the memory. A memory is also described with an array for data storage, a plurality of data input pins, and a separate pin for receiving either additional data or a serial sequence of write enable signals applicable to data received by the plurality of data input pins. The additional data that the separate pin can receive includes, for example, error detection and correction (EDC) information. A method is also described for multiplexing write enable information and error detection and correction information.

Abstract: A system is disclosed for blending two image that makes use of a color map which indicates colors in a foreground can be mixed with the background and how much of each source to mix. One embodiment of the invention restricts the use of the color map to only pixels in the foreground that correspond to a graphic (or effect) in the background. Another embodiment makes use of a gray scale matte which stores blending values for each pixel in the foreground.

Abstract: A circuit, apparatus and method for efficiently and accurately calibrating an output driver current are provided in embodiments of the present invention. In an embodiment of the present invention, a circuit comprises a first digital-to-analog converter (“DAC”) that generates a first current. A first transistor is coupled to the first DAC and generates a first biasing current responsive to the first current. A second DAC is coupled to the first transistor and generates a first control current responsive to the first biasing current. According to an embodiment of the present invention, the first and second DACs are binary weighted control DACs. According to an embodiment of the present invention, the binary weighted values of the second DAC are obtained in response to a calibration signal generated by a controller. According to an embodiment of the present invention, the first DAC is an M-bit DAC and the second DAC is an N-bit DAC, wherein M is less than N.

Abstract: A method, system, and computer readable medium allows a user to select an output signal for device/terminal in short distance wireless network. In embodiments of the present invention, the output signal is a ring tone, alarm, background image, vibration signal, font type, or portion of a motion picture. In embodiments of the present invention, a system comprises a first and second device, in a short distance wireless network, generating a first and second output signal. A cellular device generates a first and a second short-range radio signals responsive to a cellular signal from a cellular network. The cellular signal includes a first multimedia file for the first device and a second multimedia file for the second device. In an embodiment of the present invention, the first multimedia file and second multimedia file are thematically related. In an embodiment of the present invention, a processing device is coupled to the cellular network and stores the first and second multimedia files.

Abstract: A secure agent system for communicating with a secure remote access system is disclosed. The agent system is suitable for execution on a base device which is configured to be coupled to the internet. The agent system initiates data communication with the remote access system by sending requests and receiving replies from the remote access system. The replies may include requests to retrieve, store, update, and/or delete data associated with the base device, which the agent system carries out. The agent system further provides reply data to such requests to the remote access system.

Abstract: One or more programming operations are performed on a set of non-volatile storage elements. For example, the programming operations may include applying a set of programming pulses. A verify process is performed to determine which of the non-volatile storage element have reached an intermediate verify threshold but have not reached a final verify threshold. One additional programming operation at a reduced level is performed for the non-volatile storage elements that have reached the intermediate verify threshold but have not reached the final verify threshold, and those non-volatile storage elements are then inhibited from further programming. Non-volatile storage elements that have not reached the intermediate verify threshold continue programming. Non-volatile storage elements that reach the final verify threshold are inhibited from programming.