Abstract: A pair of input field effect transistors are arranged as a differential pair having an electrode of each connected in common and connected in turn to a circuit common by means of a third field effect transistor. A pair of output field effect transistors are coupled to the input field effect transistors and have an electrode of each connected in common and coupled to the gate of the third field effect transistor, thereby providing an amplifier which relatively insensitive to change in the threshold voltage of the field effect transistors.

Abstract: Ultrasonic remote control receiver wherein reference frequency pulses are counted during a counting cycle comprising a predetermined number of received command signals, each command signal occupying a different frequency channel. At the end of each counting cycle, the reference frequency count is compared with the count during the preceding counting cycle. A validated output from the receiver occurs only after a predetermined number of uninterrupted identical comparisons have occurred. Interference with a validated output signal by spurious received signals e.g. noise signals is minimized by providing for invalidation of an output signal only after a predetermined number of uninterrupted non-identical count comparisons. Two of the receiver outputs are used to generate a variable duty cycle pulse train, one output increasing and the other decreasing the duty cycle. A receiver is disclosed in the context of a TV broadcast receiver wherein the variable level d.c.

Abstract: A remote control receiver for producing different control signals in response to operating signals of respectively different frequencies. The receiver includes operating signal frequency counter which counts operating frequency oscillations in repeated counting cycles and produces an output signal when a predetermined count has been reached. The output signal controls a reference frequency counter which counts the number of reference frequency oscillations in each counting cycle. The count of the reference frequency counter reached during each counting cycle is stored and at the end of each counting cycle, a comparator compares the current count of the reference frequency counter with the stored count. The comparator produces a signal indicating agreement or non-agreement of the compared counts.

Abstract: A small programmable memory means such as an electrically programmable logic array is incorporated on the chip of a conventional bit addressable random access memory or other cell addressable array circuit. The array has one or more superfluous rows and/or columns of cells held in reserve. Processing and testing of the chip is conducted in a conventional manner. Chips with faulty cells are corrected by programming the memory means with the cell addresses of the faulty cell locations. Subsequently, the memory means will respond to any of these addresses and, through interaction with either the address decoding logic or input/output logic, cause a reserve cell or the contents thereof to be selected instead of the faulty cell.

Abstract: This disclosure relates to methods of producing thin layers of silicon as well as thin layers of silicon on insulating substrates such as silicon dioxide or polycrystalline silicon by forming either an n- layer of single crystal silicon over a p++ layer of single crystal silicon or a p- layer of single crystal silicon over an n++ layer of single crystal silicon and then removing either the n++ or p++ single crystal substrate, as the case may be, by utilizing an etch which will only etch the n++ or p++ region and will stop when the n- or p- region, as the case may be, has been reached.

Abstract: The high-expansion layer of a metallic multilayer thermostatic material is composed of a high-resistance alloy, known as alloy P, which comprises approximately 72% manganese, 18% copper, and 10% nickel. This alloy is used when high flexivity is desired with high resistance in a bimetal or like thermostat. This layer, as an outside layer of the composite, is provided with a thin cladding of a material such as copper, nickel, a cupronickel alloy or the like, on its outside which is to be exposed when the alloy layer is combined in various combinations by solid-phase bonding with other comparatively low-expansion layers to form multilayer thermostats.

Abstract: A method of making a light polarizing material having excellent polarization characteristics over wavelengths from the visible to the infrared (IR) region is disclosed. A smooth surface of an optical material, such as for example glass, plastic or IR transmitting material, is mounted in a vacuum enclosure and a vaporized material or metal is directed onto the surface. The metal may be gold, silver, copper or aluminum, for example, or any other material or combination thereof which is reflective at the wavelength to be polarized. As the deposition occurs on the surface, metal atoms are initially attached to sites on the surface with metal whiskers forming on the initial sites in the direction of the incident vaporized metal. The metal whiskers are grown with their long axis essentially parallel to the vaporized metal direction and essentially parallel to each other.

Abstract: A transform structure employing surface wave devices performs Fourier transform operations on a time-limited substantially band limited signal. The output signal of the transform structure is related to the Fourier transform of the input signal in a manner which permits forming the product of this output with a similar output of a second transform structure. This product is inverted by a third transform structure so as to provide the convolution of the two original input functions. The overall structure comprises a filter apparatus readily programable in either the time or frequency domain.

Abstract: A random access memory device of the MOS integrated circuit type using an array of one-transistor storage cells employs bistable sense amplifier circuits, one located in the center of each column line. The bistable circuits have current-limiting control devices in series therewith and the control devices are selected by the address circuits in a manner such that during an initial sensing period the current is low, then during a later period more current may be permitted for a higher level output. In parts of the array which are not being accessed by the current address, the increased current level is not permitted, thus reducing power dissipation.

Abstract: A microwave amplifier is disclosed using a nonreciprocal three port junction circulator. The amplifier uses a ferrite circulator having an input port, an output port and a third electrical port. A semiconductor device such as an IMPATT diode having negative resistance is located adjacent and electrically coupled to the third electrical port. The negative resistance of the IMPATT diode combines with the output response of the third electrical port of the circulator to provide power amplification of microwave signals received on the input port.

Abstract: Disclosed is a vapor deposition reactor comprising a series of individual gas cells respectively isolated from each other and containing a particular reactive or non-reactive gas required for one stage in a deposition process. Each cell is provided with an independent temperature control. A substrate is mounted on a carrier and transported through the series of individual cells so that vapor depositions or other related processes may be conducted or performed upon the substrate. Chemical vapor deposition processes such as growth of epitaxial layer, deposition of polycrystalline silicon, nitride, oxide or metals on a substrate may be performed within the reactor. The cells are isolated by viscous loss seals formed by the propinquity of restricted openings in the reactor to substrate carrier configuration.

Abstract: A computing system includes a central processor unit (CPU) in combination with external memory units. The CPU includes, on a single chip, an arithmetic logic unit (ALU), an instruction register, a random access memory and a control system. Interconnection of the functional elements of the CPU is accomplished via sequential use of a common parallel buss. The ALU contains precharged parity and carry propagate circuits which enhance circuit speed. The precharged circuits are formed using conventional insulated-gate-field-effect transistor fabrication techniques.

Abstract: Disclosed is an improved air gun construction which lends itself to use with a plurality or array of similarly improved air guns which enables easy synchronization and timing of such array of air guns relative to one another. The synchronization and timing is achieved by controlling and monitoring the movement of the shuttle in the air gun. Various sensors are used such as an electrical coil having a constant current flowing therein which produces a flux pattern which is modified when the shuttle is accelerated, thereby inducing a voltage in said coil which is processed by appropriate processing circuitry. Another embodiment employs a magnetic sensor which includes a permanent magnet and coil wrapped therearound; the permanent magnet produces a flux pattern which is altered when the shuttle is accelerated and comes into proximity to the sensing end of said permanent magnet, thereby inducing a voltage in the coil which is then processed in appropriate processing circuitry.

Abstract: A calculator system, implemented on at least one semiconductor chip and having a read-only-memory for storing a plurality of program instructions, has a multi-function memory instruction register. The instruction register has a parallel input for receiving a selected program instruction from the memory, and preferably a parallel output for transmitting the program instruction to a decoder. The instruction register also has a serial output connected to a buffer. The memory is addressed by an address register which also provides a code indicative of whether or not the addressed program instruction is to control the calculator system. When the addressed program instruction is to control the system, the code has preselected setting and the program instruction is read out of the instruction register through the buffer and is sequentially serially re-entered into the instruction register via a serial input. Thereafter, the program instruction is read out of the instruction register to be decoded by the decoder.

Abstract: A continuous gate electrode overlies the channel of the CCD and is connected to a uniphase clock pulse source for operation of the CCD. Pairs of gate conductor-insulator-semiconductor regions are defined along the channel. In each pair of regions the surface potential-gate voltage characteristic of one region intersects that of the other region, such that in the OFF condition of a clock pulse the potential well at one region of each pair is deeper than that of the other region; in the ON condition of a clock pulse, this situation is reversed. In this manner, charge packets are propagated along the channel and unidirectionality is achieved by locally implanted potential wells or potential barriers in each of the aforesaid regions.

Abstract: A small programmable memory means such as an electrically programmable logic array is incorporated on the chip of a conventional bit addressable random access memory or other cell addressable array circuit. The array has one or more superfluous rows and/or columns of cells held in reserve. Processing and testing of the chip is conducted in a conventional manner. Chips with faulty cells are corrected by programming the memory means with the cell addresses of the faulty cell locations. Subsequently, the memory means will respond to any of these addresses and, through interaction with input/output logic, cause the data input and/or output to be steered to or from a reserve cell instead of the addressed faulty cell.

Abstract: An improved Vuilleumier cycle refrigerator is disclosed. To reduce fluid contamination and inactive refrigerant volume, the hot and cold fluid displacers of the refrigerator are driven by a magnetic drive mechanism. The magnetic drive mechanism has a first and second assembly. The first assembly is contained in the fluid chamber together with the hot and cold displacers; the second assembly including the drive motor is mounted exteriorly of the fluid chamber. The first and second assemblies of the drive mechanism include adjacent magnets separated by the wall of the fluid chamber. Thus, the first and second assemblies are coupled together by their magnetic field for rotation to drive the hot and cold displacers and the fluid chamber provides an hermetic seal to contain the working fluid thereby removing the motor with its air space and contaminants from the fluid chamber.

Abstract: An insulated gate field effect transistor having a self-aligned gate, reduced capacitance, and lower surface step heights is fabricated with the use of a silicon nitride layer which serves first as a diffusion mask, than as an oxidation barrier, and ultimately as a gate dielectric. In an alternate embodiment, lower threshold voltages are achieved by replacing the initial gate dielectric with a thinner dielectric having a reduced surface state density.

Abstract: A laser system for selectively producing, in response to electronic signals, laser pulses at random intervals and of preselected and variable energy, including a laser cavity capable of being electronically controlled to effect a selectively variable gain. An acousto-optic deflector is disposed in the laser cavity and the amount of acoustic energy applied to the deflector controls the amount of radiation feedback to the laser rod and thus controls the Q or gain of the laser system to any of a wide range of selectable values.