Patents Represented by Law Firm Harry M. Weiss & Associates
  • Patent number: 5565381
    Abstract: This disclosure is directed to a method of producing a smooth surface for a dielectric coating that is located above the surface of a semiconductor substrate containing doped regions of a semiconductor device. Sharp edges formed in the dielectric coating during certain semiconductor processing steps are removed using a deposition process to deposit a separate insulating layer on the dielectric coating containing the sharp edges followed by an annealing operation and the subsequent removal of the separate insulating layer to permit the subsequent formation of electrodes on a smooth surface of the dielectric coating.
    Type: Grant
    Filed: August 1, 1994
    Date of Patent: October 15, 1996
    Assignee: Microchip Technology Incorporated
    Inventor: Daniel J. Jackson
  • Patent number: 5560434
    Abstract: A cutting hoe and method wherein a handle is connected to a cutting head that has a cutting surface along a substantially 360 degree cutting portion circumscribing the cutting head thereby permitting cutting in any direction. In one embodiment, a star configuration is provided for the cutting head which is, for example, a four pointed star-shaped configuration. In other embodiments substantially circular and rectangular (i.e. square) shaped cutting head configurations are disclosed.
    Type: Grant
    Filed: March 13, 1995
    Date of Patent: October 1, 1996
    Inventor: Donald A. Janik
  • Patent number: 5561761
    Abstract: A Central Processing Unit (CPU) debugging device and method therefor is disclosed which provides data entering and interrogating devices which will temporarily stop all CPU execution when desired by a user and allow a non-destructive intrusion into the contents of any of the CPU internal registers, state bits, and cache and local memories. After the desired CPU contents have been reviewed and subsequently altered or maintained by a user, the CPU execution may be resumed.
    Type: Grant
    Filed: September 1, 1995
    Date of Patent: October 1, 1996
    Assignee: YLSI Technology, Inc.
    Inventors: Gary D. Hicok, Judson A. Lehman, Thomas Alexander, Yong J. Lim, David R. Evoy, Yongmin Kim
  • Patent number: 5559533
    Abstract: A hardware cursor is implemented on a typical video display controller, and uses an unused portion of video RAM as cursor memory to store the cursor information. Since the cursor memory may be located at any unused location of video RAM, it is a virtual hardware cursor since the location of cursor data may changed as required. The operation of the cursor may be programmed, monitored and controlled via control registers. The hardware cursor monitors the video control signals to determine when to put out cursor data rather than directly outputting pixel data. The hardware cursor fetches the appropriate cursor data from the cursor memory in the video RAM during the horizontal nondisplay period just prior to a line of display data that should contain cursor data. The hardware cursor then monitors the pixel stream and outputs unchanged pixel data until a cursor location is reached, at which time the hardware cursor outputs a logical combination of cursor data, cursor color, and pixel value.
    Type: Grant
    Filed: September 30, 1994
    Date of Patent: September 24, 1996
    Assignee: VLSI Technology, Inc.
    Inventors: Gary D. Hicok, Dale C. Penner, Mike Nakahara
  • Patent number: 5559477
    Abstract: Five CMOS inverters are connected in a series ring to form an oscillator. Current to the inverters is controlled to establish gate delays of the inverters and thereby determine a frequency of oscillation of the oscillator. The oscillator is included in a phase locked loop where the gate delay of the inverters is selected by selecting the value of a frequency divider of the phase locked loop. The selected delay is used to form a train of pulses with a desired duty cycle.
    Type: Grant
    Filed: September 15, 1995
    Date of Patent: September 24, 1996
    Assignee: International Microcircuits, Inc.
    Inventors: Orhan Tozun, Chit-Ah Mak, Werner Hoeft
  • Patent number: 5557559
    Abstract: In association with a burn-in system for the accelerated life testing of semiconductor devices, of the type including a burn-in driver universally reconfigurable by computer control, a computer software system and method combining interactive systems for designing projects having data for reconfiguring the driver, designing test sequences having data for controlling semiconductor burn-in, designing oven chamber and driver and burn-in board configurations for use in burn-in control, controlling burn-in testing, diagnosing hardware problems, and providing system security. The software system of a multi-purpose computer controlled driver system functions with and controls the burn-in system hardware to accomplish the signal conditioning and testing during the same time period of a wide variety of devices quickly and efficiently with a minimum of system setups and change-overs.
    Type: Grant
    Filed: December 23, 1993
    Date of Patent: September 17, 1996
    Assignee: Motay Electronics, Inc.
    Inventor: James V. Rhodes
  • Patent number: 5557733
    Abstract: A memory subsystem for use between a CPU and a graphics controller in a typical small computer system has a cache interface for the CPU and a FIFO interface for the graphics controller. This configuration optimizes the data transfers for both the CPU and the graphics controller, and allows both to operate in a manner generally asynchronous to each other. This caching FIFO provides enhanced performance by matching the interface to the unique data requirements of the devices accessing the data within the caching FIFO. For the CPU, the caching FIFO appears as a normal data cache. For the graphics controller, the caching FIFO appears as a normal dual port FIFO, which optimizes the highly sequential data transfers characteristic of graphics controllers. The simple design of the caching FIFO provides maximum performance for a minimum of gates, making the circuit well-suited to efficient implementation in silicon.
    Type: Grant
    Filed: April 2, 1993
    Date of Patent: September 17, 1996
    Assignee: VLSI Technology, Inc.
    Inventors: Gary D. Hicok, Judson A. Lehman
  • Patent number: 5546687
    Abstract: A transparent acrylic sheet carries a mirrored coating on its back surface. The sheet has a ground front surface that has a layer of fluorescent paint, or, alternatively, a translucent layer of diluted fluorescent paint applied thereto. The fluorescent paint layer carries a cibachrome image transparency. Light passes through an edge of the sheet to the ground surface where it is diffused and amplified by the excitation of the fluorescent particles in the fluorescent paint. The amplified, diffused light illuminates a back surface of the transparency, thereby providing a display of an illuminated image to an observer who views a front surface of the transparency.
    Type: Grant
    Filed: February 27, 1995
    Date of Patent: August 20, 1996
    Inventor: Paul Iorfida
  • Patent number: 5545799
    Abstract: A sequential process is provided for the destruction of a toxic organic chlorine-containing compound, especially a chlorine- and arsenic-containing compound e.g., a Lewisite or a mustard gas. The process includes the first step of carrying out an oxidizing reaction between the chlorine-containing compound, and an oxidizing agent, especially hydrogen peroxide, while maintaining the temperature and the pH within preselected ranges e.g., about 50.degree. C. to about 90.degree. C. and the pH starting at about 1 to about 2 during the oxidation and terminating at about 5 to about 8 to provide an oxidation product of the original toxic organic chlorine-containing compound, original toxic chlorine- and arsenic-containing compound. After completion of the oxidizing reaction, any residual oxidizing agent is preferably catalytically decomposed. Then, the oxidation product of the original toxic organic chlorine-containing compound, is decomposed at an alkaline pH, e.g.
    Type: Grant
    Filed: March 30, 1993
    Date of Patent: August 13, 1996
    Inventor: Robert A. Ritter
  • Patent number: 5546591
    Abstract: A system for providing power to peripheral components associated with a personal computer is disclosed. A local power management unit is located at each controller for a peripheral component in order to provide a distributive power management arrangement. The local power management units communicate with an activity monitor provided in a central power management unit. The foregoing arrangement permits power to be maintained to the bus interface microchips at all times. Deactuation of a controller associated with a peripheral component is accomplished through inhibiting the clock signal produced by the local power management unit associated with the controller. By maintaining power to the bus interface microchips, power leakage through the bus interface microchips is eliminated.
    Type: Grant
    Filed: February 1, 1994
    Date of Patent: August 13, 1996
    Assignee: VLSI Technology, Inc.
    Inventors: Henry Wurzburg, Walter H. Potts
  • Patent number: 5540052
    Abstract: A pulse hydraulic system is disclosed comprising, in combination a hydraulic sump for supplying the system with hydraulic fluid, one or more hydraulic pumps taking suction on the sump for increasing the pressure of the hydraulic fluid exiting the sump, a pulse generator fed by the discharge from the pump(s) for creating pulsed pressure of the hydraulic fluid output therefrom, an actuator coupled to the pulse generator for doing work, and one or more accumulators coupled between at least one of the pump(s) and the pulse generator, between the pulse generator and the actuator, and between the pulse generator and the sump for storing and supplying pressurized hydraulic fluid to the system. The addition of one or more pulse intensifiers to a pulse hydraulic system increases the overall system efficiency.
    Type: Grant
    Filed: August 16, 1994
    Date of Patent: July 30, 1996
    Inventors: Ingrid D. Sieke, Harold B. Sieke, Helmut K. Sieke
  • Patent number: 5539604
    Abstract: A protection apparatus for sensitive electronic circuitry susceptible to damage from transient voltage pulses. The apparatus includes sensitive circuitry and a transient voltage suppressor device mounted on a common circuit board or substrate. The transient voltage suppressor device comprises a semiconductor chip having a plurality of electrodes on a single major surface of the chip, the plurality of electrodes comprises over the half the area of the major surface of the chip and are mounted to surface conductors of the circuit board. The chip may contain a plurality of transient voltage suppression devices.
    Type: Grant
    Filed: September 30, 1994
    Date of Patent: July 23, 1996
    Assignee: Microsemi, Corp.
    Inventors: Oscar M. Clark, John J. Freeman
  • Patent number: 5535360
    Abstract: A digital computer system having a "smart" cache controller that permits the system to take advantage of CPU address pipelining while minimizing the performance impact of a pipelined cache read miss in a system with a relatively low hit ratio such as a direct mapped cache.
    Type: Grant
    Filed: August 31, 1994
    Date of Patent: July 9, 1996
    Assignee: VLSI Technology, Inc.
    Inventor: David K. Cassetti
  • Patent number: 5531014
    Abstract: An electromechanical press apparatus for trimming excess portions from a leadframe strip package having a semiconductor chip thereon and for forming leads of the leadframe strip package extending from the semiconductor chip is disclosed. The apparatus provides an electric motor that drives two orthogonally oriented shafts through a 90 degree gear box coupler. One shaft is used to move a portion-of the apparatus along a rectangular path of motion for linearly shifting a leadframe strip along a plane orthogonally oriented to the rectangular path of motion. The other shaft is used to move another portion of the apparatus along a line of motion orthogonally oriented to the plane for performing a trimming operation or a forming operation.
    Type: Grant
    Filed: September 30, 1994
    Date of Patent: July 2, 1996
    Inventor: Richard H. J. Fierkens
  • Patent number: 5533104
    Abstract: A telephone answering device for permitting a person to switch an incoming telephone call to a message recording or answering machine for taking or recording a message from a caller onto at least one cassette of the message recording or answering machine. This device includes a telephone instrument, at least one message recording or answering machine, and a person actuated switch. The person actuated switch has a first "normal" position to permit a person to receive calls using the telephone instrument and a second position for permitting a person to switch the caller to the message recording or answering machine after the person has initially spoken to the caller.
    Type: Grant
    Filed: October 14, 1992
    Date of Patent: July 2, 1996
    Inventors: Mark H. Weiss, Michael I. Rackman, Harry M. Weiss
  • Patent number: 5530934
    Abstract: An apparatus dynamically decodes memory addresses while supporting memory map options that require different memory bits which are dependent upon the memory address. A current CPU address or an address stored in an expanded memory specification (EMS) register is selected as the defining address. This defining address is then decoded by one of twenty-five (25) memory map options available. The resultant decoded signal drives select lines of a multiplexer whose output drives memory address lines to on-board banks of DRAMS.
    Type: Grant
    Filed: February 1, 1994
    Date of Patent: June 25, 1996
    Assignee: VLSI Technology, Inc.
    Inventor: William K. Hilton
  • Patent number: 5524220
    Abstract: A digital computer system including a memory subsystem thereof for increasing the throughput of the digital computer system is disclosed, comprising a central processing unit (CPU), a main memory, and a Look-ahead Instruction Prefetch Buffer (LIPB) external to the CPU for prefetching at least one portion of instruction code from the main memory each time the CPU initiates a request for instruction code from the main memory and for accelerating the submission of the portion of instruction code to said CPU means upon request by said CPU means without a memory system delay that is usually required when accessing a larger number of memory locations in the main memory each time the CPU initiates an instruction code request.
    Type: Grant
    Filed: August 31, 1994
    Date of Patent: June 4, 1996
    Assignee: VLSI Technology, Inc.
    Inventors: Deepak Verma, W. Henry Potts
  • Patent number: 5520326
    Abstract: A system for alerting mail distributors to a potential message (such as that all the current mail has been forwarded) when attempting to deliver mail to a mail receptacle. A device is provided which may be entirely located within such mail receptacle, which device permits the positioning of both alerting means and message means in a position demanding attention by such mail distributor. Alerting is accomplished by an enhanced sort of "miniature stop sign" and messaging is provided by a slotted holder for holding a replaceable message viewable through a transparent face of the message holder. Appropriate positioning of the alerting system within the mail receptacle is accomplished by a pair of spring-loaded extendible rods which may be retracted by the user to place the whole alerting system within the mail receptacle and then releasing the rods for compression contact with the inner walls of the mail receptacle.
    Type: Grant
    Filed: October 11, 1994
    Date of Patent: May 28, 1996
    Inventor: Kathy K. Schmidt
  • Patent number: 5515800
    Abstract: A method of making lightweight, tear-resistant, and water-resistant wearing apparel comprises the steps of removing unwanted portions from used envelopes, connecting a plurality of the envelopes together into a sheet, cutting the sheet into apparel portions, and coupling the apparel portions together in order to form the wearing apparel. The used envelopes are made from a lightweight, substantially tear-resistant, and substantially water-resistant material such as TYVEK. This method also provides a desirable method for recycling used envelopes into useful wearing apparel.
    Type: Grant
    Filed: June 10, 1994
    Date of Patent: May 14, 1996
    Inventor: Thomas M. Thompson
  • Patent number: D372510
    Type: Grant
    Filed: March 27, 1995
    Date of Patent: August 6, 1996
    Assignees: Michael P. Chamberlin, Ernest E. Zaik
    Inventor: Kenneth M. Stevens