Abstract: The present invention is directed to sonic logging while drilling. A transmitter and at least one receiver are mounted on a drill collar for performing sonic investigations of the formation traversing a borehole. It has been discovered that a drill collar has a natural stop band or notch where acoustic energy propagating in this frequency range is severely attenuated. Thus, to reduce drill collar acoustic coupling, the transmitter is operated within this natural stop band of the drill collar. An imperforate stop band filter is also included between the transmitter and receiver to amplify the natural stop band. The transmitter is mounted transvere to the longitudinal axis of the drill collar, and is preferably mounted within means that reduce drill collar acoustic coupling.

Abstract: A method and apparatus which enhances computer system performance in systems that incorporate a cache system that requires a first non-zero number of wait states and a memory system write buffer that requires a second lesser number of wait states. The present invention reduces or eliminates wait states that are otherwise required during write cycles in prior art designs without adding cost. During burst writes to data entries cached in the second level cache system, a cache protocol is used whereby the cache controller snoops the respective addresses which are the target of the burst write cycle out of the cache system, i.e., marks the respective cache line invalid. This effectively eliminates the data from the cache at the beginning of the burst write cycle. Since the data has now been marked invalid, the cache line is not required to be updated.

Abstract: A modular computer bus providing a system for automatically maintaining proper bus termination. A module connector is located at on end of the bus. A switch device is located at the end of the bus as close as possible to the connector. The switch device couples a termination device to the end of the bus when the switch device is in an on state. The switch device is in the on state when no module is present in the connector and in an off state when a module, such as a processor module, is present in the connector. When the switch device is in the off state, the termination device is not coupled to the bus. Instead the end of the bus is terminated by a termination device on the module. Thus, computer bus is correctly terminated automatically when a module is inserted into or removed from the connector. Thus a bus structure is provided for implementing a bus standard while providing modularity and automatically maintaining proper bus termination.

Abstract: A switching power supply system for digitally measuring switching regulator current is provided. The switching power supply contains a pulse-width-modulator (PWM) controller for providing a series of constant voltage and constant frequency pulses to a tank circuit. The tank circuit provides a DC current to an electronic system. The duty cycle of the pulses, however, is varied, depending on the current drain of the electronic system. A counter is attached to an output of the PWM controller to provide a count that is relative to the width of an output pulse from the PWM controller. The count is provided to a power control system that utilizes the value of the count to determine the current output of the PWM controller. The power control system is also connected to the output of the tank circuit to monitor the voltage output of the PWM controller. The power control system utilizes the determined current output, and the monitored voltage output to determine the instantaneous power output of the PWM controller.

Abstract: A printed circuit board includes a multi-component mounting footprint for mounting one of several possible differently sized discrete component packages on the circuit board. The multi-component mounting footprint includes a first mounting pad which has two connection points for mounting a connector on one of two different sized components. The footprint also includes a second mounting pad which is symmetric to the first mounting pad. About the mounting pads are cut outs which prevent solder buildup when either one of two different sized components are mounted thereon.

Abstract: A portable computer is provided in which the consumption of power by the I/O ports of the computer is reduced. The processor of the computer distinguishes port I/O operations that require an actual data transfer from port I/O operations that do not require an actual data transfer. The I/O ports of the computer remain off until an I/O operation involving an actual data transfer at a particular port is required. When an I/O operation which requires an actual data transfer is encountered, then the appropriate port is powered up. In this manner, power consumption by the I/O ports of the computer is significantly reduced. Advantageously, the disclosed technique for reducing power consumption by the I/O ports of the computer is operating system independent. In this manner, the power management feature functions regardless of which particular operating system or application software is installed on the computer.

Abstract: There is disclosed a technique for constructing a printed circuit board assembly to provide solder joints with a uniform height. A solder mask is provided on the external surfaces of the printed circuit board to minimize the mount of conductive pad area that is exposed to solder. The solder mask includes a plurality of relatively small openings with a predetermined pattern to minimize the build up of solder, while insuring sufficient solder height to connect to the grounding component located on the chassis to insure adequate EMI protection. Preferably a polka dot pattern is used for certain conductive pads, while a single narrow strip or the solder mask opening configuration is used for rectangular pad configurations. Other configurations and patterns are also available to provide an adequate electrical connection while insuring uniform solder height.

Abstract: A handheld computer has a generally rectangular housing on a front side wall of which a display screen is operatively mounted. A row of toggle switches is also mounted on the front housing side wall, adjacent the display screen, the toggle switches being operatively connected to the computer circuitry within the housing. The toggle switches are manually depressible switch members having first and second non-momentary positions. The housing may be manually grasped in two perpendicular use orientations in each of which the user may reach and operate the toggle switches to control the operation of the computer. One of the toggle switches is operative, via the internal computer circuitry, to selectively rotate, through an angle of 90 degrees, the orientation of data generated on the screen so that in either of the first and second housing use orientations the screen data is in an upright viewing orientation relative to the user of the computer.

Abstract: A computer system is provided with the capability of protecting portions of the mass storage media therein from unauthorized access. The mechanism employed to protect portions of the mass storage media is advantageously operating system independent. Thus, the protection mechanism functions regardless of what operating system is installed or what particular application software is presently being executed. More particularly, the computer system includes a processor configured to execute code in an operational mode and in a system management mode. A mass storage device and a memory are coupled to the processor. At least one region of the mass storage device is designated as a protected region by the user or by the manufacturer. The computer system is configured to trap mass storage device I/O operations and, in response to a trapped mass storage device I/O operation, the processor enters a system management mode.

Abstract: A bus with selective burst ordering enables the implementation of computer systems that incorporate bus masters (e.g., processors, DMA controllers, LAN controllers, etc.) with dissimilar burst orders. The same bus supports devices which require or prefer differing burst orders for high bandwidth data transfers. Selective burst order is enabled through the use of a bus line which may be asserted by the current bus master. By asserting the corresponding signal, a current bus master indicates that sequential (rather than non-sequential) burst order will be used for data transfer. Specialized burst address generation logic enables a bus slave to generate, in the selected burst order, the low order bits of memory addresses for the data words implicitly addressed during a burst transfer.

Abstract: A power supply including a detection and switch system for sensing either a uni-plane or a split-plane device connected to a socket and for providing one or two supply voltages, respectively. In one embodiment, a dual output regulator includes first and second regulators with corresponding first and second feedback circuits and comparators for regulating first and second outputs, respectively. A switch circuit connects the second feedback circuit to the comparator of the second regulator in split-plane mode for providing the second output. However, the switch circuit connects the first feedback circuit to the comparator of the second regulator in uni-plane mode where the two outputs are coupled together by a uni-plane device, so that the two outputs are regulated at the same level. A detection circuit monitors the output signals and controls the switch circuit depending upon whether a uni-plane or split-plane device is detected.

Abstract: A memory mapping scheme for a computer system includes a number of slave devices attached to a system bus, which slave devices have partitioned among themselves a memory address storage system. The memory address storage system is, in turn, divided into a number of regions. The memory mapping scheme also includes a subsystem for mapping the regions, which subsystem includes a unique subtractive descriptor that disjunctively allows mapping of regions that reside on only one of a number of input/output channels connected to the system bus.

Abstract: A secondary cache memory system is disclosed for use in a portable computer that increases system performance while also conserving battery life. The secondary cache includes a cache controller for controlling the transfer to and from a cache memory, comprised of fast SRAM circuits. The cache controller includes a control and status register with at least three status bits to control power to the cache, and to insure that the data stored in the cache memory is coherent with system memory. A control and power management logic checks the contents of the control and status register, and monitors the activity level of the processor. When the processor is determined to be inactive, the control and power management logic turns off the cache by changing the state of a bit in the control and status register.

Abstract: A SCSI adapter card which provides one or more internal SCSI channels and includes connectors for an optional daughter card which provides an external SCSI connector. The daughter card is a parallel mezzanine style daughter board which provides modular and upgradable SCSI bus routing options. In the preferred embodiment, the adapter card includes two SCSI controllers which provide two internal SCSI channels. The daughter board can include up to 2 SCSI controllers for additional SCSI channels. The daughter board can reroute one or more of the internal SCSI channels to the external connector according to various SCSI routing options or can include one or more SCSI controllers for additional SCSI channels. In one embodiment, the daughter board does not include a SCSI controller, but rather serves to reroute one or more of the internal SCSI controllers to the external connector.

Abstract: A rechargeable battery pack including a microcontroller connected to a voltage measuring circuit and a current measuring circuit for measuring, respectively, the voltage across and the current flowing from a battery. Upon each expiration of a predefined time period during each discharge cycle of the battery, the microcontroller computes the product of the voltage, the current, and the length of the time period, thereby computing the energy expended by the battery over each period of time. An energy variable stored in a nonvolatile memory device associated with the microcontroller for representing the total amount of energy output by the battery over the life thereof is incremented by the computed energy. In one embodiment, a temperature sensing circuit measures the temperature of the battery and the instantaneous energy is adjusted by a temperature factor associated by the measured temperature before being used to increment the value of the energy variable.

Abstract: A system and method for monitoring the temperature of a heat-producing electronic component located on a circuit board and a method of manufacturing therefor. The system includes: (1) an electrically-conductive trace of predetermined dimensions formed integrally with the circuit board, the trace having a temperature-dependent electrical property, a temperature of the electronic component affecting the electrical property and (2) an overtemperature detection circuit coupled to the trace for measuring the electrical property. The detection circuit provides, in response thereto, an overtemperature signal to thereby indicate that the temperature of the electronic component has exceeded a predetermined level. Preferably, the system is used to protect a microprocessor in a personal computer ("PC") from overheating.

Abstract: The substrate member of a multi-tier circuit board is provided, during the construction thereof, with an integral bar code structure by extending spaced apart, parallel finger sections of an interior metal ground plane portion of a panel structure outwardly past the routing path along which the substrate member is to be separated from the panel structure. After the substrate member is routed from the panel structure it has a peripheral side edge portion upon which exposed end surface portions of the spaced ground plane finger sections are disposed in a mutually spaced bar code array representative of predetermined information relating to the completed circuit board. The ground-seeking probe portion of a conductive scanning device is moved along the bar-coded edge of the substrate member to read and decipher the integral ground plane bar code structure compactly incorporated thereon during the manufacture of the substrate member.

Abstract: A daughter card for mounting to an adapter card, wherein the daughter card includes adapter card connectors for mounting to the adapter card and also an edge connector for insertion directly into a computer slot so that the daughter card may also function as a stand-alone card. The daughter card is both mechanically and electrically compliant as an independent PCI add-in card and includes a PCI edge connector for insertion directly into a PCI slot. This provides additional modularity since the daughter card can be purchased and configured as a separate and independent PCI adapter card as well as for mating to a host adapter card to provide extra functionality to the host adapter card. In addition, since the daughter card can be directly inserted into the PCI bus, the daughter card provides greater component access and probing for testing. Further, the daughter card can be tested independently of the host adapter card during manufacturing functional test, thus providing more reliable testing.

Abstract: A power management control unit and system is provided for selectively controlling ac power to one or more computer peripheral devices. The power management control unit includes a power cord connected to an ac supply and an outlet pin capable of electrically receiving the peripheral device. The management control unit also includes an ac switch electrically coupled between the power cord and the outlet pin, such that the switch can modulate conduction between the power cord and the outlet pin during use. The power management control unit is maintained separate from existing computers and peripherals such that computers and peripheral devices need not be retrofitted or adapted with the control unit. The control unit takes advantage of video control signals available at the computer video output in order to turn off or on ac power to the outlet pin.

Abstract: A digital computer system has an error correction code (ECC) syndrome encoder for generating initial ECC syndromes from digital words input to the system which are received together with their corresponding ECC syndromes, in the system receiving circuitry. The system has an ECC syndrome re-encoder for generating second ECC syndromes from the digital words as they are removed from the receiving circuitry. A comparison circuit then compares the originally encoded syndrome with the re-encoded syndrome as it is being generated, to detect whether there is a difference and therefore an error in the digital word or an error in the syndrome. The comparison circuit is integrated into and is a part of the ECC re-encoder.