Patents Represented by Attorney, Agent or Law Firm Hickman Stephens & Coleman, LLP
  • Patent number: 6008689
    Abstract: The present invention provides a switch circuit having a switch and a first body grabbing circuit. The switch includes a first transistor and a second transistor. The first transistor has a body and is coupled to the second transistor in parallel to form a common source and a common drain. The common source defines an input node and the common drain defines an output node. The first body grabbing circuit is coupled to the body of the first transistor. The first body grabbing circuit is arranged to couple the body of the first transistor to the input node when the first and second transistors receive a turn-on voltage signal such that a body effect is eliminated in the first transistor.
    Type: Grant
    Filed: May 28, 1998
    Date of Patent: December 28, 1999
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Stephen C. Au, David Maes, Chowdhury F. Rahim
  • Patent number: 6008108
    Abstract: A semiconductor fabrication method is provided for the fabrication of a shallow-trench isolation (STI) structure in integrated circuit. Conventionally, the insulating plug of the STI structure would be undesirably formed with microscratches in its top surface resulting from chemical-mechanical polishing (CMP) process, thus causing an undesired bridging effect thereacross when conductive layers are subsequently formed. This method can help solve this problem by forming a mending dielectric layer over the insulating plug of the STI structure to mend these microscratches. Since the mending dielectric layer is in a flowable state when it is being coated over the wafer, it can fill up all the microscratches in the top surface of the insulating plug, thereby mending the microscratches to prevent the bridging effect across the insulating plug that would other-wise occur in the case of the prior art.
    Type: Grant
    Filed: December 7, 1998
    Date of Patent: December 28, 1999
    Assignee: United Microelectronics Corp.
    Inventors: Chen-Nan Huang, Horng-Bor Lu
  • Patent number: 6007426
    Abstract: The present invention provides a prize redemption system for use with one or more game apparatuses. The prize redemption system includes a server in communication with the game apparatuses to form a wide area network that may include the Internet. A game is provided on a game apparatus for a player to play in exchange for monetary input, and prize credits are credited to the player based on the game outcome. A prize selection menu is then displayed by the game apparatus, the menu including one or more prizes, where the player may select a prize that has a prize cost within the player's prize credit amount. The player is dispensed a specific prize ticket that is redeemable for the selected prize. The game apparatus can also provide specific prizes and tournament games played for a tournament prize contributed to by multiple players. An operator can adjust prizes and payout percentages of the system to achieve a desired profitability for game apparatuses.
    Type: Grant
    Filed: March 17, 1998
    Date of Patent: December 28, 1999
    Assignee: RLT Acquisitions, Inc.
    Inventors: Matthew F. Kelly, Bryan M. Kelly, Norman B. Petermeier, John G. Kroeckel, John E. Link
  • Patent number: 6008114
    Abstract: A method of forming a dual damascene structure includes providing a substrate having a metallic layer already formed thereon, and then forming a dielectric layer having a top-wide/bottom-narrow opening over the substrate to expose a portion of the metallic layer. Next, the metallic layer is over-etched by applying etchant through the opening to form a groove in the metallic layer so that additional metallic layer surface is exposed. Thereafter, a glue layer is formed over the opening and the groove surface. If the glue layer is a metal, a high-temperature operation is carried out to form a low resistance alloy at the junction between the metallic layer and the glue layer. Consequently, ohmic contact area and reliability of the device are increased. Finally, conventional processes are used to deposit metal into the opening followed by the planarization of the newly deposited metallic layer.
    Type: Grant
    Filed: August 20, 1998
    Date of Patent: December 28, 1999
    Assignee: United Microelectronics Corp.
    Inventor: Tzung-Han Li
  • Patent number: 6004702
    Abstract: A phase-shifting mask (PSM) structure and a method for fabricating the same are provided. The PSM structure includes a quartz substrate and a shifter layer formed over said quartz substrate, each shifter layer being formed with a first thickness of specific value to serve as the blinding portion of the PSM and a second thickness of specific value to serve as the phase-shifting portion of the PSM. The shifter layer of two different thicknesses can be used to replace the conventional chromium layer to provide the desired blinding and phase shifting effects of the PSM.
    Type: Grant
    Filed: May 21, 1998
    Date of Patent: December 21, 1999
    Assignee: United Microelectronics Corp.
    Inventor: Benjamin Szu-Min Lin
  • Patent number: 6003666
    Abstract: A hazardous material and shipment system (kit) includes a containment box, a closeable bottle, a unitary foam positioning body, and an absorbent sleeve. The unitary positioning body is positioned within the containment box and is provided with an aperture. The closeable bottle has a screw cap, is made from a material compatible with the hazardous material, and fits within the aperture of the positioning body. An optional removable top member covers the aperture to secure the bottle therein. The bottle is preferably a part of a bottle assembly including a sealing tape, the absorbent sleeve, and a plastic bag, which provide multiple containments for liquid leaks and spills. A method for containing hazardous materials includes placing a desired amount of the hazardous material in a bottle body having a threaded neck and then engaging a screw cap with the threaded neck to provide a closed bottle with the hazardous material inside.
    Type: Grant
    Filed: December 17, 1997
    Date of Patent: December 21, 1999
    Assignee: ChemTrace Corporation
    Inventor: Dianne M. Dougherty
  • Patent number: 6003021
    Abstract: A system is disclosed that provides a goal based learning system utilizing a rule based expert training system to provide a cognitive educational experience. The system provides the user with a simulated environment that presents a business opportunity to understand and solve optimally. Mistakes are noted and remedial educational material presented dynamically to build the necessary skills that a user requires for success in the business endeavor. The system utilizes an artificial intelligence engine driving individualized and dynamic feedback with synchronized video and graphics used to simulate real-world environment and interactions. Multiple "correct" answers are integrated into the learning system to allow individualized learning experiences in which navigation through the system is at a pace controlled by the learner.
    Type: Grant
    Filed: December 22, 1998
    Date of Patent: December 14, 1999
    Assignee: AC Properties B.V.
    Inventors: Beth Elyse Zadik, Alexander Han leung Poon
  • Patent number: 6001743
    Abstract: A method for minimizing the dimension of a contact forms a thick dielectric layer on a provided substrate first, and then forms a contact on the first dielectric layer and expose the substrate by performing a slope etching process. The contact with the target contact size is obtained by partially removing the thick dielectric layer. Since the target contact size is obtained by a self-aligned method, the upper diameter of the contact is not limited by a conventional fabrication process. Furthermore, after a contact is formed, it is optional to fill the contact with filler. Even after a desired contact is formed in the case that filler is used, the remains of the filler can be either kept or removed depending on the conductivity of the filler.
    Type: Grant
    Filed: September 8, 1998
    Date of Patent: December 14, 1999
    Assignee: United Microelectronics Corp.
    Inventors: Jia-Hwa Lee, Chia-Wen Liang
  • Patent number: 6001747
    Abstract: A method for making a multi-layered integrated circuit structure, includes depositing a methyl doped silicon oxide layer over a substrate. SiO.sub.2 skin is deposited on the methyl doped silicon oxide layer by decreasing the flow of CH.sub.3 SiH.sub.3, increasing the flow of SiH.sub.4 and keeping the flow of H.sub.2 O.sub.2 constant for a period of time. Finally, a cap layer is deposited which adheres to the SiO.sub.2 skin.
    Type: Grant
    Filed: July 22, 1998
    Date of Patent: December 14, 1999
    Assignee: VLSI Technology, Inc.
    Inventor: Rao V. Annapragada
  • Patent number: 5998977
    Abstract: The present invention teaches a variety of startup modes for operating a boost type switching power supply. A linear charging mode couples the input voltage directly to the output voltage, thereby precharging the output capacitor of the switching power supply. The linear mode serves to reduce inrush battery current and limit the stress voltage on the power switching devices. A pseudo-buck mode, preferably entered into after the linear mode has precharged the output capacitor, operates the boost type switching power supply in a manner providing power to the output essentially as a buck type switching power supply would. This results in continuous charging of the output capacitor, thereby reducing startup time and increasing power efficiency. The pseudo-buck mode also enables step-down voltage generation with boost type circuitry. A pseudo-boost mode facilitates a smooth transition between the pseudo-buck and traditional boost modes.
    Type: Grant
    Filed: May 27, 1998
    Date of Patent: December 7, 1999
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Jean F. Y. Hsu, Tunc Doluca
  • Patent number: 5997255
    Abstract: A getter pump module includes a number of getter disks provided with axial holes, and a heating element which extends through the holes to support and heat the getter disks. The getter disks are preferably solid, porous, sintered getter disks that are provided with a titanium hub that engages the heating element. A thermally isolating shield is provided to shield the getter disks from heat sources and heat sinks within the chamber, and to aid in the rapid regeneration of the getter disks. In certain embodiments of the present invention the heat shields are fixed, and in other embodiments the heat shield is movable. In one embodiment, a focus shield is provided to reflect thermal energy to the getter material from an external heater element and provide high pumping speeds. An embodiment of the present invention also provides for a rotating getter element to enhance getter material utilization.
    Type: Grant
    Filed: January 23, 1997
    Date of Patent: December 7, 1999
    Assignee: SAES Getters S.p.A.
    Inventors: Gordon P. Krueger, D'Arcy H. Lorimer, Sergio Carella, Andrea Conte
  • Patent number: 5996424
    Abstract: A low contamination bottle for sampling, storing, and transporting of chemical samples includes a bottle portion defining an internal volume and having a threaded neck, and a cap portion provided with threads that engage the threaded neck of the bottle to provide a fluid-tight seal between the internal volume of the bottle and the ambient environment. The bottle has a flexible sidewall portion that permits the reduction of the internal volume to allow a liquid sample to be drawn into the bottle portion by a suction or vacuum process. Both the bottle portion and the cap portion are made from a material selected from the chemical resistant group consisting essentially of hydrocarbon polymers and fluorocarbon polymers, where the material generates less then 1 ppb of metal contaminants and 1 ppm of leachable anionic and organic contaminants. The flexible sidewall portion of the bottle portion has a minimum thickness of 0.
    Type: Grant
    Filed: March 31, 1998
    Date of Patent: December 7, 1999
    Assignee: ChemTrace Corporation
    Inventors: Samantha S. H. Tan, Dianne M. Dougherty
  • Patent number: 5994955
    Abstract: The present invention teaches a variety of driver amplifiers having a transmit mode suitable for driving the load resistance of a network with an amplified version of the input signal, and a standby mode wherein the driver amplifier consumes substantially no current and isolates the load resistance from the input signal. These amplifiers are also characterized in that during transitions back and forth between standby mode and transmit mode, a minimum of standby transient leaks out onto the network. Further, the noise power delivered to the network in standby mode is substantially minimized, the remaining noise being primarily due to thermal noise produced by a resistor utilized to provide matched termination to the network.
    Type: Grant
    Filed: June 26, 1998
    Date of Patent: November 30, 1999
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Joel D. Birkeland
  • Patent number: 5995526
    Abstract: The present invention is a laser (12) having a resonator (28) between an output coupling mirror (20) and a high-reflection mirror (26). A photoelastic plate (38) is incorporated in a photoelastic cell (24), or a photoelastic mirror (36) used in place of the high-reflection mirror (26). The photoelastic plate (38) is placed in the resonator (28) and introduces an artificial anisotropy to the laser (12). The photoelastic plate (38) has privileged directions (34), which are aligned with the axes of the artificial anisotropy. A magnetic field (32) is applied transversely to the resonator (28), in alignment with one of the privileged directions (34), to produce two orthogonal linearly polarized frequencies in an output beam (30) with the Zeeman effect.
    Type: Grant
    Filed: November 6, 1998
    Date of Patent: November 30, 1999
    Assignee: Excel Precision, Inc.
    Inventors: Guang-Yao Yan, John C. Tsai
  • Patent number: 5994201
    Abstract: A method for manufacturing shallow trench isolation regions according to the invention uses a first stop layer and a second stop layer as two polishing stop layers, or a polishing stop layer and an etching stop layer, respectively. By performing chemical mechanical polishing twice, or performing chemical mechanical polishing one time and then etch back, the influence on subsequently formed shallow trench isolation regions caused by different sizes and densities thereof can be greatly alleviated.
    Type: Grant
    Filed: October 13, 1998
    Date of Patent: November 30, 1999
    Assignee: United Microelectronics Corp.
    Inventor: Tzung-Han Lee
  • Patent number: 5991112
    Abstract: A servotrack writing apparatus (10) for use on computer disk drive workpieces (12). A writer controller (58) puts the writing apparatus (10) in the role of master to direct the workpiece (12) as a slave to position its read-write head (36) and to write the servotracks. A tracking section (54) provides a modulated light beam (72) from which a reflected portion is detected by a bi-cell photo sensor (70) and processed in the writer controller (58) to determine the position of a thru-hole (40) or a detection region (42) in the actuator arm (24) of the workpiece (12). The writer controller (58) may use a lock-in amplifier (102, 104) for the processing the reflected portion of the light beam (72). A reference arm (44) is locked and moved in a synchronous relationship with the actuator arm (24).
    Type: Grant
    Filed: March 4, 1997
    Date of Patent: November 23, 1999
    Assignee: Excel Precision
    Inventors: Hubert Song, John C. Tsai, Mervyn L. Hopson, Kam-Fung Yan, Jean Chi
  • Patent number: 5990723
    Abstract: The present invention teaches a variety of filter circuits for protecting against transient electrical pulses such as those caused by electrostatic discharge (ESD) events. One aspect of the present invention teaches an integrated circuit package having primary circuitry, an ESD protection device, a filter circuit, and a conductive lead arranged to couple a point external to the integrated circuit package to a point internal to the integrated circuit package. The ESD device, coupled in series between the conductive lead and a ground reference, can limit the voltage magnitude of a transient electrical pulse occurring upon the conductive lead. The filter circuit is operable such that the voltage magnitude of an electrical signal generated at the filter circuit output is less than the voltage magnitude of the certain transient electrical pulse itself. One preferred filter circuit has two resistors R.sub.1 and R.sub.2, two capacitors C.sub.1 and C.sub.2, and two transistors Q.sub.1 and Q.sub.2.
    Type: Grant
    Filed: January 9, 1998
    Date of Patent: November 23, 1999
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Gabriel E. Tanase
  • Patent number: 5990561
    Abstract: A method for producing a glue layer for an integrated circuit which uses tungsten plugs in accordance with the present invention includes: (A) providing a substrate which has a surface, a center, an edge, and a direction normal to the surface; and (B) sputter depositing a glue layer over the surface of the substrate such that an edge thickness of the glue layer measured in the direction normal to the surface at the edge of the substrate is at least 105% of a center thickness of the glue layer measured in the direction normal to the surface at the center of the substrate.
    Type: Grant
    Filed: June 12, 1998
    Date of Patent: November 23, 1999
    Assignee: VLSI Technologies, Inc.
    Inventors: Calvin T. Gabriel, Dipankar Pramanik, Xi-Wei Lin
  • Patent number: 5985761
    Abstract: An integrated circuit structure includes a conductive layer, a first dielectric layer overlying the conductive layer, a second dielectric layer overlying both the first dielectric layer and the conductive layer and a planarizing layer overlying the second dielectric layer. The conductive layer has a lateral dimension which is greater than a corresponding lateral dimension of the first dielectric layer. Thus the conductive layer and the first dielectric layer form a stepped, pyramidal shaped island. As a result of the stepped, pyramidal shape, the overlying planarizing layer forms with a more planar upper surface than if the sidewall of the island had a vertical profile. In one preferred embodiment of the present invention, the conductive layer is formed from tungsten-silicide, and both of the dielectric layers are either silicon dioxide or silicon nitride.
    Type: Grant
    Filed: June 19, 1996
    Date of Patent: November 16, 1999
    Assignee: VLSI Technology, Inc.
    Inventors: Eric A. Sparks, Stacy W. Hall
  • Patent number: 5987443
    Abstract: A system is disclosed that provides a goal based learning system utilizing a rule based expert training system to provide a cognitive educational experience. The system provides the user with a simulated environment that presents a business opportunity to understand and solve optimally. Mistakes are noted and remedial educational material presented dynamically to build the necessary skills that a user requires for success in the business endeavor. The system utilizes an artificial intelligence engine driving individualized and dynamic feedback with synchronized video and graphics used to simulate real-world environment and interactions. Multiple "correct" answers are integrated into the learning system to allow individualized learning experiences in which navigation through the system is at a pace controlled by the learner.
    Type: Grant
    Filed: December 22, 1998
    Date of Patent: November 16, 1999
    Assignee: AC Properties B. V.
    Inventors: Mark Stewart Nichols, Benoit Patrick Bertrand, Kerry Russell Wills, Alexander Han Leung Poon, Michael Joseph Walsh