Abstract: Methods of etching silicon nitride material, and more particularly, etching nitride selective to silicon dioxide or silicide, are disclosed. The methods include exposing a substrate having silicon nitride thereon to a plasma including at least one fluorohydrocarbon and a non-carbon containing fluorine source such as sulfur hexafluoride (SF6). The plasma may also include oxygen (O2) and the fluorohydrocarbons may include at least one of: trifluoromethane (CHF3), difluoromethane (CH2F2), and methyl fluoride (CH3F). In an alternative embodiment, the plasma includes one of hydrogen (H2) and nitrogen trifluoride (NF3) and one of tetrafluoromethane (CF4) and octafluorocyclobutane (C4F8). The methods are preferably carried out using a low bias voltage, e.g. <100 V.

Abstract: A system, method and program product for correcting a deviation of a dimension of a feature from a target in a semiconductor process, are disclosed. The invention determines an origin of a deviation in a feature dimension from a target dimension regardless of whether it is based on processing or metrology. Adjustments for wafer processing variation of previous process tools can be fed forward, and adjustments for the process and/or integrated metrology tools may be fed back automatically during the processing of semiconductor wafers. The invention implements process reference wafers to determine the origin in one mode, and measurement reference wafers to determine the origin of deviations in another mode.

Abstract: Methods and related program product for assessing and optimizing metrology instruments by determining a total measurement uncertainty (TMU) based on precision and accuracy. The TMU is calculated based on a linear regression analysis and removing a reference measuring system uncertainty (URMS) from a net residual error. The TMU provides an objective and more accurate representation of whether a measurement system under test has an ability to sense true product variation. The invention also includes a method for determining an uncertainty of the TMU.

Abstract: A field programmable gate array (FPGA) device including a non-programming-based default power-on electronic configuration. The non-programming-based default power-on electronic configuration defines a default state to initial a first logic function. Upon power-up, the FPGA device would be enabled to enter the default state without having first to be configured via a conventional programming mode, thus saving processing time during power-up. Several embodiments are disclosed, such as a mask via circuit, an asynchronous set/reset circuit, an unbalanced latch circuit and a flush and scan circuit. A related method is also disclosed to reduce the memory size dedicated to the first logic function to facilitate further programming after power-up. In addition to time saving and further programming, the FPGA device can also allow partial or incremental programming to expand the full functionality to match customer's different needs.

Abstract: A peripheral interface device that is adaptable into a computer system and which provides a communication interface for a plurality of external devices. The peripheral interface device comprises: a plurality of transfer control logic (TCL) modules, wherein each TCL module provides a dedicated interface for an associated one of the external devices, and wherein multiple TCL modules can communicate in parallel with their associated external devices; and a dual port memory (DPM) device that is in communication with an input/output bus of the computer system, wherein the DPM device can selectively communicate with each of the plurality of TCL modules.

Abstract: A multiple-type paper product dispensing mobile stand with mini-table and storage is provided. The invention can be configured in various dispensing arrangements for dispensing one or more paper products comprising paper towel rolls, toilet tissue rolls, and/or a box of paper facial pop-up tissue sheets. To this extent, one or more dispensing arrangements may incorporate an open roll holder, a hanging roll holder, and/or a web tear plate, each of which is unique to this invention. Further, various configurations allow for the storage of one or more of these products. Various embodiments of the invention also provide user conveniences such as a mini-table, wheel caster leg assemblies, and lifting knobs.

Abstract: The invention provides a foldable box design having a box flap locking system, comprising: a first flap having an edge with a generally trapezoidal shaped tab cut therein, wherein said generally trapezoidal shaped tab is defined by two inwardly projecting grooves; and a second flap that locks with the first flap, wherein the second flap includes an edge with a second generally trapezoidal shaped tab cut therein, and wherein said second generally trapezoidal shaped tab is defined by two outwardly projecting grooves.

Abstract: The present invention is an elastic seal for use with a sanitary probe. The elastic seal forms a layer between the probing member and the coating member to eliminate the formation of voids between the two. The elastic seal may include an elastic substance, such as silicon or rubber, to enable it to remain in contact with both the probing member and the coating member in the case that a change in temperature causes either or both to expand or contract. The elastic seal may have a coefficient of thermal expansion that is intermediate to a coefficient of thermal expansion of the probing member and a coefficient of thermal expansion of the coating member. The elastic seal prevents voids from forming in the probe assembly into which outside materials may enter.

Abstract: A method, system and program product are disclosed that create new shapes at detected shape overlaps and includes those new shapes during routing and net checking when the new shapes require a larger space than any of the overlapping shapes. The invention thus detects and prevents spacing errors without the expense of time consuming design rule checking (DRC), facilitating early detection and prevention of errors.

Abstract: The present invention takes advantage of unused storage space within the ESS cells to provide for the efficient and cost effective storage of downloadable content. Specifically, the system of the present invention generally includes a download grid manager that communicates with the ESS cells. Content to be replicated to the ESS cells, and characteristics corresponding thereto, are received on the download grid manager from a content owner (or the like). Based on the characteristics, a storage policy, and storage information previously received from the ESS cells, the download grid manager will replicate the downloadable content to unused storage space within the ESS cells.

Abstract: Under the present invention, a source meeting partner can select a target application for sharing with one ore more destination meeting partners during a collaborative meeting. Upon selection of the target application, a portion of a meeting application window will be removed, and a window corresponding to the target application will be positioned to be viewable through the removed portion. If necessary, one or more navigators (e.g., scroll bars) can be provided to manipulate the target application window. Thus, the present invention allows the meeting application window and the target application window to be simultaneously viewable without requiring resizing or repositioning of either one.

Abstract: Methods of etching a dielectric layer and a cap layer over a conductor to expose the conductor are disclosed. In one embodiment, the methods include the use of a silicon dioxide (SiO2) etching chemistry including octafluorocyclobutane (C4F8) and a titanium nitride (TiN) etching chemistry including tetrafluoro methane (CF4). The methods prevent etch rate degradation and exhibit reduced electro-static discharge (ESD) defects.

Abstract: The invention relates to a music synthesis system for synthesizing a corresponding digital music output according to commands from a music data file. The music data file comprises a plurality of music data units. Each music data unit records related information of the music. The music synthesis system comprises a wavetable, a memory, a music analyzer, a wavetable preprocessor, and a synthesizer. The wavetable pre-stores the digital sampling data. The memory has a predetermined memory capacity for storing data. The music analyzer receives the music data file, analyzes the music data units of the music data file, and generates a corresponding analysis result. The wavetable preprocessor selects the digital sampling data with relatively greater importance in the wavetable and stores the selected digital sampling data in the memory. The synthesizer selects the digital sampling data from the memory and synthesizes the digital music output.

Abstract: A solution advisor tool for designing an information technology (IT) solution, comprising: (1) a knowledge management system for generating and storing information in a hierarchical format, wherein the knowledge management system includes: (a) a first knowledge base of characteristics; (b) a second knowledge base that manages relationship information regarding the interactions of characteristics and defines all valid characteristic combinations, wherein each valid characteristic combination forms a network unit; (c) a third knowledge base that manages information regarding the interconnectability of network units, wherein a valid combination of network units comprises a configuration; and (d) a fourth knowledge base that manages information regarding sets of possible configurations that can fulfill a predetermined function, wherein each set comprises a cloud; and (2) a design interface system for generating the IT solution.

Abstract: Methods of forming a conductive structure on a substrate prior to packaging, and a test probe structure generated according to the method, are disclosed. The conductive structure includes a high aspect ratio structure formed by injected molded solder. The invention can be applied to form passive elements and interconnects on a conventional semiconductor substrate after the typical BEOL, and prior to packaging. The method may provide better electromigration characteristics, lower resistivity, and higher Q factors for conductive structures. In addition, the method is backwardly compatible and customizable.

Abstract: The present invention provides a technique for adjusting the size of clearance holes for impedance control in multilayer electronic packaging and printed circuit boards. The method comprises: providing parameters for a structure having a clearance hole and at least one via passing through the clearance hole; calculating a characteristic impedance for the at least one via; and adjusting at least a size of the clearance hole until the characteristic impedance for the at least one via is approximately equal to a desired characteristic impedance.

Abstract: A loop filter for a phase-locked-loop is provided, comprising a set of capacitor banks coupled in parallel to form the loop filter, and a detection circuit for identifying and isolating defective capacitor banks. A method for providing a loop filter for a phase-locked-loop in accordance with an embodiment of the present invention includes the steps of forming the loop filter using a set of capacitor banks coupled in parallel, detecting any defective capacitor banks in the set of capacitor banks, isolating each defective capacitor bank, providing a set of redundant capacitor banks, and replacing each defective capacitor bank with a redundant capacitor bank from the set of redundant capacitor banks.

Abstract: Methods, systems, program products are disclosed that control placement of dummy shapes about sensitive circuit elements such that the dummy shapes are at least substantially similar for each circuit element even though the dummy shapes are auto-generated. In one embodiment, the invention includes providing dummy shape pattern pitch information to a designer, and allowing placement of circuit elements at integer multiples of one or more of the pitches such that the dummy shapes are at least substantially similar about each instance of the circuit element. Another embodiment includes allowing placement of a marker about a circuit element to indicate an area in which dummy shapes are to be substantially identical, and then using the marker to place the circuit element. Dummy shapes generated within the marker ensure substantially identical dummy shapes for each instance of the circuit element. The invention also includes the integrated circuits formed.

Abstract: A nitride-based semiconductor structure is provided. The structure includes an active layer that comprises an inverted quantum well structure that includes Indium and Nitrogen. The structure can be used to create a field effect transistor. In this case, the active layer forms an inverted active device channel. By including Indium and forming the inverted active device channel, a device having improved performance characteristics can be manufactured. Further, additional improvements, such as one or more additional layers, a second gate contact, and/or one or more field plates can be included in the device to obtain the desired performance characteristics.

Abstract: The present invention provides a data transformation apparatus for transforming a first data block into a second data block. The first data block comprises a predetermined number of bits. The data transformation apparatus comprises a control bit module, a processing module, and a selection module. The control bit module is used for generating a plurality of control bit sets, wherein each control bit set represents a transformation procedure of the first data block. The processing module is used for receiving the first data block and the plural control bit sets, and accordingly for generating a plurality of first reference values. The selection module connects with the processing module and generates the second data block according to the plural first reference values and a predetermined judgment value.