Abstract: The present invention provides a method and system for controlling leakage power consumption at a System on Chip (SoC) level during a normal run or a boot-up mode. The leakage power reduction is achieved by incorporating a central programmable controller in the SoC architecture and test structures of idle SoC peripherals to place them into an Absolute Minimum Power consumption state with respect to static and dynamic power.

Abstract: A device for detecting the peak value of a signal with crest factor not known a priori includes a pair of peak detectors, each of which includes a rectifier element and a discharge-current generator and generates a respective output signal that is a function of the ratio between a physical dimension of the rectifier element and the intensity of discharge current produced by the generator. The ratio is different for the two detectors, and a combination network combines the output signals of the two peak detectors with one another and produces a combined signal indicating the peak value sought with high accuracy.

Abstract: A beverage for minimizing or reducing jet lag symptoms preferably includes vitamin B3, vitamin B5, vitamin B6, vitamin B12, vitamin D, zinc, calcium, iodine, magnesium, manganese, ginseng, ginkgo biloba, grape seed extract, Echinacea extract and water. A method for minimizing or reducing jet lag symptoms including ingestion of the beverage by a traveler, one hour prior to a flight, and/or during the flight, and/or after a flight.

Abstract: A CDMA communications system includes a primary station and at least one secondary station. The secondary station includes a receiver for receiving CDMA signals transmitted on the downlink. The receiver includes a plurality of Rake finger receivers having inputs for receiving signals and outputs coupled to a combining stage for combining their output signals constructively, a finger assignment stage for assigning the finger receivers to respective received signals, a processing stage for estimating the speed of the CDMA receiver from the signals received and for varying the time required to make a finger replacement decision in response to the estimated speed so that the time required decreases as the speed of the receiver increases and vice versa.

Abstract: The present invention relates to the novel benzofuran derivatives, the preparation thereof and the composition comprising the same. The benzofuran derivatives of the present invention showed potent inhibiting activity of beta-amyloid aggregation and cell cytotoxicity resulting in stimulating the proliferation of neuronal cells as well as recovering activity of memory learning injury caused by neuronal cell injury using transformed animal model with beta-amyloid precursor gene, therefore the compounds can be useful in treating or preventing cognitive function disorder.

Abstract: A system for exchanging information in an on-chip communication network using optical flow information for communication between Intellectual Property cores. The information is exchanged between a plurality of initiators and targets in the Intellectual Property cores. The system includes a router for propagating optical flow information from the initiators to the targets. Each initiator includes an interface to convert the traffic generated by the initiator and transmit it in the form of an optical flow within the on-chip communication network, and each target includes an interface to convert information from the optical form into the electrical form. The system is organized as a parametric system and includes programming module to define a first set of high level parameters, a second set of initiator network interface parameters and a third set of target network interface parameters.

Abstract: The present invention relates to a receiver apparatus and method of channel estimation in a telecommunication system which provides at least two pilot sequences, and to a computer program product. Channel estimation is achieved by estimating channel taps separately for each of the at least two pilot sequences in every transmission block, and for applying estimated channel taps obtained from the estimation to at least one of a temporal and spatial filtering or combining operation to refine the channel estimate. Accordingly, temporal correlations and cross-correlations of the at least two pilot sequences are exploited without requiring knowledge of path delays and beamforming parameters.

Abstract: A write boost circuit provides an automatic mode control for boost with different modalities with respect to the external supply voltage and also with respect to the extent of boost required at different process corners. The write boost circuit also takes care of the minimum boost provided to process corners with good writability where less boost is required. The boost is realized in terms of ground raising in the particular context and in general applicable to all other methods.

Abstract: This invention relates to cognitive radio based wireless communications of dynamic spectrum access networks, and in particular to a method of addressing zero-delay frequency switching for cognitive dynamic frequency hopping. The method combines regular (periodic) channel maintenance with dynamic frequency hopping over a cluster of vacated channels that are initially setup such that the switching delays for channel setup and channel availability check are eliminated.

Abstract: A multi-threshold complementary metal-oxide semiconductor technology (MTCMOS technology) master slave flip-flop with a single clock signal includes a master storage element configured to store an input data in response to a clock signal transition and a slave storage element configured to receive data from the master storage element and to output the received data in response to an opposite clock signal transition. The master storage element includes low threshold voltage transistors, the slave storage element includes high threshold voltage transistors, and the master and the slave storage elements are provided with a single clock signal.

Abstract: A common control channel for base station (“BS”)/consumer premise equipment (“CPE”) communication in areas of overlapping coverage by wireless regional area network (“WRAN”) cells operating on different working channels is disclosed. A common control channel is selected from among the various working channels sensed in each of a plurality of overlapping WRAN cells so as to enable BS/CPE and BS/BS communication. Once chosen, each CPE within the overlapping area communicates with the controlling BS via an enhanced coexistence beacon protocol messages. These messages include timing and other synchronization information.

Abstract: A video decoder receiving an encoded bit stream includes a header decoder which receives the encoded bit stream, a variable length decoder connected to the header decoder which receives the header decoded data, a quantizer and compensator connected to the variable length decoder, for, during backward decoding, performing inverse quantization, transformation and motion compensation of the variable length decoded data.

Abstract: The invention relates, in general, to the field of magnetic sensors and accelerometers and the utilization of the same as magnetometers, magnetic compasses, range finders, navigational systems and other applications. More particularly, the invention relates to effective, simplified and highly accurate techniques for calibration of magnetic sensors and accelerometers.

Abstract: A low-dropout linear regulator includes an error amplifier comprising a cascaded arrangement of a differential amplifier and a gain stage having interposed therebetween a frequency compensation network for a loading current to flow therethrough. The regulator includes a current limiter inserted the flow-path of the loading current for the compensation network to increase the slew rate of the output of the differential amplifier by dispensing with the capacitive load in the frequency compensation network during load transients in the regulator.

Abstract: This method of reading a plurality of chip sample values at tap positions (66, 68) in a digital delay line (64) having a starting point and an end point for delaying symbols of a signal (82) received in a receiver comprises:—reading the plurality of chip sample values in the digital delay line (64) at the tap positions (66, 68) according to a chip rate clock (70) having a chip rate clock cycle and a chip rate clock frequency,—oversampling the received signal (82) according to a sample rate clock (84) having a sample rate clock cycle and a sample rate clock frequency to produce a plurality of chip sample values supplied in the digital delay line (64), the sample rate clock frequency being higher than the chip rate clock frequency,—shifting the tap positions (66, 68) towards either the starting point or the end point of the digital delay line (64), and—adjusting the chip rate clock cycle when shifting the tap positions.

Abstract: A protein according to the invention can be used to detect or measure calcium ions is provided. Further the protein is useful as a reporter protein or a luminescence marker. A polynucleotide according to the invention is also useful as a reporter gene.

Abstract: A flexible semiconductor package is formed by interposing a flexible substrate between a tungsten stiffener and a die. A tungsten stiffener is bonded to a first surface of the flexible substrate prior to flip chip bonding or die attach of a die to a second surface of the flexible substrate. The tungsten stiffener is dimensioned so as to substantially overlap the die and provide a rigid and flat surface on which the die/flexible substrate bonding occurs. The flat and rigid characteristic of a tungsten stiffener optimizes the electrical and mechanical bond between the die and the flexible substrate as well as minimizing CTE mismatch.

Abstract: A capacitance compensation circuit includes a plurality of switches having a first node coupled to an input terminal, a plurality of capacitors each coupled to a respective second node of the plurality of switches, and an adjustment circuit for providing a plurality of adjustable bias levels to a plurality of switch control nodes to precisely compensate for linear and parabolic voltage dependent components of an input or other capacitor. Two such circuits can be used with a single input terminal to compensate for both increasing and decreasing voltage dependent characteristics of a target capacitor.

Abstract: Ion injection is performed to a single crystal silicon wafer to form an ion injection layer, with the ion injection surface of the single crystal silicon wafer and/or the surface of the transparent insulation substrate are/is processed using plasma and/or ozone. The ion injection surface of the single crystal silicon wafer and the surface of the transparent insulation substrate are bonded to each other by bringing them into close contact with each other at room temperature. A silicon on insulator (SOI) wafer is obtained by mechanically peeling the single crystal silicon wafer by giving an impact to the ion injection layer, to form an SOI layer on the transparent insulation substrate, and thermal processing for flattening the SOI layer surface is performed to the SOI wafer, under an atmosphere of an inert gas, a hydrogen gas, and a mixture gas of them.

Abstract: A capacitance compensation circuit includes a plurality of switches having a first node coupled to an input terminal, a plurality of capacitors each coupled to a respective second node of the plurality of switches, and an adjustment circuit for providing a plurality of adjustable bias levels to a plurality of switch control nodes to precisely compensate for linear and parabolic voltage dependent components of an input or other capacitor. Two such circuits can be used with a single input terminal to compensate for both increasing and decreasing voltage dependent characteristics of a target capacitor.