Abstract: A metal wiring layer and a method of fabricating the metal wiring layer are provided. The method includes forming a dielectric layer on a substrate, forming a plurality of dielectric layer patterns and holes therein on the substrate by etching part of the dielectric layer, with a cross sectional area of the holes in the dielectric layer patterns decreasing with increasing distance away from the substrate and the holes exposing the substrate, forming a trench by etching a portion of the substrate exposed through the holes in the dielectric layer patterns, and forming a metal layer which fills the trench and the holes in the dielectric layer patterns. Thus, it is possible to prevent the occurrence of an edge build-up phenomenon by forming a metal layer in a plurality of holes in the dielectric layer patterns having a cross sectional area decreasing with increasing distance away from the substrate.

Abstract: A back cover for a backlight assembly capable of achieving a more compact a display apparatus includes a cover element, a line portion, and a plurality of point light sources. The cover element includes a metallic layer, and the cross-section of the cover element has an L-shape. The line portion is formed over the cover element. The point light sources are mounted on the surface of the cover element to receive a driving voltage from the line portion. A bottom cover portion of the cover element covers an opening portion. A side cover portion of the cover element faces the side wall. The point light sources mounted on the cover element emit light on a side surface of a light guide plate.

Abstract: A thin film transistor array panel, according to an embodiment of the present invention, includes a first data line, a second data line neighboring the first data line, a transistor disposed in a region between the first data line and the second data line, and a pixel electrode disposed close to the second data line among the first and second data lines. An extension of the pixel electrode may cross the second data line, thereby being connected to the transistor. Accordingly, it may not be necessary to use an additional connecting member between the pixel electrode and the data line such that the process may be shortened and the structure of the wiring may be simplified. Also, the spatial utility may be increased to improve the degree of integration.

Abstract: A mother substrate for a liquid crystal display panel includes a plurality of antistatic circuits connected with driving signal lines, respectively, and a plurality of switching circuits interposed between adjacent antistatic circuits of the antistatic circuits, respectively. Each switching circuit is controllable to electrically interconnect the adjacent antistatic circuits to one another when an inspection of a post-production available area is performed, and to electrically isolate the adjacent antistatic circuits from one another when a normal operation of the post-production available area is performed.

Abstract: A manufacturing method of a flat panel display according to an exemplary embodiment of the present invention includes: coating a first adhering member on a first supporting plate; disposing a first substrate on the first adhering member; using ultrasonic waves to adhere the first supporting plate and the first substrate; and forming a gate line, a data line, a thin film transistor connected to the gate line and the data line, and a pixel electrode connected to the thin film transistor on the first substrate. According to the manufacturing method of the flat panel display according to an exemplary embodiment of the present invention, the first adhering member made of the plurality of adhering particles is melted by using the ultrasonic waves without an additional adhering film to adhere the flexible first substrate and the first supporting plate, thereby reducing the overall manufacturing cost.

Abstract: The disclosure describes a liquid crystal display panel including a plurality of sub-pixels, a plurality of thin film transistors, a plurality of data lines, and a plurality of gate lines. Each of the sub-pixels has first and second gray scale regions which are split up and down and have different areas, first and second gray scale regions of one sub-pixel having a staggered arrangement with respect to those of an adjacent sub-pixel. Thin film transistors are connected to first and second gray scale regions so that first gray scale regions are driven when one of gate lines is driven and the second gray scale regions are driven when another gate line is driven.

Abstract: A backlight assembly and a display device including the backlight assembly are provided for one or more embodiments, where the display device is slim, lightweight, and requires low manufacturing costs because the device integrates a receiving container and a light generating unit cover member. According to an embodiment, the backlight assembly includes a first light generating unit, a wire electrically connected to the first light generating unit, a first fixing member including a groove to fix the first light generating unit and a wire outlet, and a receiving container comprising a light generating unit cover member. The first fixing member includes a protruding portion extending outwardly from the receiving container and the wire outlet formed on the protruding portion.

Abstract: A thin film transistor array panel is provided, which includes a substrate, a plurality of gate line formed on the substrate, a plurality of common electrodes having a transparent conductive layer on the substrate, a gate insulating layer covering the gate lines and the common electrodes, a plurality of semiconductor layers formed on the gate insulating layer, a plurality of data lines including a plurality of source electrodes and formed on the semiconductor layer and the gate insulating layer, a plurality of drain electrodes formed on the semiconductor layer and the gate insulating layer, and a plurality of pixel electrodes overlapping the common electrodes and connected to the drain electrodes.

Abstract: The present invention relates to a display device. The display device includes a display panel having gate lines and data lines, a driving chip mounted on the display panel, and a flexible printed circuit film (FPC) attached to the display panel. The display panel includes a plurality of first to third pads, a first switching element, a second switching element, a first test pad, and a second test pad. The plurality of first to third pads are sequentially disposed and electrically connected with each other. The first switching element is interposed between the first pad and the second pad. The second switching element is connected to the third pad. The first test pad is commonly connected to control terminals of the first and second switching elements. The second test pad is connected to an input terminal of the second switching element. According to the present invention, processing time and production yield can be increased by improving the detection performance in a visual inspection test process.

Abstract: Display systems that employ input gamma dithering and dynamic backlight control. Embodiments relate to disabling input gamma dithering during periods when there is a change in the scale value by which image data is scaled due to dynamic backlight control. In this manner, input gamma dithering is selectively applied only during those times when data scaling due to dynamic backlight control is constant.

Abstract: A method of manufacturing is disclosed for an electrophoretic display apparatus that includes an array substrate and an electrophoretic film laminated to the array substrate. A thermally activated adhesive is used to adhesively attach the electrophoretic film to the array substrate. The electrophoretic film is first aligned to and flattened against the array substrate and then a substantially stronger than original adhesion property of the adhesive is activated by annealing at a high temperature that is substantially greater than room temperature. Rework prior to annealing is therefore possible when alignment errors occur between the electrophoretic film and the array substrate.

Abstract: The present invention relates to an organic light emitting display device and a method for processing image signals thereof.

Abstract: A pixel unit of a liquid crystal display includes a first sub-pixel electrode coupled by a direct current path to a corresponding switching element and a second sub-pixel electrode capacitively connected to the first sub-pixel electrode. The second sub-pixel electrode has a protrusion extending upwardly toward a spaced apart common electrode. The common electrode has a cut-out directly above the protrusion.

Abstract: If a pixel (106) of an image is displayed in a subpixel area (124) which does not contain a primary color needed to display the pixel, and saturated colors are present in or adjacent to the subpixel area, then some of the pixel's luminance is shifted (850) to adjacent subpixel areas on one but not both sides of the pixel to avoid blurring the pixel. Other embodiments are also provided.

Abstract: One or more embodiments of a display substrate include a base substrate and a pixel electrode. The base substrate has a pixel area defined thereon. The pixel electrode includes a low pixel electrode formed in the pixel area to receive a first voltage, a high pixel electrode spaced apart from the low pixel electrode along a first direction to receive a second voltage that is higher than the first voltage, and a liquid crystal molecule control part formed on at least one of the low and high pixel electrodes so as to control liquid crystal molecules disposed at an area corresponding to a boundary of the low and high pixel electrodes. The liquid crystal molecules disposed at a domain corresponding to a boundary between the low and high pixel electrodes may be controlled, so that the generation of stains or afterimages may be prevented at a boundary of domain areas.

Abstract: A thin film transistor array panel for a flat panel display includes a substrate, a first signal line formed on the substrate, a second signal line intersecting and insulated from the first signal line, a switching element having a first terminal connected to the first signal line, a second terminal connected to the second signal line, and a third terminal, a pixel electrode connected to the third terminal of the switching element, and first and second light blocking members extending parallel to the second signal line, each being disposed on an opposite side of and partially overlapping an respective edge of the second signal line, an interval between the first and second light blocking members being in a range of from more than 1.5 ?m to less than 4 ?m. The array panel prevents light leakage from the display and improves its transmittance, aperture ratio and color reproducibility.

Abstract: Provided is a thin-film transistor (TFT) substrate. The TFT substrate includes: an insulating substrate; a semiconductor pattern which is formed on the insulating substrate, the semiconductor pattern having a top surface and a bottom surface; a source electrode and a drain electrode which are disposed on the top and bottom surfaces of the semiconductor pattern, respectively; a gate electrode which is disposed alongside the semiconductor pattern with a gate insulating film interposed therebetween; a data line which is connected to the source electrode and extends in a first direction; a gate line which is connected to the gate electrode and extends in a second direction; and a pixel electrode which is connected to the drain electrode and is formed in a pixel region.

Abstract: A display panel and a method of manufacturing the same are provided, which can prevent the deterioration of input sensitivity to the panel, and maximize the aperture ratio of the panel. The display panel includes a first substrate, a gate line and a data line crossing each other on the first substrate, in a manner that the gate line and the data line are electrically insulated from each other. The display panel further comprises a first sensor wire formed in parallel to the data line, a second sensor wire formed to overlap the data line in parallel to the data line, a second substrate arranged opposite to the first substrate, and a sensor spacer formed on the second substrate to project toward the first substrate.

Abstract: Provided is a display device for an embodiment in which a central axis of a light guide plate (LGP) and a central axis of one or more light sources are matched with each other to maximize efficiency of the light sources, and which has an ultra-slim structure. The display device may include: a display panel which displays an image; an LGP which guides light to the display panel; light sources which are disposed on a side of the LGP and provide light to the LGP; a circuit board which is disposed on a side of the display panel with the light sources mounted on a surface thereof, and driving chips which drive the display panel mounted on an opposite surface thereof; and a frame which houses the LGP and the light sources and on which the circuit board and the display panel are mounted.

Abstract: A signal processing device includes a memory in which a color correction data is stored. The memory stores a first color correction data having the same number of bits as an input image data and a second color correction data having fewer number of bits than the input image data. The number of color correction data corresponding to a low gray-scale range increases and the number of color correction data corresponding to a high gray-scale range decreases by the same amount that the number of the color correction data corresponding to the low gray-scale range increased. Thus, a color characteristic corresponding to the low gray-scale range may be improved without changing the total number of color correction data.