Patents Represented by Attorney Intellectual Property Law Office
  • Patent number: 8339245
    Abstract: A charge accumulation circuit having a structure in which a capacitor is divided into a plurality of pieces and the divided capacitors are connected in parallel through switches is provided. The charge accumulation circuit controls the switch provided between the capacitors and thus can dynamically vary electrostatic capacitance of the charge accumulation circuit which applies a voltage to a constant voltage circuit.
    Type: Grant
    Filed: October 7, 2011
    Date of Patent: December 25, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daisuke Kawae, Takayuki Ikeda, Munehiro Kozuma
  • Patent number: 8338827
    Abstract: In a thin film transistor which uses an oxide semiconductor, buffer layers containing indium, gallium, zinc, oxygen, and nitrogen are provided between the oxide semiconductor layer and the source and drain electrode layers.
    Type: Grant
    Filed: November 4, 2009
    Date of Patent: December 25, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Tetsunori Maruyama, Yuki Imoto, Yuji Asano, Junichi Koezuka
  • Patent number: 8338270
    Abstract: First etching is performed on a surface of a single crystal semiconductor layer formed with no substrate bias applied. The single crystal semiconductor layer is formed by attaching a single crystal semiconductor substrate including an embrittled region to a supporting substrate so that an oxide layer is sandwiched between the single crystal semiconductor substrate and the supporting substrate and separating the single crystal semiconductor substrate into the single crystal semiconductor layer and part of the single crystal semiconductor substrate at the embrittled region. After the first etching, the single crystal semiconductor layer is irradiated with a laser beam and at least part of the surface of the single crystal semiconductor layer is melted and solidified. Then, second etching is performed on the surface of the single crystal semiconductor layer with no substrate bias applied.
    Type: Grant
    Filed: October 12, 2011
    Date of Patent: December 25, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Kosei Noda
  • Patent number: 8339828
    Abstract: An object of the present invention is to provide a semiconductor device combining transistors integrating on a same substrate transistors including an oxide semiconductor in their channel formation region and transistors including non-oxide semiconductor in their channel formation region. An application of the present invention is to realize substantially non-volatile semiconductor memories which do not require specific erasing operation and do not suffer from damages due to repeated writing operation. Furthermore, the semiconductor device is well adapted to store multivalued data. Manufacturing methods, application circuits and driving/reading methods are explained in details in the description.
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: December 25, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Kiyoshi Kato
  • Patent number: 8339562
    Abstract: Using thin film transistors (TFTs), an active matrix circuit, a driver circuit for driving the active matrix circuit or the like are formed on one substrate. Circuits such as a central processing unit (CPU) and a memory, necessary to drive an electric device, are formed using single crystalline semiconductor integrated circuit chips. After the semiconductor integrated circuit chips are adhered to the substrate, the chips are connected with wirings formed on the substrate by a chip on glass (COG) method, a wire bonding method or the like, to manufacture the electric device having a liquid crystal display (LCD) on one substrate.
    Type: Grant
    Filed: October 21, 2009
    Date of Patent: December 25, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuhiko Takemura
  • Patent number: 8338196
    Abstract: The present invention provides a light-emitting element having less increase in driving voltage with the accumulation of light-emission time, and provides a light-emitting element having less increase in resistance value with the increase in film thickness. A light-emitting element includes a first layer, a second layer and a third layer between a first electrode and a second electrode. The first layer is provided to be closer to the first electrode than the second layer, and the third layer is provided to be closer to the second electrode than the second layer. The first layer is a layer including an aromatic amine compound and a substance showing an electron accepting property to the aromatic amine compound. The second layer includes a substance of which an electron transporting property is stronger than a hole transporting property, and a substance showing an electron donating property to the aforementioned substance.
    Type: Grant
    Filed: August 2, 2011
    Date of Patent: December 25, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daisuke Kumaki, Satoshi Seo
  • Patent number: 8338257
    Abstract: An object of the present invention is to provide a nonvolatile semiconductor storage device with a superior charge holding characteristic in which highly-efficient writing is possible at low voltage, and to provide a manufacturing method thereof. The nonvolatile semiconductor storage device includes a semiconductor film having a pair of impurity regions formed apart from each other and a channel formation region provided between the impurity regions; and a first insulating film, a charge accumulating layer, a second insulating film, and a conductive film functioning as a gate electrode layer which are provided over the channel formation region. In the nonvolatile semiconductor storage device, a second barrier formed by the first insulating film against a charge of the charge accumulating layer is higher in energy than a first barrier formed by the first insulating film against a charge of the semiconductor film.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: December 25, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 8338830
    Abstract: The present invention provides a manufacturing method of a semiconductor device, which is able to improve on-current and mobility of a polycrystal TFT without disturbing a high integration level, and also provide a semiconductor device obtained in accordance with the manufacturing method.
    Type: Grant
    Filed: May 2, 2005
    Date of Patent: December 25, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Tamae Takano
  • Patent number: 8338226
    Abstract: An object is to provide a thin film transistor including an oxide semiconductor layer, in which the contact resistance between the oxide semiconductor layer and source and drain electrode layers is reduced and whose electric characteristics are stabilized. Another object is to provide a method for manufacturing the thin film transistor. The thin film transistor including an oxide semiconductor layer is formed in such a manner that buffer layers whose conductivity is higher than that of the oxide semiconductor layer are formed and the oxide semiconductor layer and the source and drain electrode layers are electrically connected to each other through the buffer layers. In addition, the buffer layers whose conductivity is higher than that of the oxide semiconductor layer are subjected to reverse sputtering treatment and heat treatment in a nitrogen atmosphere.
    Type: Grant
    Filed: March 29, 2010
    Date of Patent: December 25, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuji Asano, Junichi Koezuka
  • Patent number: 8340457
    Abstract: The present invention provides an image analysis method and an image analysis program having a feature of carrying out a panel display quality evaluation at low cost and short time with relieved influence of moire by treating a value, which is obtained by recognizing a coordinate of a panel pixel in a shot image based on an image for detecting a coordinate and positional information thereof with high accuracy and by calculating average luminance by panel pixel unit based on a center position of a coordinate, as representative luminance in each pixel of the panel, in a panel evaluation method of shooting an image display panel with a digital camera.
    Type: Grant
    Filed: June 17, 2011
    Date of Patent: December 25, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masahiko Hayakawa, Tatsuji Nishijima
  • Patent number: 8334540
    Abstract: The protective circuit is formed using a non-linear element which includes a gate insulating film covering a gate electrode; a first wiring layer and a second wiring layer which are over the gate insulating film and whose end portions overlap with the gate electrode; and an oxide semiconductor layer which is over the gate electrode and in contact with the gate insulating film and the end portions of the first wiring layer and the second wiring layer. The gate electrode of the non-linear element and a scan line or a signal line is included in a wiring, the first or second wiring layer of the non-linear element is directly connected to the wiring so as to apply the potential of the gate electrode.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: December 18, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto, Shigeki Komori, Hideki Uochi, Tomoya Futamura, Takahiro Kasahara
  • Patent number: 8334719
    Abstract: An object is to provide a semiconductor device that can realize a function of a thyristor without complication of the process. A semiconductor device including a memory circuit that stores a predetermined potential by reset operation and initialization operation is provided with a circuit that rewrite data in the memory circuit in accordance with supply of a trigger signal. The semiconductor device has a structure in which a current flowing through the semiconductor device is supplied to a load by rewriting data in the memory circuit, and thus can function as a thyristor.
    Type: Grant
    Filed: November 10, 2010
    Date of Patent: December 18, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Kazunori Watanabe
  • Patent number: 8334537
    Abstract: A method of manufacturing, with high mass productivity, light-emitting devices having highly reliable thin film transistors with excellent electric characteristics is provided. In a light-emitting device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: December 18, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yukie Suzuki, Hideaki Kuwabara
  • Patent number: 8334535
    Abstract: To provide a wireless identification semiconductor device provided with a display function, which is capable of effectively utilizing electric power supplied by an electromagnetic wave. The following are included: an antenna; a power source generating circuit electrically connected to the antenna; an IC chip circuit and a display element electrically connected to the power source generating circuit; a first TFT provided in the power source generating circuit; a second TFT provided in the IC chip circuit; a third TFT provided in the display element; an insulating film provided to cover the first to third TFTs; a first source electrode and a first drain electrode, a second source electrode and a second drain electrode, and a third source electrode and a third drain electrode which are formed over the insulating film; and a pixel electrode electrically connected to the third source electrode or the third drain electrode.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: December 18, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Tokunaga
  • Patent number: 8335972
    Abstract: A soft decision device and method for obtaining a soft decision value as a value expressing a probability as near the actual probability as possible by simple processing. The soft decision device and method are used to output a soft decision value for each bit of each symbol used for decoding the each symbol as a value corresponding to the function value obtained by applying a predetermined function for each bit to the sampled value of the each symbol according to the demodulated signal such that the probability distribution of the sampled value in each symbol point is the Gauss distribution. The function for each bit is approximated to a curve expressing the probability that each bit is 1 or 0 for the sampled value of each symbol of the demodulated signal and defined by using a quadratic function.
    Type: Grant
    Filed: May 20, 2008
    Date of Patent: December 18, 2012
    Assignee: Kabushiki Kaisha Kenwood
    Inventor: Taichi Majima
  • Patent number: 8334057
    Abstract: The present invention provides a light-emitting element, a light-emitting device and an electronic device in which an optical path length through which generated light goes can be changed easily. The present invention provides a light-emitting element including a light-emitting layer between a first electrode and a second electrode, and a mixed layer in contact with the first electrode; in which the light-emitting layer includes a light-emitting substance; the mixed layer includes a hole transporting substance and a metal oxide showing an electron accepting property to the hole transporting substance, and has a thickness of 120 to 180 nm, and when a voltage is applied between the first electrode and the second electrode such that a potential of the first electrode is higher than that of the second electrode, the light-emitting substance emits light.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: December 18, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichiro Sakata, Hisao Ikeda, Tomoya Aoyama, Takahiro Kawakami, Yuji Iwaki, Satoshi Seo
  • Patent number: 8330165
    Abstract: In fabricating a thin film transistor, an active layer comprising a silicon semiconductor is formed on a substrate having an insulating surface. Hydrogen is introduced into The active layer. A thin film comprising SiOxNy is formed to cover the active layer and then a gate insulating film comprising a silicon oxide film formed on the thin film comprising SiOxNy. Also, a thin film comprising SiOxNy is formed under the active layer. The active layer includes a metal element at a concentration of 1×1015 to 1×1019 cm?3 and hydrogen at a concentration of 2×1019 to 5×1021 cm?3.
    Type: Grant
    Filed: June 12, 2009
    Date of Patent: December 11, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Satoshi Teramoto
  • Patent number: 8330887
    Abstract: It is an object to provide a liquid crystal display device and an electronic device of which aperture ratio increases. The present invention includes a substrate having an insulating surface, a transistor formed over the substrate, a pixel electrode electrically connected to the transistor. The transistor includes a gate electrode, a gate insulating layer over the gate electrode, a semiconductor layer having a microcrystalline structure over the gate insulating layer, and a buffer layer over the semiconductor layer having the microcrystalline structure. The channel width W of the transistor and the channel length L of the transistor satisfy a relation of 0.1?W/L?1.7.
    Type: Grant
    Filed: July 15, 2008
    Date of Patent: December 11, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiyuki Kurokawa, Takayuki Ikeda, Takeshi Osada, Takayuki Inoue
  • Patent number: 8330221
    Abstract: It is an object to form single-crystalline semiconductor layers with high mobility over approximately the entire surface of a glass substrate even when the glass substrate is increased in size. A first single-crystalline semiconductor substrate is bonded to a substrate having an insulating surface, the first single-crystalline semiconductor substrate is separated such that a first single-crystalline semiconductor layer is left remaining over the substrate having an insulating surface, a second single-crystalline semiconductor substrate is bonded to the substrate having an insulating surface so as to overlap with at least part of the first single-crystalline semiconductor layer provided over the substrate having an insulating surface, and the second single-crystalline semiconductor substrate is separated such that a second single-crystalline semiconductor layer is left remaining over the substrate having an insulating surface.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: December 11, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Koichiro Tanaka
  • Patent number: 8329536
    Abstract: To improve a charge retention characteristic of a nonvolatile memory transistor. A first insulating film, a charge trapping film, and a second insulating film are formed between a semiconductor substrate and a conductive film. The charge trapping film is formed of a silicon nitride film including an upper region having a low concentration of hydrogen and a lower region having a high concentration of hydrogen. Such a silicon nitride film is formed in such a manner that a silicon nitride film including 15 atomic % or more hydrogen is formed by a chemical vapor deposition method and an upper portion of the silicon nitride film is nitrided. The nitridation treatment is performed by nitriding the silicon nitride film by nitrogen radicals produced in plasma of a nitrogen gas.
    Type: Grant
    Filed: July 27, 2011
    Date of Patent: December 11, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Kosei Noda