Patents Represented by Attorney J. T. Cavender
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Patent number: 4412252Abstract: A system is provided for reducing the total information contained in an image in order to reduce the size of the image. In an image comprising a number of lines, each line including a plurality of dots, first reduction means deletes data representing a predetermined proportion of dots spaced at regular intervals along each line, during the storage of said data in a storage device comprising part of the system. Second reduction means deletes data representing a predetermined proportion of the total lines of the image during the output of the data representing the lines from the storage device of the system.Type: GrantFiled: June 1, 1981Date of Patent: October 25, 1983Assignee: NCR CorporationInventors: Robert S. Moore, Walter F. Wessel, III
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Patent number: 4412232Abstract: An ink jet printer includes a print head having a plurality of piezoelectric driving elements selectively energizable to cause ejection of droplets of ink through nozzles in a nozzle plate. Ink is supplied to the print head from an ink reservoir which is connected to a bellows device. The ink reservoir and the bellows device together form an air-tight container. The bellows device has a resilient form of construction so as to tend to increase the volume of the container. As a result, an appropriate underpressure is maintained in respect of the ink in the nozzles, such underpressure being necessary to prevent ink escaping from the nozzles under quiescent conditions. In operation, the bellows device progressively collapses so as to reduce the rate at which the underpressure increases as ink is ejected, thereby prolonging the period for which the underpressure is maintained within a desired operating range.Type: GrantFiled: April 15, 1982Date of Patent: October 25, 1983Assignee: NCR CorporationInventors: Helmut Weber, Peter H. Reitberger, Leonhard Bader, Walter Konig
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Patent number: 4409727Abstract: A pair of narrow channel IGFET devices having separate insulated gate electrode structures formed over narrow channel regions of a substrate flanking a central enhancement region. Methods of forming the narrow channel regions using a single photolithography step and forming separate gate electrode structures overlying each using alternative processes, each generally involving two photolithography steps, are set forth.Type: GrantFiled: September 28, 1982Date of Patent: October 18, 1983Assignee: NCR CorporationInventors: Philip A. Dalton, Jr., Lowell C. Bergstedt
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Patent number: 4410965Abstract: A system is provided for the storage and decoding of data which may be used to produce an image. A storage device is functionally divided into a number of sections, so that data may be read from certain sections of the device at a time when other sections have not been completely loaded with data. A decoding memory is utilized for the decoding of information which has previously been encoded at an earlier stage, so that the decoded information can then be applied to a utilizing device. The same read address counter is used to address corresponding locations in the storage device and the decoding memory, and the data output from these two addresses is compared to provide decoded data which constitutes the output information, and which is also written back into the corresponding location of the decoding memory, to be employed in the next comparison operation.Type: GrantFiled: September 18, 1981Date of Patent: October 18, 1983Assignee: NCR CorporationInventor: Robert S. Moore
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Patent number: 4409680Abstract: An electronic circuit for regulating the entry of new data into a static synchronous register comprising a bank of D type, master-slave flip-flops. The circuit selectively passes the first phase of a two-phase, nonoverlapping clock signal used for synchronization and control of the data. A bootstrap operated, series pass, transistor configuration couples the first phase signal to the electrode actuating the master stage of each flip-flop. With provisions for the series pass transistor to transition into a conductive state prior to the onset of the first phase signal, the circuit ensures substantial replication of the first phase signal characteristics in terms of both time and amplitude.Type: GrantFiled: August 27, 1981Date of Patent: October 11, 1983Assignee: NCR CorporationInventors: Vernon K. Schnathorst, Gary T. Bastian
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Patent number: 4408342Abstract: An optical character recognition system and method therefor is disclosed for reading a machine encoded character font, such as the E13B magnetic ink character (MICR) font. The digitized data of an optical scan band of the document to be read is read by an optical scanner and stored in memory. A two pass operation of the digitized data is then performed by the respective algorithms of the system to locate and recognize the characters read.Type: GrantFiled: April 16, 1981Date of Patent: October 4, 1983Assignee: NCR CorporationInventors: John S. Grabowski, Chin-Chih Shiau, John R. Latala
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Patent number: 4406553Abstract: A cassette for storing a ribbon having a top portion and a bottom portion. The top portion has a front area having a print station area thereat and a rear area, and also has a first resilient arm having one end extending from the front area to the rear area and also having a free end. A ribbon supply reel is rotatably supported on the first arm and the top portion also has a second resilient arm formed therewith having a free end which engages the rim of the supply reel to form a drag thereon. The ribbon from the supply reel passes around the free end of the first arm, around a ribbon usage sensor, to the print station and is withdrawn back into the cassette by a take up reel located underneath the supply reel, with the take-up reel driven by a spindle.Type: GrantFiled: December 21, 1981Date of Patent: September 27, 1983Assignee: NCR CorporationInventors: Rickard P. Nally, Elbert H. Vandenham
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Patent number: 4405868Abstract: A signal generator for producing, from a low voltage power supply, relatively large magnitude pulse signals of opposite polarity to a device input terminal having a parallel resistor-capacitor circuit connection to a reference voltage. A voltage multiplier powered by the low voltage power supply provides a multiplied voltage output which is stored on a first large capacitor. A second large capacitor has one terminal connected to the device input terminal. To produce the large, opposite polarity signals, a control circuit means operates in conjunction with the voltage multiplier and the first capacitor to produce a predetermined sequence of voltages on the second terminal of the second capacitor.Type: GrantFiled: June 11, 1981Date of Patent: September 20, 1983Assignee: NCR CorporationInventor: George C. Lockwood
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Patent number: 4403213Abstract: A digital controller used in regulating the output of a power supply including a diagnostic circuit for sensing the failure of a component in the power supply. Upon the occurrence of a fault, signals are generated locating the component which caused the shutdown of the power supply. The fault signals are inputted into a plurality of encoders which determine the priority between two or more simultaneous occurring faults and which further outputs binary signals identifying the faulty component. The binary signals are then latched and displayed in a LED display which may be actuated any time after the fault has occurred by the operation of a switch member.Type: GrantFiled: March 11, 1981Date of Patent: September 6, 1983Assignee: NCR CorporationInventors: Ishwar S. Khamare, Rodney V. Hamilton
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Patent number: 4402185Abstract: Disclosed is a two-stage thermoelectric heat pumping apparatus for heating/cooling an I.C. chip. The first stage is a primary thermoelectric module sandwiched between a base made of a high thermal conductivity material and functioning as a heat source/sink and a heat conductive pad. The second stage is a secondary thermoelectric module sandwiched between the pad and a heat conductive block designed to receive a slotted I.C. chip socket at the top portion thereof and provided with a contact surface such that, upon insertion into the socket, the chip is in direct contact with said contact surface. By passing suitable currents through all the thermoelectric modules heat is pumped, in the heating mode, from the base (source) to the chip and, in the cooling mode, from the chip to the base (sink).Type: GrantFiled: January 7, 1982Date of Patent: September 6, 1983Assignee: NCR CorporationInventor: Robert M. Perchak
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Patent number: 4403283Abstract: An extended memory system includes a processor, a plurality of input/output devices, a real memory having first and second portions thereof, the first portion storing a system operation program and the second portion storing a plurality of user programs. The processor produces logical addresses when executing user programs or input/output routines, which logical addresses are translated to real memory addresses by one of two first translation memories. System operation instructions common to all user programs are stored in a low order address portion of the real memory. Different user programs are mapped into mutually exclusive portions of the real memory by means of the two translation memories.Type: GrantFiled: July 28, 1980Date of Patent: September 6, 1983Assignee: NCR CorporationInventors: Jon N. Myntti, Kirk P. Anderson, Jay R. Hosler
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Patent number: 4400049Abstract: A connector for connecting coplanar circuit boards in an edge-to-edge fashion. The connector has a housing with a circuit board receiving cavity extending through and between opposite faces of the housing. The cavity has two opposing side walls which support electrical terminals for contacting conductors on the edges of circuit boards that are inserted into the cavity at the opposing faces of the housing. A passage extends transversely through the housing and intersects the cavity and receives a pin for engaging the terminals and maintaining them fixed within the housing. The edge-to-edge connection of two or more coplanar circuit boards is provided by use of the connector.Type: GrantFiled: August 12, 1981Date of Patent: August 23, 1983Assignee: NCR CorporationInventor: David B. Schuck
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Patent number: 4400661Abstract: A regulator circuit which provides voltage regulation for a normal power supply and a battery used in a battery back-up system. A first portion of the circuit detects when the battery is about to go into a deep discharge condition (when operated in the battery back-up mode) and a second portion of the circuit is used to regulate the output voltage to a load. When the first portion of the circuit detects the deep discharge condition, it disconnects the load and the second portion of the circuit from the battery. The first portion of the circuit draws a very small current.Type: GrantFiled: October 2, 1981Date of Patent: August 23, 1983Assignee: NCR CorporationInventor: Raymond S. Duley
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Patent number: 4399467Abstract: A data compression system which generates several types of symbols from bands of data derived from the digital image. Each group of data bits located in the same bit position across the data band is represented by a mode symbol, which signifies the decimal value of the binary combination of the data contained in that group. The mode symbol is followed by a run symbol, which represents the number of times or incremental positions that the same mode occurs successively until a different mode is generated. Mode and run symbols are transmitted in alternation, with each mode symbol followed by its corresponding run symbol, to an encoder, which generates variable length code words that are transmitted to a receiving station and decoded to provide symbols which are used to form a facsimile image. In one embodiment of this system, the mode and run symbols are combined to form a different type of symbol, known as a ternary octade symbol, to further improve the compression performance of the system.Type: GrantFiled: October 13, 1981Date of Patent: August 16, 1983Assignee: NCR Canada Ltd.Inventor: Ambati Subramaniam
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Patent number: 4398711Abstract: An apparatus for monitoring the performance of a currency dispenser by detecting the displacement of a roller caused by the thickness of a record member. This displacement is measured by the movement of a graded density translucent member between the photodiode and sensor of a detector. Electronic circuitry associated with the detector indicates the presence of a record member between the rollers, and also the presence of multiple record members. The fabrication of the member allows the circuitry to detect only the displacement from the static position of the rollers, eliminating the necessity for adjustment due to wear, temperature, and other mechanical factors.Type: GrantFiled: August 7, 1981Date of Patent: August 16, 1983Assignee: NCR CorporationInventors: William R. Horst, Robert H. Granzow
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Patent number: 4398098Abstract: An electronic latching circuit is described for incorporation into an electronic equipment which includes a battery, a load and a power supply. During shipment or storage of the equipment, the electronic latching circuit electrically isolates the battery from the load. The first time that the equipment is put into operation and turned on after shipment or storage, the electronic latching circuit automatically permanently connects the battery to the load. Once connected to the load the battery remains connected to the load, even when the equipment has a power failure, the power supply fails or the equipment is turned off.Type: GrantFiled: April 26, 1982Date of Patent: August 9, 1983Assignee: NCR CorporationInventor: Jerry M. Minchey
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Patent number: 4397574Abstract: A ribbon cassette is fastened on one side of a printer and is operator reloadable. The endless ribbon is loaded in coil form and is driven from the cassette in a path past the printing station of the printer and back into the cassette where it assumes a random form corresponding to a stuffing type cassette.Type: GrantFiled: August 7, 1981Date of Patent: August 9, 1983Assignee: NCR CorporationInventor: Gary A. Wojdyla
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Patent number: 4398257Abstract: A customer queue control system for an establishment having a plurality of customer service stations utilizes a main queue and a plurality of local queues, and includes a detector to detect the presence of a customer at the head of the main queue, keys at each service station to signify the status of that station, a voice message device to direct a customer at the head of the main queue to a local queue selected to provide the probable minimum waiting time, and a data processing system for controlling the voice message device in accordance with the presence of a customer in the main queue, the number of customers in each local queue, the status of each local queue, and the probable service delay time per customer in each local queue.Type: GrantFiled: February 27, 1981Date of Patent: August 9, 1983Assignee: NCR CorporationInventors: Bruno J. Paganini, Yodhin Anavil, William J. Hale, Kwang H. Lee
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Patent number: 4397076Abstract: A process for making buried contacts without damaging the surface of the silicon substrate while etching the pattern of a poly interconnect layer. The contact cut made in the gate oxide layer covering the substrate is made smaller than the poly deposited and patterned thereover. Damage to the substrate surface during the etching of the poly layer pattern is prevented by the presence of the gate oxide layer between the poly layer and the substrate. An ion implantation step performed early in the process forms a parasitic depletion mode channel under the region having an overlap of poly onto gate oxide. Consequently, though the gate oxide prevents the direct diffusion of dopant into the underlying substrate when conductors are formed by doping, the parasitic channel ohmically couples the poly interconnect layer to the diffused region in the substrate. The latter region is usually the S/D electrode of an IGFET.Type: GrantFiled: September 14, 1981Date of Patent: August 9, 1983Assignee: NCR CorporationInventors: Edward H. Honnigford, Vinod K. Dham
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Patent number: 4397014Abstract: A bidirectional pulse generator suitable for driving a video disc stylus deflector transducer. A differential amplifier is arranged with both its inverting and non-inverting input terminals connected for receiving a prescribed pulse waveform. First and second diodes are respectively connected between the inverting and non-inverting input terminals and a point of bilevel potential for selectively conditioning one or the other of the diodes to conduct, thereby establishing the quiescent output potential of the amplifier and concurrently shunting the pulsed waveform from one or the other of the amplifier input terminals.Type: GrantFiled: August 6, 1981Date of Patent: August 2, 1983Assignee: NCR CorporationInventor: Kevin C. Kelleher