Patents Represented by Attorney, Agent or Law Firm James M. Heslin
  • Patent number: 7628768
    Abstract: A long-term implantable arterio-venous shunt device is provided that can be used as a therapeutic method. The shunt device is implanted between an artery and a vein, preferably between the aorta and the inferior vena cava. The shunt device decreases the systemic vascular resistance and allows a blood flow rate through the shunt device of at least 5 ml/min after the implantation. The blood flow rate could be controlled either via an open loop or a closed loop control means. The shunt device could also be a self-adjustable shunt device to self-adjust its structure to control the blood flow rate through its lumen. Based on the effects of the shunt device to the respiratory, cardiac and circulatory system, the implantable shunt device could be beneficial as a therapy to patients with problems or conditions related to these systems.
    Type: Grant
    Filed: October 7, 2004
    Date of Patent: December 8, 2009
    Assignee: Rox Medical, Inc.
    Inventors: John L. Faul, Toshihiko Nishimura, Peter N. Kao, Ronald G. Pearl
  • Patent number: 6253984
    Abstract: The present invention provides a method and end-to-side surgical anastomosis apparatus for stapling an end of a tubular tissue structure to a side of a luminal structure including an elongated housing defining a central bore extending longitudinally therethrough. The elongated housing further includes an eversion support surface extending circumferentially about the bore opening adjacent the distal end which is configured to retain and support an everted end of the received tissue structure thereon to face an intimal surface of the tissue structure in an outward direction. The anastomosis apparatus further includes an anvil having a fastener engaging surface, and a compression device having a shoulder portion formed for selectively compressing the everted end of the tissue structure and a surface of the luminal structure together against the fastener engaging surface.
    Type: Grant
    Filed: March 12, 1999
    Date of Patent: July 3, 2001
    Assignee: Heartport, Inc.
    Inventors: Christopher F. Heck, Lee R. Bolduc
  • Patent number: 6142935
    Abstract: The present invention provides a retractor for providing surgical access through a passage in tissue, together with methods for its use and deployment. The retractor comprises an anchoring frame having an upper surface, a lower surface, and an opening therethrough which defines an axial axis. A flexible tensioning member is attached to the frame, and is extendable from the frame out of the body through the passage when the frame is positioned through the passage and into a body cavity. This tensioning member is selectively tensionable to spread the tissue radially outwardly from the axial axis. Hence, it is the tension imposed on the flexible liner which effects retraction of the tissue, rather than relying on the structural integrity of an artificial lumen.
    Type: Grant
    Filed: March 24, 1998
    Date of Patent: November 7, 2000
    Assignee: Heartport, Inc.
    Inventors: James R. Flom, Stephen W. Boyd
  • Patent number: 6042554
    Abstract: A valve sizer having a movable element mounted to the distal end of a shaft. A valve sizing portion includes the movable element so that the valve sizing portion may be adjusted to correspond to a number of different available replacement valve sizes. An indicator mounted to the proximal end of the shaft indicates the valve size corresponding to the outer dimension of the valve sizing portion.
    Type: Grant
    Filed: March 22, 1999
    Date of Patent: March 28, 2000
    Assignee: Heartport, Inc.
    Inventors: Daniel C. Rosenman, Michi E. Garrison, Sean Christopher Daniel
  • Patent number: 6027476
    Abstract: A method for closed-chest cardiac surgical intervention relies on viewing the cardiac region through a thoracoscope or other viewing scope and endovascularly partitioning the patient's arterial system at a location within the ascending aorta. The cardiopulmonary bypass and cardioplegia can be induced, and a variety of surgical procedures performed on the stopped heart using percutaneously introduced tools. The method of the present invention will be particularly suitable for forming coronary artery bypass grafts, where an arterial blood source is created using least invasive surgical techniques, and the arterial source is connected to a target location within a coronary artery while the patient is under cardiopulmonary bypass and cardioplegia.
    Type: Grant
    Filed: September 19, 1997
    Date of Patent: February 22, 2000
    Assignee: Heartport, Inc.
    Inventors: Wesley D. Sterman, Lawrence C. Siegel, Patricia E. Curtis, John H. Stevens, Timothy R. Machold
  • Patent number: 5302707
    Abstract: Compositions and methods for producing the activating moiety of a site-directed catalytic antibody are provided. The activating moiety serves to enhance the rate of chemical reactions involving the conversion of the prodrug to one or more active substrates or drugs. The activating moiety typically comprises a catalytic antibody. Compositions and methods for producing the catalytic antibodies, as well as the haptens which are used to generate the catalytic antibodies, are provided. Compositions and methods for producing the prodrugs are also provided.
    Type: Grant
    Filed: March 26, 1992
    Date of Patent: April 12, 1994
    Assignee: Affymax Technologies N.V.
    Inventors: David A. Campbell, Mark A. Gallop
  • Patent number: 5156964
    Abstract: This invention is in the field of cell and/or tissue culture. In particular, this invention relates to methods which adapt cells to a desired phenotype by exposing the cells to high levels of ammonia in culture, and subsequently transferring the adapted cells to a new culture medium in which there is no initial level of ammonia or the initial level of ammonia is below the level to which cells have been exposed to during the adaptation process. In this new culture medium, the adapted cells express the desired phenotype of growing to a higher viable cell density, and/or remaining viable for a longer period of time, and/or producing more of a desired cell product than their non-adapted counterparts grown in the same medium. This invention includes the adapted cells produced thereby and their cell products.
    Type: Grant
    Filed: January 21, 1992
    Date of Patent: October 20, 1992
    Assignee: Cetus Corporation
    Inventors: Duane Inlow, Brian Maiorella, Andrea E. Shauger
  • Patent number: 5008997
    Abstract: An improved tape automated bonding method of bonding the beam leads of lead frame tape to gold bumps formed on the contact pads of a semiconductor device, wherein the tape includes a plurality of interconnected beam leads defined by at least one opening in the tape such that each beam lead has an inner end and an outer end. The method includes the steps of depositing a gold layer on the beam leads, masking a region of each beam lead from further deposition of material such that a predetermined portion of each beam lead is exposed for further deposition of material, depositing a predetermined amount of tin on the exposed portion of each beam lead, establishing contact between each beam lead and the die bump to which each beam lead is to be bonded and applying a predetermined amount of pressure and heat to form a bond between each beam lead and the die bump to which the beam lead is to be bonded such that the bond formed includes the primary eutectic of the combination of tin and gold.
    Type: Grant
    Filed: November 28, 1989
    Date of Patent: April 23, 1991
    Assignee: National Semiconductor
    Inventor: William S. Phy
  • Patent number: 4894203
    Abstract: Nuclear fuel elements for use in the core of a nuclear reactor include an improved composite cladding having a zirconium barrier layer metallurgically bonded on the inside surface of a zirconium alloy tube, wherein the inside surface of the barrier is alloyed with preselected elemental impurities to improve oxidation resistance. The zirconium barrier layer forms a shield between the zirconium alloy tube and a core of nuclear fuel material enclosed in the composite cladding. The alloy layer formed on the barrier surface acts to inhibit cracking during the tube production fabrication step and limits oxidation in the event that the cladding is breached during operation of the reactor, allowing the entrance of water or steam into the fuel element.
    Type: Grant
    Filed: February 5, 1988
    Date of Patent: January 16, 1990
    Assignee: General Electric Company
    Inventor: Ronald B. Adamson
  • Patent number: 4883772
    Abstract: A silicide base shunt 50 and method of fabricating it are disclosed for a bipolar transistor. The base shunt 50 is fabricated using the first layer metal 36, 39 as a mask to etch silicon dioxide 27 surrounding the emitter 34 to thereby expose the underlying silicon epitaxial layer 24. Nickel or copper are then deposited onto the silicon 24 to form a region of silicide 50 extending from a base contact 36 to closely proximate the emitter 34, thereby minimizing the resistance of the extrinsic base region 24 of the transistor.
    Type: Grant
    Filed: September 6, 1988
    Date of Patent: November 28, 1989
    Assignee: National Semiconductor Corporation
    Inventors: James M. Cleeves, James G. Heard
  • Patent number: 4839311
    Abstract: An improved method for the etch-back planarization of interlevel dielectric layers provides for cessation of the etch-back upon exposure of an indicator layer. the indicator layer, usually a metal, metal nitride, or silicon nitride is formed either within the dielectric or over an underlying metallization layer prior to patterning by conventional photolithographic techniques. A sacrificial layer, typically an organic photoresist, is then formed over the dielectric layer. Because of the presence of both relatively narrow and relatively broad features in the metallization, the thickness of the sacrificial layer will vary over features having different widths. As etch back planarization proceeds, the indicator layer which is first encountered releases detectable species into the planarization reactor. Detection of these species indicates that removal of the overlying dielectric layers to a predetermined depth is achieved.
    Type: Grant
    Filed: November 21, 1988
    Date of Patent: June 13, 1989
    Assignee: National Semiconductor Corporation
    Inventors: Paul E. Riley, Vivek D. Kulkarni, Egil D. Castel
  • Patent number: 4824521
    Abstract: A method for forming vertical metal interconnects on a semiconductor substrate having an uneven surface comprises first forming a laminated metal structure over the entire substrate. The laminated metal structure includes a first metallization sublayer, an intermediate etch stop barrier layer, and a second metallization sublayer. Usually, a barrier layer will be formed between the substrate and the laminated metal structure. The laminated metal structure is then patterned into the desired vertical metal interconnects, which interconnects are at different elevations because of the uneven underlying surface. The vertical metal interconnects are then planarized by first applying a dielectric layer and a sacrificial layer, etching back the combined dielectric and sacrificial layers to expose only the higher vertical metal interconnects, and then selectively etching back the second metal sublayer component of the higher vertical metal interconnects.
    Type: Grant
    Filed: April 1, 1987
    Date of Patent: April 25, 1989
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Vivek D. Kulkarni, Egil D. Castel
  • Patent number: 4806504
    Abstract: A liquid polymeric resin is applied over an irregular surface of a semiconductor substrate by first spinning followed by rotation of the substrate about an axis parallel to and spaced-apart from the plane of the substrate. Such a technique provides for planarization layer having enhanced planarity. When applied over an underlying insulating layer, the planarization layer will typically be etched back in order to planarize the insulating layer. Alternatively, the planarization layer may be formed directly over the semiconductor substrate, and an insulating layer formed over the planarization layer. In either case, the substrates are then ready for subsequent processing according to well known techniques, typically the formation of metallization layers over the insulating layer.
    Type: Grant
    Filed: September 11, 1986
    Date of Patent: February 21, 1989
    Assignee: Fairchild Semiconductor Corporation
    Inventor: James M. Cleeves
  • Patent number: 4804810
    Abstract: A bonding apparatus for eutectically bonding tape leads to semiconductors and other substrates includes four separate bonding rails for applying heat. The bonding rails have a preselected distribution of mass along their length in order to compensate for uneven heating characteristics which are normally observed in linear heating elements. Usually, four such heat elements are orthogonally arranged at the bottom ends of four electric power buses. By attaching the heating elements to adjacent power buses, and coupling diagonally opposed pairs of the power buses to the positive and negative polarity of a current source, substantially uniform heating of all four elements may be achieved. The ability to provide uniform heating is critical for properly forming eutectic bonds.
    Type: Grant
    Filed: March 14, 1988
    Date of Patent: February 14, 1989
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Fred Drummond, James W. Clark
  • Patent number: 4791473
    Abstract: A plastic semiconductor package suitable for high frequency operation includes an internal ground plane connected to a ground ring formed on the packaged semiconductor device. The ground plane is included as a portion of a lead frame strip adjacent to the individual lead frames. The ground plane is first folded underneath the paddle support of the lead frame, and the semiconductor die subsequently mounted on the paddle. The ground plane includes a plurality of bumps which protect upward between adjacent lead fingers of the lead frame when the ground frame is folded. A ground frame on the semiconductor die is connected to the bumps, and the signal bonding pads connected to the lead fingers, typically by wire or tape bonding. The package is then encapsulated in plastic by conventional means, and the package trimmed to its final desired configuration.
    Type: Grant
    Filed: December 17, 1986
    Date of Patent: December 13, 1988
    Assignee: Fairchild Semiconductor Corporation
    Inventor: William S. Phy
  • Patent number: 4752829
    Abstract: An image sensor is disclosed which is capable of handling large amounts of signal charge with small shift registers. The image sensor includes photoelements 10 in which charge is accumulated in response to sensed conditions; electrically-controllable transfer gates 20 adjacent the photoelements 10 for controllably releasing the charge from the photoelements; vertical shift registers 30, separated from the photoelements 10 by the transfer gates 20, for receiving the charge from the photoelements, and a scan generator connected to the barrier 20 for supplying a series of pulses thereto, a group of pulses being required to release all of the charge accumulated in the photoelements 10.
    Type: Grant
    Filed: December 29, 1986
    Date of Patent: June 21, 1988
    Assignee: Fairchild Weston Systems, Inc.
    Inventor: Jae S. Kim
  • Patent number: 4734671
    Abstract: A sensitive deflector beam having an integral deflectable element utilizes an immobilization pin and a limit pin to prevent damage to the deflectable element during fabrication and use. The immobilization pin is inserted through the beam and to the deflectable element to hold the element rigidly in place during fabrication. Thus, relatively rigorous operations such as polishing and circuit deposition may be accomplished without damage to the element.
    Type: Grant
    Filed: October 22, 1986
    Date of Patent: March 29, 1988
    Assignee: Solartron Electronics, Inc.
    Inventors: Walter H. Eisele, Peter C. Tack
  • Patent number: 4732841
    Abstract: A multilayer photoresist system for defining very small features on a semiconductor substrate relies on forming a planarization layer directly over the substrate. An image transfer layer is formed over the planarization layer, and a photoresist imaging layer formed over the image transfer layer. The image transfer layer comprises an organic or inorganic resin which has been cured in a non-oxidated plasma. It has been found that such a curing technique provides a particularly smooth and defect-free image transfer layer. Very thin photoresist imaging layers may thus be formed over the image transfer layer, allowing very high lithographic resolution in the imaging layer. The resulting high resolution openings may then be transferred downward to the image transfer layer and planarization layer by etching, allowing the formation of very small geometries on the substrate surface.
    Type: Grant
    Filed: March 24, 1986
    Date of Patent: March 22, 1988
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Kenneth J. Radigan
  • Patent number: 4688075
    Abstract: A semiconductor wafer having a plurality of integrated circuits is provided. One surface of the wafer includes a plurality of electrical contacts on the circuits which are subsequently attached to leads. The other surface of the wafer is provided with a conductive tape. The wafer is cut, e.g., sawed, resulting in each individual circuit having a pre-attached conductive mounting media. The individual circuits can then be attached to a substrate through the conductive mounting media. Other embodiments are disclosed.
    Type: Grant
    Filed: July 22, 1983
    Date of Patent: August 18, 1987
    Assignee: Fairchild Semiconductor Corporation
    Inventor: William S. Phy
  • Patent number: 4683023
    Abstract: A machine for applying an adhesive pad to the ends of semiconductor device packages includes a punch assembly, a tape feed assembly, and a package feed assembly. The tape is incrementally fed to the punch assembly where semiconductor packages are individually brought into alignment. The punch assembly first shears an adhesive pad from the tape and thereafter applies the pad to the package. The punch member of the punch assembly includes a resilient tip which assures that the tape is securely attached to the package and helps prevent damage to the package. Semiconductor device packages having such taped ends are less likely to be damaged in subsequent processing and handling.
    Type: Grant
    Filed: March 6, 1986
    Date of Patent: July 28, 1987
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Paul J. Sokolovsky