Abstract: The current-integrating analog-to-digital converter includes a first charge storage device C.sub.1 ; a second charge storage device C.sub.2 ; an input current I.sub.in coupled to the first charge storage device C.sub.1 for a first time period; a variable reference current I.sub.dac coupled to the second charge storage device C.sub.2 for a second time period; and a comparator 20 for comparing the voltage on the first charge storage device C.sub.1 with the voltage on the second charge storage device C.sub.2.

Abstract: A set of three cellular automata--the E-Cell, the I-Cell, and the D-Node--can be used to design and assemble parallel processing networks for such applications as signal processing and artificial intelligence. The E-Cell (FIG. 1a) is an excitory cell. The I-Cell (FIG. 2a) is an inhibitory cell. The D-Node (FIG. 3) is a combination of E-Cells and I-Cells. The use of the cellular automata is illustrated in three exemplary applications: a lateral inhibition network (FIG. 5b), a tree-search network (FIG. 6b), and a graph-search network (FIG. 7e). In particular, the tree-search and graph-search networks are implemented using the same structure as the tree or graph.

Abstract: The edges of a semiconductor die are moved away from the lead frame leads attached to the die by using a pressure differential across the semiconductor die.

Abstract: The use of trimethylarsine in place of tertiary butyl arsine for low pressure organometallic vapor phase epitaxy of GaAs:C to enhance the carbon doping efficiency of CCl.sub.4. The hole concentration is three times higher with trimethylarsine then with tertiary butyl arsine in the layer grown under similar conditions. As a result, higher growth temperatures can be used with trimethyl arsine, yielding more stable carbon doping. Annealing at 650.degree. C. for 5 minutes does not degrade the trimethyl arsine-grown layers while the tertiary butyl arsine-grown layer shows decreases in both hole concentration and mobility. Also a high level of hydrogen atoms is detected in tertiary butyl arsine-grown GaAs:C. The hydrogen level is about 30 times lower in the layers grown with trimethyl arsine. The reduced hydrogen concentration is an added advantage of using trimethyl arsine since hydrogen is known to neutralize acceptors in GaAs to reduce the carrier concentrations.

Abstract: A plasma source for generating a plasma in a chamber in conjunction with a radio frequency generator is described. The plasma source comprises a coil spiral, at least one insulator and at least one capacitor. The coil spiral conducts the radio frequency wave from the radio frequency generator and induces a plasma in the chamber. It comprises at least two segments. Each insulator and capacitor couple two adjacent segments of the coil spiral together.

Abstract: A compact capacitor for use in a small memory cell in high density memories is disclosed. Such a capacitor in the cross-coupling of cross-coupled inverters in the memory cell improves single event upset hardness. The subject capacitor in its preferred embodiment is a MOS capacitor with both n+ and p+ connections to the capacitor channel so as to maintain a relatively high capacitance for both positive and negative capacitor gate voltages.

Abstract: The invention relates to a method of scribing and separating dice from each other after fabrication in a semiconductor wafer in a manner such that active circuit regions in the dice reside as near to an edge of a die as possible. The wafer is anistropically etched through the active layer and into the substrate through an opening in the mask to form a generally V-shaped channel with the dice then being separated along a vertex of the channel. The dice are then positioned to abut each other in the form of a mosaic.

Abstract: Generally, and in one form of the invention, a circuit is provided with a terminal 50 to receive an input signal which is applied to the input of an inverter 100 which is responsive to TTL level signals and which exhibits hysteresis. The output of inverter 100 is connected to two inverter chains. The first inverter chain 110, 112, 114 is comprised of an odd number of inverters and produces a first output at terminal 62 which represents a "true" version of the input signal. The second inverter chain 102, 104, 106, 108 is comprised of an even (or zero) number of inverters and produces a second output at terminal 60 which represents a "complement" version of the input signal.

Abstract: A method of passivation of Hg.sub.1-x Cd.sub.x Te and similar semiconductors by surface oxidation (such as anodic) followed by chemical conversion of the oxide to either sulfide or selenide or a combination of both is disclosed. Preferred embodiments provide sulfide conversion by immersion of the oxide coated Hg.sub.1-x Cd.sub.x Te in a sodium sulfide solution in water with optional ethylene glycol and the selenidization by immersion in a solution of sodium selenide plus sodium hydroxide in water and ethylene glycol. Also, infrared detectors incorporating such sulfide and selenide passivated Hg.sub.1-x Cd.sub.x Te are disclosed.

Abstract: An integrated circuit has a clock input pad and circuitry operative in response to a clock signal. Clock transitions at the clock input pad are potentially subject to glitches due to noise and ringing. Further provided is a glitch remover circuit having a logic gate having first and second inputs. The glitch remover circuit has a series of circuits coupled to the clock input pad with differing delays for positive edges than for negative edges. The series of circuits has an output connected to the first input of the logic gate, with the second input coupled to the series of circuits intermediately. Other devices, systems and methods are also disclosed.

Abstract: Preferred embodiments disclose include methods of fabrication and integrated circuits (30) in GaAs layers (38, 40) on silicon substrates (32) with the gallium arsenide grown by MBE or MOCVD and containing thermally-strained superlattices (36) and post-growth high temperature annealing to lower defect density. The annealing confines dislocations to a thin network at the interface of the GaAs buffer layer (34) and the silicon substrate (32).

Abstract: A microwave plasma rector is disclosed comprising a vacuum chamber, a microwave generator for generating a microwave standing wave therein, inlet and outlet ports, a susceptor within the chamber, at least one dielectric plate and a heater for heating the susceptor. The dielectric plate alters the shape of the produced plasma from a sphere to a short bulging cylinder. The modified plasma ball results in increased thickness uniformity of the deposited material.

Abstract: A water soluble contrast enhancement compound and composition, and a method of use thereof, are disclosed for improving sidewall profiles in photoresist patterning and developing. The compound consists of a 1-oxy-2-diazonaphthalene sulfonamide salt.

Abstract: A chip mount is provided for mounting a chip on a circuit board to reduce stresses caused by thermal expansion mismatch between the chip and the circuit board. The chip mount includes a strip member secured to the chip and a guide layer secured to the circuit board. The guide layer includes slots formed therein for slidably receiving and holding the strip member such that upon expansion or contraction of the chip relative to the circuit board, the strip member slides in the slot to reduced stresses resulting from the expansion or contraction of the chip. The guide layer and the strip member are formed of materials that are generally non-reactive to inhibit bonding of the guide layer to the strip member.

Abstract: A method and circuitry for reducing noise is provided. The circuit receives a digital data signal at its input (26). The signal is input to a magnitude evaluator (28) and a pass/squelch circuit (30). Magnitude evaluator (28) samples the digital signal and controls an integrator (36) according to the magnitude of each of the samples. Integrator (36) averages the magnitudes over time. If the signal is a noise signal, integrator (36) toggles a switch (40) to activate pass/squelch circuit (30) to squelch the digital data at its input (29). If the signal is a valid signal, then integrator (36) toggles switch (40) to deactivate pass/squelch circuit (30) to allow the digital data to pass therethrough to destination device (44).

Abstract: This is a semiconductor device, comprising: a semiconductor body having an isolation region separating at least two active device regions; pad oxide layers disposed on said active regions; polysilicon layers disposed on said pad oxide layers; silicon nitride layers disposed on said polysilicon layers; and a sidewall seal disposed all along the perimeter of the active device regions to seal said active device regions against oxygen diffusion. The resulting field oxide isolation region has reduced oxide encroachment into the active moat region.

Abstract: A circuit composed of a circuit board of crystalline elemental silicon slice and circuit components in the form of semiconductor integrated circuits therein which are preferably formed of a Group III-V compound. Signals from each of the integrated circuits are transmitted to other integrated circuits on the board or externally of the board either by conventional printed conductors on the board or by a laser formed in each integrated circuit at each output terminal thereon which transmits light signals along light transmitting members in the silicon board to detectors at the input locations on other ones of the integrated circuits on the board for external to the board. The light signal is transferred from an integrated circuit output to an integrated circuit input or to a device external to the board by means of light transmitting members. These light transmitting members may be light conducting waveguides positioned either on the surface of the board or in grooves formed therein.

Abstract: Preferred embodiments include a microstrip patch antenna (38) which also acts as the resonator for an oscillator powered by IMPATT diodes (34, 36); this forms a monolithic transmitter (30) for microwave and millimeter wave frequencies.

Abstract: A programmable resistive element is provided which includes a channel 16 comprising a layer of gallium arsenide. A programming barrier 18 is disposed outwardly from channel 16. A storage gate 20 comprising a layer of intrinsic gallium arsenide is disposed outwardly from programming barrier 18. An insulator 22, comprising a layer of aluminum-gallium-arsenide, is disposed outwardly from storage gate 20. A control gate 24 is disposed outwardly from insulator 22. First and second spaced apart contacts 26 and 28 contact channel 16.

Abstract: A serial systolic processor for performing neural network functions. A serial processor (90) provides the digital processing circuits for processing an input serial data stream applied to a serial input (20). A memory (29) stores digital signals representative of interconnection strengths or coefficient data corresponding to autocorrelation matrix elements. Plural outputs (A.sub.O -A.sub.n) of the memory (29) are connected respectively to each of the processor neurons (P.sub.O -P.sub.n) of the serial processor (90). The digital stream is output, unchanged, on processor output bus (22), while a processed data stream is output on bus (30).