Abstract: The present invention provides a power drive circuit which is transformer isolated from the circuit developing the drive signals, but which does not lose its DC reference voltage. This technique results in the desired isolation without the undesirable possibility of operating the output transistors in an unsafe DC region, which is a particular problem when the output transistors are FET devices. In accordance with the present invention, pulse transformers are used to drive the power FET devices.

Abstract: For the establishment of vertual connections passing through switching matrices of a multi-stage switching system, it is provided that upon the arrival of a call packet requesting the establishment of a virtual connection, a central control device identifies all the switching matrices involved in the connection to be established and determines setup information that must be assigned to each of them in order to establish the connection. This setup information is fed to the individual switching matrices from the central control device in a setup packet along the path of the virtual connection to be established.

Abstract: A circuit for subscriber line interface circuits in a digital time-division multiplex communication switching center is disclosed. In the case of reception of the same information on the same time slot allocation via a number of subscriber line interface circuits, a transmit time slot as well as a receive time slot is alloted, but access of the transmit driver stages of the subscriber line interface circuits to the bus conductors leading to the switching center is prevented in order to avoid damaging interacting final stages in the transmit driver stages of the subscriber line interface circuits.

Abstract: A circuit for a central control TDM PCM telecommunications exchange with groups of terminals connected to a switching network is disclosed in which the terminal groups which are each connected to the duplicated switching network over TDM lines and which each include a subsidiary switching network and a decentral control unit are assigned to one another in pairs. In preparation for the stand-by substitution of the central switching network and associated central processor, in the two terminal groups, assigned to one another in pairs, the subscriber lines and/or connection lines connected to the first of said terminal groups can be switched-over from the subsidiary switching network of the first terminal group to the subsidiary switching network of the partner terminal group, whereupon the decentral control unit additionally undertakes all the control functions for the decentral control unit of the first terminal group.

Abstract: A distribution apparatus for telecommunication equipment wherein a contact component part is fastened on one side of a grounded bearing part and on the opposite side, a safety plug for the protection of electrical lines against voltage surges may be plugged in. The safety plug includes surge arresters resting with one pole against a grounding plate whose end is bent off laterally in the plug-in direction and is designed as grounding contacts which are acutely bent back on themselves and flexible, that substantially project beyond the safety plug. The grounding plate directly contacts the bearing part, thereby providing a maximum of transmitting reliability with a minimum of construction expenditure. The grounding contacts engage holes arranged within the range of an angled section of the bearing part.

Abstract: The invention provides a combination in a SLIC for telecommunication applications of ac impedance synthesis, e.g. raising the impedance of battery feed resistances by feedback techniques; in combination with real battery feed resistors and a dc block transformer. A dc blocked transformer is coupled to line current feed resistors and a feedback loop network to synthesize the desired input impedance, such that the feedback network incorporates both positive and negative feedback. A loop stabilizing resistor is used in shunt with the dc blocked transformer secondary to reduce gain peaking and phase shift.

Abstract: A thyristor protected against breakover firing is disclosed which has a region which, in comparison to the remaining semiconductor body, has a lower breakdown voltage. This region is provided with an auxiliary electrode and is separated from the remaining semiconductor body by a trench. Upon onset of the avalanche breakdown in the blocking direction, a voltage greater by 0.5 V, compared to the first emitter electrode, can build up at the auxiliary electrode without the thyristor firing. The auxiliary electrode is connected via a resistor with the first emitter electrode of the thyristor. In addition, between the auxiliary electrode and the control electrode a breakover element is interconnected which conducts at a given voltage drop across the resistor and initiates the firing process of the thyristor.

Abstract: A digital activity detection circuit is provided for monitoring digital input signals such as telecommunications DS1 or DS2 signals, and for generating an alarm when a predetermined input signal loss threshold is reached, such that the input signal loss threshold does not vary with temperature, with component value or with power supply variations. Precise resolution and simplified hardware are achieved in a novel arrangement of counters in the signal activity detector to determine the resolution and signal loss threshold of the detector, all in a digital arrangement without the use of analog devices or retriggerable monostable multivibrators, and in an ASIC fabricable integrated circuit technology such as CMOS.

Abstract: A switching configuration for PCM TDM telecommunication exchange insallations, having a central switching network and individual sub-switching networks is provided.Line groups having duplicated central switching networks connected over two time division multiplex lines and having a sub-switching network and a group control system each are assigned to each other in pairs. The line systems assigned individually to the one and the other of two line groups and which are connected via internal lines in normal operation to the sub-switching networks of their own line group, can be switched over to the sub-switching network of the other line group. No connections are interrupted which were already through-connected before changeover switching or were in the process of being set up, and the internal lines running form the line system of one line group can be switched over singly, i.e. individually to the connection, from its sub-switching network to that of the partner line group.

Abstract: A circuit and method for more efficiently implementing ZBTSI encoding with minimum processing delay of the ZBTSI algorithm and hardware complexity is provided in a ZBTSI encoder for use in a ZBTSI codec. The ZBTSI encoder is optimized for the ZBTSI algorithm and includes an architecture for use as an improved ZBTSI codec in application-specific integrated circuit (ASIC) technology.

Abstract: A Violating All Zero Octet (VAZO) detector for a ZBTSI clear channel data transmission system is described, which is optimized for minimum logic gate count, minimum circuit complexity, minimum external control signals and minimum signal processing delay, in a VLSI hardware embodiment which is advantageously implemented in application specific integrated circuit (ASIC) technology. An array of logic NOR gates scans input data for zero strings of data that could combine with an all-zero octet to violate the zero string criterion enables a zero string search to be performed with a minimum of circuit complexity. The use of an input shift register to buffer input data for other portions of the associated ZBTSI encoder provides for a minimized number of gates in a VLSI implementation.

Abstract: A clock extractor circuit comprising a frequency divider which derives the clock signal from a signal having a frequency which is a multiple of the frequency of a received bipolar signal input. A correction logic circuit in the frequency divider compares the logic state of the frequency divider with a transition detection signal derived by sampling the bipolar signal at the multiple frequency and, on the basis of the phase error detected, commands a phase correction of the clock signal.

Abstract: A high resolution digital phase-lock loop circuit is described, which is implemented with an input clock reference frequency which is approximately the same as the output frequency of the phase-lock loop. The output is derived from delaying the input clock a variable number of gate delays ranging from no delay to one period of the input clock. A shift register controls the number of gate delays and a 360 degree phase detector initializes the shift register when the output is delayed by one period of the input clock to provide no delay. Gate delay variations due to integrated circuit process, voltage and temperature are compensated for to provide a relatively constant clock phase correction.

Abstract: Transmitting/receiving device with a diode and an optical fiber optically coupled to an optical window of the diode, where the diode is positioned on a support with a lead-in for inserting the optical fiber. For such a transmitting/receiving device the optical fiber of the diode can be easily and accurately adjusted and subsequently permanently positioned. The invention makes provisions for a cone-shaped lead-in with the diode located at the larger opening of the lead-in. This results in an especially easy adjustment of the optical fiber with respect to the diode. The device can be used in opto-electronic receivers having a so-called "pigtail" connection.

Abstract: The present invention uses the input resistances of transconductance amplifiers in a SLIC to isolate battery ground overshoots from the rest of the SLIC circuitry. This is accomplished by allowing the voltages within each driving operational amplifier to rise with any overshoot, and is achieved by powering each operational amplifier with battery ground voltage, which overshoots, instead of with low voltage ground (LVG), which remains at ground. When a lightning surge hits, an overshoot at the SLIC output will occur. However, since the supply voltage of the driving operational amplifiers rises with the overshoot, the voltage stress to the SLIC circuit components is greatly reduced. The remaining SLIC circuitry stays at a low potential and is isolated from the overshoot. In accordance with the present invention, ground overshoot voltages are isolated across a few high ohmic valued resistors instead of appearing across active circuit components.

Abstract: A connector for lightwave guides with release levers attached at the narrow sides thereof, which, when lateral pressure is applied, actuate detents. Simultaneously at the narrow sides of the connector casing recesses are provided for the release levers such that the release levers do not rise more than a small amount above the edge of the recess; whereby, the connector can be pulled by manual actuation of the release lever through the recess.

Abstract: A circuit and method for the acquisition of carrier synchronism in coherent demodulators which operate with carriers modulated by Phase-Shift Keying (PSK). The invention makes use of simple, low-cost circuitry and gives the phase-lock loop of the demodulator an added frequency characteristic which prevents false locks and ensures lock between the local carrier and the reference signal even for very large frequency variations.

Abstract: A method and circuit for exploiting the characteristics of the ZBTSI algorithm by using the relationship of the data octet and the octets adjacent thereto to detect error conditions such as violations of the DS1 ones density criteria for detection of transmission channel errors in the ZBTSI decoder. This relationship provides an optimized partial error correction technique which minimizes error multiplication in the PCM transmission channels.

Abstract: In accordance with the present invention a plurality of input control data bits are added to a plurality of input telecommunications transmission channels in the form of an input control word wherein any of the individual data bits can be changed without adversely effecting the ability of the system to synchronize and recover the added control word from the multiplexed data stream at the receiving end. A service channel is thus provided. The synchronization circuit described by the present invention is particularly useful in telecommunications transmission of a large plurality of communication channels as is the case in fiber optic transmission wherein a single control word may be useful, for example, as an alarm with respect to one or more of the multiplex telecommunications channels. In a preferred embodiment of the invention, an 8 Kbit/sec control channel is described.

Abstract: A process and a device for substantially eliminating tolerance-dependent variations of a preselectable space between the components of an optical communication apparatus is described. U-shaped recesses are provided in a metal casing for pressing in flange-type necks of, for example, optical transmitting and receiving devices. The parallel arranged devices are so spaced from each other that they are not subject to tolerance-dependent variations. For this purpose the metallic necks are coated with a plastic layer, and ribs provided at the lateral walls of the U-shaped recesses dig into the plastic layer. The necks are pressed in precisely at a predetermined spacing by means of a gauge. By the application of varying degrees of pressure when the ribs are pressed in on one side and the other side of the neck, one of the U-shaped recesses can be off-center.