Abstract: A vertical power MOSFET structure having a source and base region which are not shorted together is provided. The source and base region are formed in a semiconductor substrate using a selectively patterned gate stack which is formed on the substrate as a mask. The drift region is formed of a semiconductor material covering a semiconductor substrate. The semiconductor substrate is of the same conductivity type as the drift region for a MOSFET and is of an opposite conductivity type for an IGBT.

Abstract: A self-test that is variable to test an SRAM that is embedded on a semiconductor die is achieved. The self-test is performed by a modular self-test circuitry that can be varied to permit generating addresses, and data patterns for various SRAM architectures and sizes. An address block develops addresses which define a test location or test word within the SRAM. The address block also develops a time delay which is used during a data retention test. A data block develops test patterns that are written into SRAM test locations. The data block also analyzes data read from SRAM test locations or test words. Both the address block and the data block are formed by combining a number of individual address or data cells, thereby providing addresses and data patterns for a variety of different SRAM configurations. A control block operates the address block, the data block, and the SRAM to perform two memory tests.

Abstract: A method of manufacturing a transmitter optoelectronic integrated circuit (10) which comprises a double heterostructure optical emission device (11) and drive circuitry (16). The optical emission device (11) comprises a plurality of optical emission loci (21) distributed throughout an active layer (12) of the optical emission device (11). Drive circuit (16) comprises a plurality of first portions (17) and a second portion (18) wherein the plurality of first portions (17) are above the plurality of emission loci (21). Second portion (18) is integrated in a lateral orientation with respect to the plurality of first portions (17). The chemical composition of the plurality of first portions (17) are such that they are nonabsorbing to optical emissions from the optical emission device (11).

Abstract: A field effect semiconductor device having multiple vertically stacked channels (12, 14, 16) separated by independent gate electrodes (13, 15) is provided. The channels (12, 14, 16) are formed on a wide bandgap buffer layer (11) and each channel is coupled a drain electrode (21). Each channel is also coupled to a source electrode (25-26). The quantum well channels (12, 14, 16) and quantum well gates (13, 15) are separated from each other by barrier layers (18) of a wide bandgap semiconductor material.

Abstract: A retrograde profile is formed in a photoresist layer (11, 20) by modifying the rate at which a photoresist developer solution dissolves a portion (12) of a photoresist layer (11, 20). The photoresist layer (11, 20) is exposed to a chemical such as hexamethyldisilizane or dimethylsulfoxane to allow a portion (12) of the photoresist (11, 20) to absorb the chemical. The photoresist (11, 20) is then heated in order to enhance a reaction between the photoresist (11, 20) and the chemical. The reaction modifies a portion (12) of the photoresist (11, 20) to reduce the rate at which the portion (12) of the photoresist (11, 20) is dissolved by a developer solution.

Abstract: A probe which is positioned in at least one axis by a piezoelectric transducer is provided. One or more piezoelectric transducers control position of the probe with respect to another probe, with respect to a sample surface, or with respect to a previous position of the probe itself. A method for measuring spreading resistance is provided where the distance between two probes is reproducibly controlled in the range of a few angstroms by measuring tunneling current between the two probes, and electrical contact between the two probes and a sample is reproducibly provided by monitoring current between the probes and the sample.

Abstract: An improved method and structure for high voltage semiconductor devices capable of blocking voltages of the order of 1000 volts and greater is described. In a preferred embodiment, a blanket P layer is formed in an N.sup.- epi-layer on an N.sup.+ substrate. An annular groove is etched through the blanket P layer into the N.sup.- epi-layer. The bottom of the groove is doped N.sup.+ using the same mask as for the first groove etch. A second groove is formed inside of and partly overlapping the first groove and extending to a greater depth than the first groove, but not through the epi-layer. The second groove is filled with passivating material, metal electrodes are applied to the P.sup.+ region and the N.sup.+ substrate, and the devices separated at the N.sup.+ region lying outside the second groove in the bottom of the first groove. Excellent high voltage blocking characteristics are obtained with the same or fewer process steps and better yield.

Abstract: Light (19) is projected at an incidence angle (29) onto a plurality of leads (12, 13). The light (19) is simultaneously reflected from each of the plurality of leads (12, 13). The light that is simultaneously reflected (24, 26) from each lead (12, 13) is detected. A cotangent function of the incidence angle (29) is utilized to detect an amount of displacement (32) of at least one of the plurality of leads.

Abstract: A monolithic operational amplifier (10) having an Miller loop compensation network (13) with improved capacitive drive. The monolithic operational amplifier (10) has an input stage (11), an output stage (12), and a compensation network (13). The compensation network (13) provides negative feedback between an output node (19) of the output stage (12) and an input node (16) of the output stage (12). The compensation network (13) has a compensation capacitor (26), a resistor (27), an isolation resistor (33), a shunt capacitor (28), and an isolation transistor (25). The compensation network (13) creates a dominant pole, a zero and a nondominant pole having a higher frequency than the zero. The nondominant pole improves a gain margin while preserving sufficient phase margin. The isolation transistor (25) provides improved capacitive drive.

Abstract: A method of image processing for visually inspecting a workpiece. The method compares the brightness (15) at each location within an image of the workpiece to the equivalent location within an image of an idealized workpiece. The inspection depends only on local brightness differences between the two images. The method can detect defects which have no distinct edges. Finally this method can detect defects which are small enough that the resolution of the image will show these small defects only as a single point of light (12) or dark (27).

Abstract: A non-destructive method for testing quality of at least one bond which physically and electrically couples a package lead to an integrated circuit. A thermal gradient is created across the at least one bond which causes heat transfer thru the at least one bond. Heat transfer is measured which is proportional to area at a bond interface. The measured heat transfer thru the at least one bond is compared with heat transfer data taken under substantially equal conditions of known good bonds thereby determining quality of the at least one bond. The heat transfer is indirectly measured by creating a mechanical vibration at an input area and by measuring the time it takes the mechanical vibration to reach an output area after the mechanical vibration has traveled through the at least one bond.

Abstract: An improved panel wall system uses modified battens to simplify the installation of doors, windows, and accessories. An improved mounting system for windows provides flexibility of size and location, while providing for a substantially planar clean room surface. The mounting system used for windows can be adapted directly for mounting any flat accessory, or any accessory mounted upon a flat frame. An improved door jamb element allows the use of butt hinges to hang a door panel, while providing structural support. The improved door jamb element also provides for the on-site addition of a door to an existing panel wall system. An improved mounting system for a transom above a door panel simplifies on-site installation of the transom.

Abstract: A multi-chip module (26) used to interconnect and house a plurality of integrated circuits (10). The module (26) employs an intermediate structure referred to, herein, as a bridge chip (12). The bridge chip (12) connects the integrated circuit (10) to the module substrate (19). The integrated circuit (10) is attached to the bridge chip (12) and forms a composite structure (18) which can be burned-in and tested as an individual unit. The bridge chip (12) has interconnects to bring out the inputs and outputs of the integrated circuit (10). The composite structure (18) is mounted to the module substrate (19) such that, the integrated circuit (10) has a thermal pathway to the module substrate (19), and the bridge chip (12) connects to the module substrate (19). The module substrate (19) has interconnects to connect the plurality of composite structures (18).

Abstract: A dispenser (10, 32) that provides accurate control of the material dispensed has an upper adjuster (27) which is used to adjust the distance that the dispenser's (10, 32) plunger (23) is withdrawn from the dispenser's (10, 32) material reservoir (17), and a separate lower adjuster (28) to adjust the distance that the plunger (23) is inserted into the cavity (17) to dispense the material. The dispenser (10, 32) also includes a nozzle (16) and a nozzle plate (14, 14') that are formed from a dimensionally stable material in order to provide accurate control of the dispensing rate and the position of the nozzle. These features facilitate utilizing the dispenser (10, 32) as a portion of a multiple nozzle dispenser system (32) that accurately controls the rate at which material is emitted.

Abstract: An integrated fluid dispense apparatus (10) suitable for delivering ultrapure fluids. The fluid is confined to a nonrigid hermetic fluid delivery apparatus (10). A pumping mechanism (11) pumps fluids in precise volumes and flow rates. A moisturizing dispense nozzle (12) provides a saturated vapor atmosphere at the nozzle tip to prevent the fluid from drying during non-dispense periods.

Abstract: A composite electrode (10) that is used for conducting a modulated voltage in a plasma reactor. An electrically conductive non-oxidizing surface and an electrically conductive metal surface are electrically and mechanically joined together by threads (12 and 13) to form a composite electrode (10). The composite electrode (10) is used to make contact between a wafer holder and the plasma reactor when the wafer holder is at rest in a chamber of the reactor.

Abstract: A configurable decode circuit for decoding in a block architected SRAM. The configurable decode circuit comprising a decode circuit (10) which decodes through a process of deselection, a first buffer circuit (12) for buffering decode circuit (10), a delayed clock signal (15) for enabling first buffer circuit (12), a gated transmission means (13) for decoupling first buffer circuit from second buffer circuit (14), second buffer circuit (14) for driving capacitive loads, and a means for delaying driver output (16) for enabling gated transmission means (13). The decode circuit (10) is built for simplifying synthesis of the layout of a configurable decode circuit for varying configurations. The configurable decode optimizes performance by reducing the number of circuits in the critical delay path and minimizing capacitive loading on internal circuit nodes.

Abstract: A method is provided for correlating ion implantation from a silicon wafer (13) to a gallium arsenide wafer. A first dose of a predetermined amount of silicon ions is implanted into a silicon wafer (13). The first dose of the implanted silicon ions in the silicon wafer (13) is evaluated by a measuring system (10) that monitors a modulated reflected signal from the silicon wafer (13) and quantifies the signal as to the number of implanted silicon ions in the silicon wafer. If the measured quantity of implanted silicon ions is a desired amount of implanted silicon ions the same number of silicon ions is then implanted into the gallium arsenide wafer.

Abstract: A three level mask structure is formed on a wafer. The top layer of the mask structure has an opening that defines an etch area. The middle layer of the mask structure is etched through the opening in the top layer. This opening in the middle layer defines a gate deposition area. The layer adjacent to the wafer is etched, using the opening in the middle mask layer to define the etch area, until the etching undercuts the middle layer by a predetermined amount. The opening in the layer adjacent to the wafer is used to define an etch area on the wafer. The wafer is etched to form source and drain areas. Gate material is deposited onto the wafer using the opening in the middle layer to determine the deposition area. The mask structure is then removed.

Abstract: A gravity fed culling apparatus (10) capable of singulating work pieces (12). The culling apparatus (10) comprises a transport track (11) and a rotating device (14) wherein the rotating device (14) has a first and a second protrusion (17 and 18, respectively) which cooperate with the transport track (11). A plurality of work pieces (12) are conveyed along the transport track (11) to an inspection site (13). After inspection, at least one work piece (12) is separated from the plurality of work pieces (12) and continues along the transport track (11).