Abstract: A variable-frequency I-V measurement system for testing the IC device, such as a GaAs MESFET, has probes for measuring the bias voltage, drain voltage, drain current, and gate signal voltage, a gate signal source, and a computer controller for controlling the gate signal source to provide, in sequence, gate signals varied in waveform, voltage, and frequency, in order to measure the I-V characteristics of the device in response to variable frequency gate signals. Values for maximum drain current (Imax) and percentage drop in Imax at different frquencies are derived and used to predict the RF performance characteristics of the device and to select good wafers early in the fabrication process, as well as for non-destructive testing of frequency dispersion effects on the device.

Abstract: A method is provided for the fabrication of a photodiode sensitive to blue light. This photodiode has a very flat pn junction (2) in order to achieve a high blue sensitivity. The pn-junction (2) is formed in an n-conducting (100)-oriented silicon monocrystal (1) through implantation of B.sup.+ ions. Subsequently, an upper layer (3) generated during the implantation with relatively low p-doping is eroded through anisotropic etching to extend into a region of a deeper lying layer (4) having a relatively high p.sup.+ -doping. This high p.sup.+ -doping layer is then located to provide high sensitivity of the silicon photodiodes light corresponding to blue in the visual spectrum.

Abstract: A mounting of a substantially spherical lens in a metal tubule, in particular for optoelectronic modules in manufacturable mechanically stable and with low expense. The spherical lens (1) is fastened in the thin-walled metal tubule or in its inner front edge through press-fit in the form of a contracting-down or contracting-on or a springiness.

Abstract: A method for forming a T-gate for a MESFET device comprises a double exposure, double develop process. In a first exposure employing lithography a layer of PMMA is applied first to a substrate and spun to a desired thickness and then baked for a predetermined period. The gate pattern was aligned to the ohmic level and either E-beam written or exposed to deep UV radiation through a quartz mask. The wafer as treated was then spray developed using a mixture of MIBK and alcohol. After coating with a Novolak resist, the same gate mask was either realigned to the Ohmic level and exposed to mid-range UV radiation in the 400 nm range or alternatively E-beam written with a modified gate pattern to eliminate the T at the gate pad. The wafer was then spray developed again, this time using LSI developer. The second photo was overexposed in order to form a large opening through the top of the T while the first photo was underexposed to make the stem of the T as narrow as possible.

Abstract: Conventional turnoff power semiconductor devices each comprise a p-n junction blocking in case of turnoff, one zone of which, lying at the p-n junction, has a high doping gradient. But this produces a low dynamic voltage stability characteristic for the power semiconductor device. To increase the dynamic voltage stability characteristic of the power semiconductor device, it is proposed to provide one zone in the form of a region having at least a width of twenty microns viewed from the p-n junction, wherein a maximum doping gradient dN.sub.2 /dx=5.times.10.sup.16 cm.sup.-4 and a predetermined basic dopant concentration is present.

Abstract: A projection of a retaining element swivel-mounted inside a base part of a telephone set projects through the region of the cradle for the handset of the telephone set. The projection engages in a recess of the handset. The retaining element is directly connected with the switch bar for the cradle switch, swivel-mounted and under spring tension.

Abstract: An optical scanning device having a mirror-objective arranged between a radiation source and an object to be scanned, which mirror objective is a radiation-transparent body having a radiation window and concentric reflector on each of two opposite surfaces of such body. By providing at least one of the windows with an aspherical shape, the mirror objective is well corrected for spherical aberrations without imposing stringent requirements on the accuracy of such aspherical shape.

Abstract: The requirements of extreme miniaturization, remote operation, wide bandwidth, good reproducibility in high quantities, low cost and low insertion loss are met with an incrementally adjustable distributed network arrangement in the general configuration of a distributed amplifier. The arrangement comprises delay elements (Z.sub.Dm, Z.sub.Gm) and a plurality of controlled sources (T.sub.n-2, T.sub.n-1, T.sub.ni VCCS), a signal input (E) and a signal output (A). The controlled sources (T.sub.n-2, T.sub.n-1, T.sub.ni VCCS) may be selectively turned on and off. Dual gate FETs (T.sub.1, . . . T.sub.n) are employed as controlled sources, whose first gate (G.sub.1) is connected to the input signal voltage through delay elements (Z.sub.Gm) and whose second gate (G.sub.2) is maintained at suitable dc voltages for turning the respective FETs on and off.

Abstract: Cassette has a bottom section a pivotable cover section, and a tray which is constructed to be inserted into the bottom section and to hold a disc at its outer edge by means of at least three retaining elements arranged on the tray. One of the retaining elements is movable, and transport protection is provided by a latching element arranged on the cover section, which latching element latches the resilient retaining element in its normal position when the cover section is in its closed position.

Abstract: A method provides error protection in a multiprocessor central control unit of a switching system wherein a number of central processors (CP, IOC) as well as a central memory (CMY) are connected in parallel to a central bus system (B:CMY0/B:CMY1). The processors include dual highly-synchronous parallel driven processor units (PU) --apart from a possible tolerable positive timing slip--and integral error detection circuits (V), as well as an integral local memory (LMY), in the ROM-area of which test program sections are stored for testing the respective processors (CP, IOC). Upon the detection of an error by at least one of the error detection circuits (V) of a processor (for example CPx), in the respective processor (CPx), at least if the error is not immediately correctable, the error detection circuit (V in CPx) starts isolating the respective processor (CPx) from the bus system (B:CMY).

Abstract: Processing techniques for various modular components provide various surface mount structures for single device components (10) and multiple device components (FIGS. 6 and 7) suitable as character displays. The technique beings with a slab of substrate material 12 patterned on both sides. Plated through holes (33, 43) connecting back side terminals (19, 20) to front side connective strips (22, 24) are formed. Devices (15, 16) are mounted to land areas (13, 34) and wire bonded to connecting pads (14). The front side is coated with epoxy to encapsulate the devices in a layer having an outer surface formed into optional lenses (262, 263). The slab is then separated to provide the modular components.

Abstract: A coupling arrangement for coupling light of a semiconductor laser diode into a multimode glass fiber. The laser diode emits light along a first optical axis, and the glass fiber receives this light through a light entry surface and transmits it along a second optical axis. The received light forms a maximum intersection angle with the second optical axis which angle is greater than it would be in case both axes coincided. In a preferred embodiment, the laser light is emitted in form of a wedge having a plane of symmetry which bisects the angle of aperture of this wedge and contains the first optical axis. Best results are obtained in this embodiment, if the angle of aperture is about 10.degree. and the maximum intersection angle is up to 8.degree..

Abstract: A lead frame and method for processing the lead frames from a continuous strip of lead frames. A first insulation support member and a second insulative support member are first molded to the lead frame. After the support members are formed, the positioning member for supporting the leads within the lead frame is stamped from the lead frame. After an integrated circuit (IC) is connected to the leads, the IC can be tested within the lead frame since the leads are electrically isolated from the lead frame and each other. Finally the IC can be encapsulated and the leads severed from the lead frame assembly.

Abstract: In a Schottky contact on a semiconductor surface (3) comprising in the semiconductor edge region of the Schottky contact a doped guard ring (7) applied as self-aligning, and in which portions of the semiconductor edge region are shielded by at least one layer including a method for the production of such a Schottky contact, an improvement of the electrical properties of the Schottky contact and an improvement of the yield in the production of the Schottky contact is achieved by using the principles of the invention. Furthermore, high-temperature treatment of the Schottky contact is also made possible. At least one layer, shielding portions of the semiconductor edge region, is applied as a self-aligning protective layer (5; 21, 22; 32; 33, 34) for the guard ring (7).

Abstract: A power FET is driven by a photodiode chain across a switch, which has two FETs (5, 6) arranged in series. Upon illumination the first FET (5) is driven to be conducting, which permits current to flow from a capacitor (C) connected to a fixed voltage into the gate-source capacitor (C.sub.GS) of the power FET (1) and to switch it on rapidly. Upon cessation of the illumination, the first FET (5) is blocked while the second FET (6) is driven to be conducting. Hence, the C.sub.GS of the power FET is discharged and the power FET is blocked.

Abstract: In order to manufacture respectively optocouplers or reflex light barriers particularly efficiently, semiconductor light transmitters and semiconductor light receivers are situated on a single substrate. The optic coupling or optic isolation of light transmitter and light receiver takes place in the substrate. Only then are semiconductor elements separated into discrete units.

Abstract: Light emitting diode (LED) display devices having several luminous segments are disposed inside a transparent front support plate and each of a plurality of light emission diodes is associated with one of the respective luminous segment via a light conducting segment. This display device requires little space, is easy and cost-effective to manufacture, and permits great design flexibility in order to make possible an expansion of its area of use. The invention provides to this end that the light conducting segment is formed in the region of the respective luminous segment as a quasi planar light guide structure for the distribution of the light emitted by the respective light emission diode in the region of the luminous segment. The light emitting diode display device in accordance with the invention is suitable as a LED display for numerals and/or symbols.

Abstract: Processing techniques for various surface mount modular components provide various structures for single device components (10) and multiple device components (FIGS. 6 and 7) suitable as character displays. The technique beings with a slab of substrate material 12 patterned on both sides. Plated through holes (33, 43) connecting back side terminals (19, 20) to front side connective strips (22, 24) are formed. Devices (15, 16) are mounted to land areas (13, 34) and wire bonded to connecting pads (14). The front side is coated with epoxy to encapsulate the devices in a layer having an outer surface formed into optional lenses (262, 263). The slab is then separated to provide the modular components.

Abstract: A solar module mounting arrangement having a frame is composed of a plurality of components in a predetermined shape or profile. The solar modules in the frame are able to be secured so as to be stable over the long term and in a dense packing arrangement having the smallest possible space requirement. An angle bracket (2) provided with a mounting means (5) which serves to attach the solar module to a support base is arranged between at least two adjacent components (3) of the frame. A corner of the compound solar module (4) between the adjacent components (3) of the frame is provided with a recess (15). In this way, the angle bracket (2) is arranged in such a manner that a plurality of such solar modules can be arranged one beside another without spacing (dead space) between the solar modules.

Abstract: A process for the passivation of crystal defects or grain boundaries or internal grain defects or surfaces in an electrically conductive material in a plasma, where the passivation is carried out by the influence of suitable ions on the electrically conductive material to facilitate a shorter process time and lower stress on the electrically conductive material. A high-frequency gas discharge plasma is acted upon by a superimposed d.c. voltage which serves to accelerate the ions, suitable to carry out the passivation, towards the electrically conductive material.