Abstract: The echo path of an echo signal subjected to a time-varying phase shift is bridged by echo cancelling apparatus including a variable phase shifter and an adaptive echo canceller connected in series. The variable phase shifter includes an adaptive control loop whose operation is compatible with that of an adaptive echo canceller. The phase-shifter control loop derives a control signal from the output signal synthesized by the echo cancelling apparatus and the residual echo produced by subtracting this output signal from the echo path signal. The control signal is used to produce a variable phase shift on the signal passing through the variable phase shifter in the echo cancelling apparatus. The echo canceller adaptively synthesizes a replica of the echo signal produced by the linear dispersive portion of the echo channel, while the variable phase shifter is adapted to impart a time-varying phase shift corresponding to the time-varying phase shift encountered by the echo signal in the echo path.

Abstract: The circuit complexity of a closed-loop echo cancellation system for use in a two-way communication circuit is reduced by employing a second adjustable signal processing network of the transversal type positioned in the control loop to emulate the characteristic of a recursive adjustable signal processing network. The two signal processing networks in the control loop are adjusted simultaneously to effect echo cancellation. The second signal processing network compensates for the effect of transmission poles in the echo return path and reduces the duration of the impulse response of the echo return path significantly so that the first signal processing network in the control loop is greatly simplified. A third signal processing network of the recursive type is adjusted in accordance with the internal settings of the second network to perform signal processing inverse to that of the second network.

Abstract: An analog signal to be converted into a high resolution digital signal is first converted to a coarsely quantized signal by a direct feedback coder. A group of successive coarsely quantized signals are then processed by a converter which produces the high resolution digital signal. In the converter, the processing is performed by an arrangement of two accumulators. The first accumulator provides an output signal indicative of the running sum of each group of coarsely quantized signals. The second accumulator has the capability of providing an accumulation of either the negative or the positive of the output signal of the first accumulator. A negative accumulation is used for a first portion of the group and a positive accumulation is used for the second portion of the group to provide a net sum. The net sum is a triangularly weighted accumulation of the successive signals in the group which occasions self-cancelling of the quantizing noise inherent to the direct feedback coder.

Abstract: An improved noise loading arrangement and method are disclosed capable of measuring low intensity intermodulaton distortion products, such as introduced in the operation of individual wideband transmission repeaters. The improved arrangement and method also have the further capability of resolving individual orders of distortion products. The arrangement utilizes a noise signal generator that produces a pseudorandom signal made of several spectral components providing high spectral density throughout a large bandwidth to simulate a broadband message load obtained by frequency multiplexing several independent signal sources. The noise signal is shifted in frequency before a quiet band is produced in the signal applied to the transmission apparatus to be tested. The orders of intermodulation distortion products appearing in the quiet band of the output signal of the transmission apparatus are individually measured to evaluate same.

Abstract: An addressing arrangement is disclosed for systems in which communication is required between a main device and a plurality of associate devices. In the arrangement, access messages are used corresponding to states of shift register sequences. When the main device issues an access message, each associate device transforms the received access message to another access message which is applied to a subsequent associate device. The transformation of access messages allows the associate devices to be identical to each other and respond to the same predetermined access message since each device is uniquely identified by its location in the system. Each associate device also has the capability of being accessed by a prescribed access message which is not transformed by the associate device as it propagates through the system.

Abstract: Apparatus is disclosed for selecting video frames indicative of still pictures from successive video frames, a portion of which are indicative of moving objects and the remaining frames are indicative of still objects. The input and output video signal paths of a frame memory are completed through switches. A speed measurement circuit utilizes the signals at the input and output of the frame memory as the video signal is applied thereto to identify frames indicative of still objects. A logic circuit that operates the switches responds to the output of the speed measurement circuit by changing the position of the switches to retain the content of the frame memory and apply same to the output signal path. Timing circuits are also advantageously utilized to slow down the selection rate of frames indicative of still objects and force the selection of a more recent video frame when the speed of movement fails to fall below a predetermined value.

Abstract: An elastic interface is disclosed for two communicating digital carrier systems autonomously synchronized to disparate time bases independent of each other in frequency and phase. The interface includes two arrangements, one for each direction of transmission between the two digital systems. In an illustrative application for the interface in a telephone system, the first of the two digital systems is a digital transmission system while the second is a time-division-multiplex switching network. The different internal constraints of each system call for digital signals at variance in sampling rate and code format. The interface amply satisfies the difference in sampling rate by an interpolation process which supplies the requisite number of intermediate encoded signal samples. Code conversion techniques are employed to match the code format of each digital system.

Abstract: An automatic impedance matching network for a transmission line includes an impedance monitor which provides a control signal for two variable compensators. One compensator corrects an impedance mismatch at low frequencies while the second compensates within a higher frequency range. A directional sensor completes a conductive path for the control signal to the variable compensators only for the direction of signal propagation indicative of the impedance of the transmission line being compensated. The disclosed arrangement operates automatically from the intelligence signals transmitted over the line to provide impedance compensation for a variety of cable sizes of different lengths.

Abstract: A pulse code modulator utilizes a predetermined bit, which is the least significant bit in each code group, to indicate the polarity of the signal amplitude sample whose magnitude is represented by the immediately succeeding code group. Since variations in magnitude change the value of the predetermined bit in a more or less random fashion and the same is true of the polarity of the samples to be encoded, in the course of the encoding process there is a relatively high probability of occasions when the magnitude and polarity will call for the same value of bit. When there is a disagreement in bit value for the magnitude and polarity, the predetermined bit in each code group is forced to indicate the correct polarity. Additional bits in each of these code groups may also be changed to provide the most accurate magnitude information with the corrected polarity information.

Abstract: An automatic level control circuit utilizes digital techniques in the gain control loop to maintain an output signal within a predetermined amplitude range. A comparator circuit, which has preselected limits or threshold levels that establish the predetermined amplitude range, produces a hysteresis property in its operation. The hysteresis provides a substantial improvement in noise immunity over conventional automatic gain control circuits. The output of the comparator is applied to digital circuitry which controls the variable gain of a linear amplifier. The digital circuitry also includes a preset circuit which sets the gain of the variable amplifier to the middle of its range, thereby reducing the average time required for an input signal to produce an output signal within the predetermined range.

Abstract: An interlocking safety arrangement for electrically powered apparatus utilizes a conventional disengagable electrical connector and a standard fuse holder which are physically arranged so that the connector must be disengaged from its receptacle to gain access to the fuse holder. Since the electrical connector supplies power to the apparatus, disengagement disconnects the power and prevents the possibility of an electrical shock hazard from the terminals associated with the fuse.