Abstract: Embodiments of the invention relate to semiconductor packages in which electrical power is delivered to die-side components removably installed in sockets formed between a package stiffener and an electrical conductor. To this purpose, the package stiffener and the electrical conductor may be electrically coupled to the power and ground terminals of the semiconductor package.

Abstract: A cholesteric display may be formed, in some embodiments, using a single display element to produce multi-colors for display. A cholesteric material may be sandwiched between a pair of substrates, each associated with pairs of opposed electrodes that are arranged in general transversely to the optical axis of incident light. The first pair of electrodes produce one of two liquid crystal states and result in the reflection of light of a particular wavelength. Light of other wavelengths may be reflected when a second pair (or set) of opposed electrodes, arranged in general transversely, also to the optical axis of incident light, are biased appropriately. So does a third pair (or set) of electrodes. A black and white color display may be generated from a single display element by modulating the pitch length of the cholesteric material within each pairs (or sets).

Abstract: A quantum well (QW) layer is provided in a semiconductive device. The QW layer is covered with a composite spacer above QW layer. The composite spacer includes an InP spacer first layer and an InAlAs spacer second layer above and on the InP spacer first layer. The semiconductive device includes InGaAs bottom and top barrier layers respectively below and above the QW layer. The semiconductive device also includes a high-k gate dielectric layer that sits on the InP spacer first layer in a gate recess. A process of forming the QW layer includes using an off-cut semiconductive substrate.

Abstract: A process may include forming a polysilicon pinnacle above and on a polysilicon island and further forming a floating gate from the polysilicon pinnacle and polysilicon island. The floating gate can bear an inverted T-shape. The floating gate can also be disposed above an isolated semiconductive substrate such as in a shallow-trench isolation semiconductive substrate. Electronic devices may include the floating gate as part of a field effect transistor.

Abstract: A spiral inductor is disposed above a substrate that includes two different materials. A dielectric film is the first material that provides structural integrity for the substrate. A second dielectric is the second material that provides a low dielectric-constant (low-K) material closest to the spiral inductor coil. A process of forming the spiral inductor includes patterning the substrate to allow a recess as a receptacle for the second dielectric, followed by forming the spiral inductor mostly above the second dielectric.

Abstract: An integrated heat spreader, heat sink or heat pipe with pre-attached phase change thermal interface material and a method of making an electronic assembly.

Abstract: A planar transformer or balun device, having small trace spacing and high mutual coupling coefficient, and a method of fabricating the same is disclosed. The method may comprise providing a first and a second inductor on a primary and a second substrate respectively, interleaving at least partially the first inductor with the second inductor, coupling the primary and the secondary substrates to form a unitary structure, and providing electrical contacts to couple the first and second inductors with another device or circuit.

Abstract: A process includes planarizing a microelectronic device that includes a gate stack and adjacent trench contacts. The process also includes removing a gate spacer at the gate stack and replacing the gate spacer with a dielectric that results in a lowered overlap capacitance between the gate stack and an adjacent embedded trench contact.

Abstract: A process of making an integrated heat spreader is disclosed. The integrated heat spreader is stamped with a thermal interface material under conditions to form a diffusion bonding zone between the integrated heat spreader and the thermal interface material. The thermal interface material can have one of several cross-sectional profiles to facilitate reflow thereof against a die during a method of assembling a packaged microelectronic device. The thermal interface material can also have one of several footprints to further facilitate reflow thereof against the die.

Abstract: A microelectronic device includes a metal gate with a metal gate upper surface. The metal gate is disposed in an interlayer dielectric first layer. The interlayer dielectric first layer also has an upper surface that is coplanar with the metal gate upper surface. A dielectric etch stop layer is disposed on the metal gate upper surface but not on the interlayer dielectric first layer upper surface.

Abstract: A die-attach composition includes a resin such as a thermosetting resin, a hardener, and a low molecular weight oligomer diluent. A die-attach composition includes a polyimide in a major amount and a resin such as a thermosetting resin in a minor amount. The die-attach composition also includes a reactive polymer diluent. Combinations of the low molecular weight oligomer diluent and the reactive polymer diluent are included. The die-attach composition is applied to surface mount technology such as wire-bond dice. A computing system is also included that uses the die-attach composition.

Abstract: Dielectric materials comprising release agents are described. Also described are a process for improving the processability of dielectric materials during hot embossing, substrates prepared by hot embossing, and integrated-circuit packages comprising the improved substrate.

Abstract: A wafer-cutting process includes first cutting a semiconductive wafer along a first path at a given first cutting intensity including cutting across an intersection. The process also includes second cutting the semiconductive wafer along a second path at a given second cutting intensity. The second cutting intensity is diminished during crossing the intersection and resumed to the given cutting intensity after crossing the intersection.

Abstract: A method of sorting automated tray transfer trays includes detecting if a die remains in the tray. The method includes the ability to interrupt the automated tray transfer process to prevent mixing processed and unprocessed dice. An apparatus includes a sensor for detecting if a die remains in the tray. A sensor includes a protrusion on an automated tray transfer handler.

Abstract: A microelectronic device includes a tunneling pocket within an asymmetrical semiconductive body including source- and drain wells. The tunneling pocket is formed by a self-aligned process by removing a dummy gate electrode from a gate spacer and by implanting the tunneling pocket into the semiconductive body or into an epitaxial film that is part of the semiconductive body.

Abstract: A chip package includes a thermal interface material disposed between a die backside and a heat sink. The thermal interface material includes a first metal particle that is covered by a dielectric film. The dielectric film is selected from an inorganic compound of the first metal or an inorganic compound coating of a second metal. The dielectric film diminishes overall heat transfer from the first metal particle in the thermal interface material by a small fraction of total possible heat transfer without the dielectric film. A method of operating the chip includes biasing the chip with the dielectric film in place.

Abstract: A microelectronic package is provided. The microelectronic package includes a semiconductor substrate and a die having a top surface and a bottom surface, wherein the bottom surface of the die is coupled to the semiconductor substrate. The microelectronic package also includes a nanomaterial layer disposed on the top surface of the die.

Abstract: A method, system and computer program product for handling a session in a packed-based network is provided. The method involves the transmission of packets representing the session. A minimum and a maximum jitter delay value are set for the session. The minimum jitter delay value is based on the time taken by a tone detection algorithm to detect the end of a DTMF event and the maximum jitter delay value is based on the network delay the first packet has been subjected to. The transmitted packets are buffered in a jitter buffer, based on a pre-defined criterion. The packets are played out of the jitter buffer, based on the minimum and maximum jitter delay values.

Abstract: A foamed solder or a nano-porous solder is formed on a substrate of an integrated circuit package. The foamed solder exhibits a low modulus that resists cracking during shock and dynamic loading. The foamed solder is used as a solder bump for communication between an integrated circuit device and external structures.

Abstract: A method and device for thermal conduction is provided. A thermal interface device and method of formation is described that includes advantages such as improved interfacial strength, and improved interfacial contact. Embodiments of thermal conduction structures are shown that provide composite thermal conduction and circulated liquid cooling. Embodiments are further shown that require simple, low numbers of manufacturing steps and reduced thermal interface thickness.