Abstract: High melting temperature Pb/Sn 95/5 solder balls are connected to copper pads on the bottom of a ceramic chip carrier substrate by low melting temperature eutectic Pb/Sn solder. The connection is made by quick reflow to prevent dissolving Pb into the eutectic solder and raising its melting temperature. Then the module is placed on a fiberglass-epoxy circuit board with the solder balls on eutectic Pb/Sn solder bumps on copper pads of the board. The structure is reflowed to simultaneously melt the solder on both sides of the balls to allow each ball to center between the carrier pad and circuit board pad to form a more symmetric joint. This process results in structure that are more reliable under high temperature cycling.

Abstract: A method and system for organizing documents in a database into categories within a single view. The method comprises the steps of providing a database having one or more documents storing data in one or more fields; providing a view having a column formula, said column formula being adapted to run only once upon selecting said view; coding a plurality of statements, each said statement referencing data in said one or more documents storing data one or more fields; concatenating said plurality of statements to form said column formula; and selecting said view to organize and display said one or more documents in categories.

Abstract: A method and system for maintaining copies of a database at a plurality of locations. The method comprises the steps of providing a codeset list having codes and corresponding text, receiving a new codeset list, and comparing the new codeset list to the codeset list to determine differences and creating a log of the differences. A second codeset list is formed comprising the codeset list and the new codeset list, the new codeset list is sent to the plurality of locations, and one of the copies at the plurality of locations is selected for migration. The method further comprises the steps of finding documents at the one of the plurality of locations that contains at least one of the differences in the log, resolving codes for the differences from the second codeset list, and modifying the documents using the second codeset list.

Abstract: A semiconductor package arrangement and, more particularly, a light weight and miniaturized electronic package or module, wherein the dimensions between an integrated circuit comprising a semiconductor chip and those of a chip carrier have been optimized in order to provide for minimum weight and size relationships. Furthermore, disclosed is a method of forming the semiconductor package arrangement so as to produce a small, lightweight and essentially miniaturized chip-sized chip carrier package module. The chip carrier, which may be an organic laminate, multi-layer ceramic substrate or flexible substrate, as required by specific applications, is basically designed to possess overall smaller peripheral dimensions than those of the integrated circuit or semiconductor chip which is adapted to be mounted thereon.

Abstract: An information gathering facility is provided to gather information on a state of a computer system. The information gathering facility includes a dictionary file data structure having at least one inquiry which comprises at least one instruction to call a pre-existing executable on the computer system. The pre-existing executable is executed in response to processing of the at least one instruction and data is obtained from the executable. This data is used in accordance with the at least one instruction to derive a result to be included as part of the state information on the computer system.

Abstract: Data records in a source database on a server are replicated to a cross-domain second server. A devoted client is formed having access to both servers. A generic agent manager database is created having one field, one form, one document, and one view. An intermediary agent is created in the generic agent manager database and run against the source database to replicate records to the second server.

Abstract: Provide an electronic-business-to-electronic-business portal that organizes the access to extended business applications. A method allows end users to access a server using standard Web browsers, and then view their own customized menu of applications. Enhanced security and administrative tools allow this portal to be shared throughout enterprises and across supply chains, providing secure access to collaborative applications by business partners and suppliers. Access to specific applications is granted to authorized users and teams, within and outside of a company. Real-time, on-line registration of users allows for rapid changes in teams and projects. Users can be added, deleted, or have access levels altered to reflect changes in the makeup of teams. Provide a common infrastructure for application administration, security management, and directory use, which can help reduce information technology (IT) costs and speed solution deployment.

Abstract: Fixtures for attaching a semiconductor chip to a substrate. The semiconductor chip has an array of joining material bumps, such as C4 solder balls. The substrate has an array of conductive pads corresponding to the array of joining material bumps. In a first embodiment the fixture has a body having a first cavity for containing the semiconductor chip and a second cavity in communication with the first cavity for containing the substrate. Whereby the substrate is placed over the semiconductor chip with the conductive pads opposing and in contact with the joining material bumps, such that during reflow of the joining material bumps, the weight of the substrate acts against the joining material bumps and aids in the attachment of the semiconductor chip to the substrate to form electrical connections therebetween.

Abstract: Power layers of a multi-layer connection structure forming a power distribution network are partitioned to accommodate all necessary voltages for one or more chips connected thereto in each power layer. By doing so, and rearranging vias as permitted by such partitioning via length is reduced while via numbers can be increased to reduce self-inductance of the structure. Transmission lines formed by conductors in the signal layers are referenced to the correct power supply and return/image currents are made of similar path length and substantially symmetrical for both positive- and negative-going signal transitions. These effects reduce delta-I noise to levels which preserve good signal-to-noise ratios to current and foreseeable reduced signal levels.

Abstract: The protection circuit of the present invention addresses the problem of indeterminate logic levels caused by loss of one of the power supplies in a two-power-supply CMOS integrated circuit. The circuit of the present invention replaces the typical scheme of power supply sequencing to fix the problem. The circuit disclosed herein detects the state of the core voltage and disables the output drivers when the core voltage is detected as being off. The disabled drivers are put into a high impedance state, thereby eliminating the potential for damage and eliminating the need for power supply sequencing. The invention also protects against the sudden loss of the integrated circuit core voltage, VDD, power supply during normal operation.

Abstract: An electronic package which includes a circuitized substrate with a cavity and a first semiconductor chip positioned therein. The first chip is electrically coupled to conductive members located on the circuitized substrate. A second semiconductor chip is positioned on and electrically coupled to the first chip.

Abstract: Speech recognition apparatus includes means for determining when a speaker desires to spell a first word. The speaker may then say a sequence of words selected from a large vocabulary without being restricted to a pre-specified phonetic alphabet. The apparatus recognizes the spoken words, associates letters with these words and then arranges the letters to form the first word. The speaker may also indicate a desire to stop phonetic spelling. Apparatus may also be used for selecting items from a list.

Abstract: An electronic package which includes a circuitized substrate with a cavity and a first semiconductor chip positioned therein. The first chip is electrically coupled to conductive members located on the circuitized substrate. A second semiconductor chip is positioned on and electrically coupled to the first chip.

Abstract: A real-time single pass variable bit rate control strategy is provided to achieve variable bit rate (VBR) MPEG-2 encoding in a video compression system. For a sequence of frames, the level of encoding difficulty of a video interval (i.e., a group of pictures (GOP)) is determined by a perceptual rate-quantization ({overscore (C)}-{overscore (Q)}) model. This model assigns a composite ({overscore (C)}-{overscore (Q)}) curve to each video interval from which the number of bits for the video interval is estimated. The estimation relies on a causal predictive model using the parameters obtained from previously encoded video intervals. The R-Q relationship of each picture type is updated and picture bits are assigned, based on the total rate of the video interval under analysis. Robustness of the variable bit rate control strategy is ensured throughout scene transitions and instabilities by applying, for example, a non-linear median filter, and a low pass filter, respectively.

Abstract: A method to insert or splice new pictures into an existing video stream is provided where the video stream is compressed according to the MPEG-2 video compression standard. The method assures that the new pictures will fit into the encoded stream in the space allotted without running over or under their given bit allocation. The method comprises of steps by which a number of new pictures may be encoded to a precise bit target given the number of free bits in the buffer at the start and end of the splicing, while preventing buffer overruns and under runs.

Abstract: A video decoder for decoding data at a high rate uses a plurality of slower slice decoders. A common memory is shared by all slice decoders drastically reducing storage requirements of individual decoders. Slices are allocated to decoders optimally in response to busy signals providing improved performance over known methods. HDTV signals are decoded using a plurality of ordinary television resolution decoders. Multiple data streams are also decoded.

Abstract: A low power CMOS bidirectional I/O buffer that translates low voltage core logic level signals into the higher voltage logic level signals. A first predrive stage is provided, comprising buffers (e.g., CMOS inverters) for tuning and balancing the circuit and the core signal combining circuit of a second predrive stage, thereby enabling IC designers to reduce the size of transistors in the level-shifting stage and providing more flexibility in the tuning of the predrive circuitry to synchronize or balance the logical transitions of the complementary transistors of the output driving stage. The invention provides a faster balanced level-shifting output buffer which enables higher frequency operation.

Abstract: Automatic generation of a timed delay for a timing clock signal input to an electronic device having a time critical circuit receiving address, data, and control signals at a first time interval and performing data storage and data output operations at subsequent second time intervals as determined by the timing clock signal input thereto. The time delay is generated by combination of a first control device for determining a timing condition of the time critical circuit in accordance with data output results corresponding to a first data storage operation performed by the time critical circuit; and, a second control circuit for automatically adjusting the input of the timing clock signal in time with respect to the first time interval in accordance with the data output results. Adjustment of the timing clock signal delay for subsequent data storage operations optimizes time critical circuit performance for the electronic device.

Abstract: A method for joining electronic devices such as integrated circuits to vias in a substrate. A solder ball attached to an electronic device is joined to a contact pad of a via by a low melting temperature solder. An opening of a via is plugged to prevent wicking of the low melting temperature solder into the via hole. The opening of the via is plugged using a solder ball or a compressed length of a wire material.

Abstract: An apparatus for the remote or local delivery of stored or real-time aroma sensory information to an end user of a multimedia device. The present invention includes an aroma converter for encoding aroma information into electrical signals, a delivery system for delivering the electrical signals, and a retrieval system for receiving and processing the electrical signals to control the aroma or combination of aromas emitted by one or more aroma release chambers.