Abstract: A solder ball grid array carrier package has a circuit board with conductive wirings and a plurality of through holes. At least one semiconductor chip is mounted on an upper surface of the circuit board and bonding wires electrically connect the chip to the conductive wirings. A plurality of solder balls are electrically connected to the conductive wirings, with the solder balls being adhered to a lower surface of the circuit board. A heat sink is also adhered to the lower surface of the circuit board. The heat sink is in direct contact with the through holes of the circuit board, with the through holes allowing for heat dissipation.

Abstract: An end facet light emitting type LED has a slanted light emitting side wall relative to a substrate surface. A method for manufacturing end facet light emitting type light emitting devices prevents the pn-junction regions of the devices from being damaged while a semiconductor wafer is diced to separate light emitting devices from one another. A recess is formed on the semiconductor wafer having a depth which is deeper than the pn-junction. A portion to be cut during dicing of the wafer is vertically and horizontally separated from the pn-junction regions, so that if cracks occur when the wafer is diced, the cracks do not affect the light emitting characteristics of the devices.

Abstract: The invention relates to a wafer for use as a substrate for a semiconductor device, the wafer comprising a round zone formed along a circumference thereof; a flat zone wherein the circumference thereof is partially cut in a straight line; and a laser marking region functioning as a wafer bar-code which is formed in an upper portion of the round zone opposite to and apart from the flat zone. The wafer bar-code has holes having about 2 .mu.m depth and is formed by a soft marking process. A good fine pattern can be formed on the wafer with a follow-on patterning process by substantially cleaning photoresist materials remaining in holes of the laser marking region. Further, the occurrence of G-defects can be reduced, such defects being caused by photoresist particles remaining on the surface of the wafer.

Abstract: A semiconductor memory device includes a pair of read address terminals which supplies first and second read addresses for outputting stored at a selected memory cell to one of a pair of bit lines, and a selector which selects one of the bit lines corresponding to whether a present reading is for the first read address or for the second read address, and which outputs a data read in the selected bit line to an output terminal. Accordingly, the semiconductor memory device can set a frequency of a signal applied to a precharge signal input terminal to a value which is lower than a conventional semiconductor memory device, and can improve the speed at which the data is read.

Abstract: In a superscalar processor, multiple instructions are executed in parallel to obtain multiple execution results, and the multiple execution results are stored in a working register file. Each execution result in the working register file has at least one status bit associated therewith which identifies the execution result as valid data. The multiple execution results contained in the working register data then retired by changing the status bits associated with each execution result to identify the execution result as an architectural copy of the data. In this manner, the speculative data is retired without data movement of the speculative data, thus reducing a number of ports needed in the superscalar processor.

Abstract: A nonvolatile ferroelectric semiconductor random access memory device and a method for protecting ferroelectric memory cell capacitors from data damage are provided. The contents of the FRAM cells are protected against damage when a power supply voltage goes lower than a predetermined threshold voltage level. Since chip power off time is about several milliseconds and it takes several nanoseconds for a memory chip to perform a normal operation such as a read/write operation, the memory device completes the current read/write operation during either unexpected power down or power off mode, thereby protecting data stored in ferroelectric memory cells against damage when a power supply voltage goes down.

Abstract: The outcome of a given branch instruction is predicted using early and late branch history addressing modes. In an early addressing process, a first subset of bits from a branch history register is used to first address a branch history table to obtain a plurality of candidate predictions. In a late addressing process, a second subset of bits from the branch history register is used to again address the branch history table to select one of the plurality of candidate predictions, the second subset of bits including additional branch history information loaded into the branch history register subsequent to the early addressing mode. In this way, more recent branch history information is used to predict the outcome of the given branch instruction.

Abstract: An apparatus for compensating for the motion of an image due to vibrations of a camera during video photography. A first motion detecting part extracts first directional information for an entire image area and detects a first directional motion component over a designated time period. A second motion detecting part extracts and magnifies second directional information for a partial image area and detects a second directional motion component over the designated period. A difference value calculating part inputs the first directional motion component and the second directional motion component and calculates a directional difference value indicative of the absolute value of the difference between the first directional motion component and the second directional motion component multiplied by a reciprocal of a magnification ratio.

Abstract: A fully depleted SOI device includes a semiconductor substrate and a conductive well of a first conductivity type formed in a principal surface of the semiconductor substrate. An insulating layer is formed along the principal surface of the semiconductor substrate and extends across the conductive well. A transistor is formed on the insulating layer such that the insulating layer is interposed between the transistor and the semiconductor substrate, with the transistor including source and drain regions of the first conductivity type formed on the insulating layer, a channel region of a second conductivity type formed on the insulating layer and aligned over the conductive well, and a gate electrode aligned over the channel region. A metal contact is connected to the conductive well for applying a reverse bias potential to the transistor.

Abstract: A method and an apparatus for testing the filtration efficiency of cloth materials intended for use as garments, masks, or gloves in a clean room environment where semiconductor chips are fabricated. The apparatus includes a support for holding the sample of cloth material to be tested; a gas ionizer for introducing an ionized gas into a chamber; an optional humidifier for introducing water vapor into the chamber; a particle generator for introducing particles into the chamber; and a particle counting assembly for counting the number of particles introduced into the chamber before and after they pass through the sample of cloth material being tested. Particles are introduced into the chamber after the static in the chamber has been removed by ionized gas, and the temperature and humidity in the chamber have been optionally adjusted. Filtration efficiency is determined by counting the total number of particles introduced into the chamber and the number of particles that pass through a sample of cloth material.

Abstract: A telecommunications system is for delivering promotional messages to subscribed calling parties. In one configuration, the system includes an association processor for comparing preset targeting criteria of each promotional message with profile data of each subscribed calling party to obtain data associating each of the promotional messages with at least one subscribed calling party. In addition, a message queue having a plurality of electronic queues is provided, each of the electronic queues assigned to at least one subscribed calling party and storing the data associating each of the promotional messages with at least one subscribed calling party. A call processor operates off-line of the association processor and accesses an electronic queue assigned to a calling party and delivers to the calling party a promotional message according the data contained in the accessed electronic queue. In a preferred configuration, multiple queue types are provided having differing targeting precisions.

Abstract: An address program circuit 11 provided in a semiconductor memory device receives an internal address signal which corresponds to an address signal, and outputs a signal /RE1 for causing the switching operation from a defective memory cell to a redundant memory cell. One fuse of each pair of fuses F10-1 and F10-2, F11-1 and F11-2, . . . , F1n-1 and F1n-2 in each of selection portions S0, S1, . . . Sn is cut off in response to the address of the defective memory cell, thereby the signal /RE1 being made active upon receipt of a predetermined internal address signal. With this structure, the defective memory cell may be remedied without generating any complementary internal address corresponding to the address signal as inputted externally.

Abstract: A deposit layer is deposited on the exposed surface of a surface layer formed on a semiconductor wafer. The depositing of the deposit layer continues at least until the deposit layer extends over all the recesses to close completely the openings of all of the recesses to thereby form enclosed areas within the recesses which are devoid of a material of the deposit layer. After forming the enclosed areas within the recesses, the wafer and the deposit layer are then subjected to pressure and heat treatment sufficient to cause parts of the deposit layer to deform to fill the enclosed areas within the respective recesses.

Abstract: A mold set for encapsulating semiconductor chips on lead frame strips with a molding compound supplied in tablets, includes a pot where molding compound tablets are loaded and pressed to form a fluid molding compound (FMC), and a main runner connected to the pot, through which the FMC passes from the pot. A plurality of sub-runners are connected to the main runner and are oriented substantially radially from a center region of the main runner. Each sub-runner has a proximal end, where it joins the main runner, and a distal end. A plurality of cavities are disposed on both sides of the main runner. Each of the plurality of cavities is in flow to communication with the distal end of a respective one of the plurality of sub-runners. The present invention allows the FMC to be introduced into all cavities at nearly the same time and at nearly a constant velocity.

Abstract: A megasonic cleaning system includes a transducer on which a substrate to be cleaned is placed. An oscillating electrically energy source is coupled to the transducer for driving the transducer to produce acoustical energy at substantially megasonic frequencies to vibrate the substrate. A blower assembly is arranged over the substrate, and the blower assembly contains a hollow elongate member having a plurality of nozzles spaced along a length thereof. A drive mechanism is connected to the blower assembly such that the blower assembly is horizontally movable relative to the surface of the substrate. A source of cleaning fluid is in flow communication with the nozzles, and the nozzles are arranged such that a flow path of cleaning fluid through the nozzles is inclined toward an upper surface of the substrate to be cleaned. A vacuum source is in flow communication with the substrate for vacuum-adhering the substrate on the transducer via a vacuum force.

Abstract: A wafer processing method relates to treating a semi-conductor wafer and in particular, but not exclusively, to planarization. The method consists of depositing a liquid short-chain polymer formed from a silicon containing gas or vapor. Subsequently water and OH are removed and the layer is stabilised.

Abstract: A dynamic signal appearing across the output of a logic circuit is converted into a static signal using a dynamic-to-static conversion method which minimizes glitching in the static output. A pull-down device, operatively coupled between an output node and a ground, which is closed while an input node is at a precharge potential and is open while the input node is at a ground potential, and a pull-up device, operatively coupled between a source voltage and the output node, is closed while the input node is at the ground potential and is open while the input node is at the precharge potential.

Abstract: A flat, surface mounted, flexible, multi-purpose wire has a plurality of flat elongated conductors spaced apart in a generally parallel relationship. Each of the flat conductors comprises a plurality of copper layers. An adhesive material separates the flat conductors and an insulation layer surrounds the flat conductors and the adhesive material, with the adhesive material bonding to the insulation layer. A cross-sectional height of the flat conductors and insulation layer is such that the multi-purpose wire will blend in with the surface when painted or after wallpaper is applied.

Abstract: A burn-in test circuit of a semiconductor memory device with a first test circuit having output terminals connected to input terminals of a first half of plurality of word line drivers. A second test circuit has output terminals connected to input terminals of a second half of the plurality of word line drivers. The first and second tests circuits are sequentially activated to perform a burn-in test for all the memory cells.

Abstract: An apparatus used for detecting the endpoint or described completion point of an etching process has a detection window, an optical cable, and a bracket for fixedly holding the detection window and the optical cable with respect to each other. The detection window protrudes outwardly from a wall of a reaction chamber. The optical cable transmits light generated during an etching process from the detection window to a detecting device separate from the detection chamber. The bracket is attached to the wall of the reaction chamber so as to configure a space between the bracket and the detection window. The configuration reduces the intensity of the electric field formed between the bracket and plasma in the reaction chamber.