Abstract: An apparatus for sensing an insertion state of a wafer disposed in a slot of a wafer cassette, includes a stage supporting the wafer cassette that is movable relative to a light beam source and photo-detector positioned on either side of the wafer cassette. A position determining mechanism is connected to the photo-detector and a timer is connected to the position determining mechanism. The position determining mechanism receives, from the photo-detector, a position signal indicative of a wafer disposed in the light path. The timer generates a pulse signal that is received by the position determining mechanism after a predetermined time period has elapsed from a time when the position signal is received by the position determining mechanism. The position determining mechanism generates a decision signal, indicative of a wafer incorrectly loaded in a slot of the wafer cassette, when the position signal and pulse signal overlap.

Abstract: A test method for testing an integrated circuit (IC) device, including a step of checking the handler contacts with IC devices to be tested after a test apparatus and a handler are completely set up and before actual testing operations commence. The handler contact check device includes a handler contact check board mounted to the handler, which is provided with a plurality of pins directly contacting outer terminals of the IC devices, and wiring circuits for transferring contact check electrical signals from a test apparatus to the contacts between the plurality of pins and the outer terminals, and for transferring output electrical signals from the contacts to the test apparatus, and a contact check package device having the same shape and outer terminals as the IC devices to be tested.

Abstract: A first method of manufacturing a printed circuit board includes steps of (a) preparing a board which has a chip mounting area and circuit patterns on an upper surface and metal pads to be electrically connected to the circuit patterns on a lower surface, (b) attaching a metal plate to the lower surface of the board, (c) forming metal patterns on the metal pads by etching the metal plate, and (d) forming metal bumps by plating the metal patterns.

Abstract: A dust-proof fabric is disclosed. The fabric comprises an inner knit fabric layer, an intermediate layer of a moisture absorbent polyurethane film and a high density woven polyester fabric outer layer. The outer layer contains a first set of spaced apart conductive yarns aligned with one another in the warp direction and a second set of spaced apart conductive yarns aligned in the weft direction.

Abstract: An interface circuit with high speed data transmission is disclosed. The interface circuit comprises a clock signal generator outputting a clock signal and an inversion clock signal, a shift signal generator receiving a start signal, the clock signal and the inversion clock signal. The shift signal generator outputs shift signals having odd shift signals and even shift signals. A first signal of the odd shift signals is generated in response to the start signal and the clock signal. The even shift signal is generated in response to a previous odd signal and the inversion clock signal. The odd shift signal is generated in response to a previous even signal and the clock signal. The interface circuit further comprises a data distribution circuit and odd and even output circuits. The data distribution circuit receives data, the clock signal and the inversion clock signal and outputs odd data in response to the data and the clock signal and even data in response to the data and the inversion clock signal.

Abstract: A smock to be worn by a clean room operator includes an upper material part for covering the upper body of the operator, a lower material part for covering the lower body of the operator, wherein the upper material part and the lower material part are integrally formed. An air passage within the smock connects the upper material part and the lower material part, and a discharge part is in flow communication with the air passage for venting the air within the smock.

Abstract: A semiconductor wafer tape laminating system includes a loading device for conveying a wafer or cassette to a predetermined location where a laminating process is performed. A laminating device attaches UV tape to the front surface of the wafer conveyed by the loading device. A precutting device having a knife cuts the UV tape around the wafer as spaced therefrom to leave an edge of the tape protruding beyond the peripheral edge of the wafer. A wire cutting device having a wire removes the edge of the UV tape left around the wafer by the precutting device. An ultra-violet illuminator irradiates the edge of the UV tape with ultra-violet rays, and an unloading device carries the wafer to a downstream processing station. When the edge of the UV tape is irradiated with ultra-violet rays, it loses its adhesive strength. Accordingly, the edge will not attach itself to the wafer or to a piece of processing equipment after it is removed by the wire cutting device.

Abstract: A semiconductor manufacturing system includes a loadlock chamber, a low level vacuum pump connected to said loadlock chamber so as to create a low level vacuum in the loadlock chamber, a processing chamber in which a semiconductor manufacturing process is carried out while the processing chamber is maintained at a high level vacuum, a gate valve interposed between and connecting the loadlock chamber and the processing chamber, and a pressure relieving device for reducing the pressure difference between the low level vacuum of the loadlock chamber and the high level vacuum of the processing chamber at the time the gate valve is opened. The pressure relieving device is a high level vacuum pump which can be dedicated to the loadlock chamber or which can be the same pump as that used to evacuate the processing chamber. The high level vacuum pump is connected to the loadlock chamber by an air valve.

Abstract: There is provided a method of etching metallic film for a semiconductor device, in which a semiconductor substrate with a metallic film exposed in a film pattern is inserted onto a chuck in a chamber of an electrostatic shielded radio frequency (ESRF) inductive-coupled plasma source, the ESRF inductive-coupled plasma source also including a coil connected to an upper electrode, a lower electrode connected to the chuck, a gas supply assembly, a pressure control assembly and a temperature control assembly. An etching gas is supplied to the chamber at a predetermined etch gas supply rate. Pressure inside the chamber is maintained at a predetermined pressure level. The upper and lower electrodes are powered with predetermined upper and lower powers, respectively, at predetermined upper and lower RFs, respectively. The chamber walls are cooled to a predetermined temperature.

Abstract: A metal-semiconductor field effect transistor includes an AlGaAs buffer layer made of Al.sub.x Ga.sub.1-x As, wherein 0<x<0.4, and a channel layer made of an n-type doped In.sub.y Ga.sub.1-y As, wherein 0<y<0.4, having a thickness equal to or less than a critical thickness for lattice-matching with GaAs. Further, a doped AlGaAs layer is interposed between the AlGaAs buffer layer and the channel layer. The doped AlGaAs layer is made of Al.sub.x Ga.sub.1-x As, wherein 0<x<0.4, is doped with Si of a concentration of 5*10.sup.17 cm.sup.-3 or more, and has a thickness which is sufficient to provide a barrier against holes caused by a donor depletion region.

Abstract: An apparatus for low pressure chemical vapor deposition for fabricating a semiconductor device comprises a group of reaction chambers, a group of high-vacuum pumps connected to the reaction chambers, a group of gate valves connected to the high-vacuum pumps, and a low-vacuum pump connected to the gate valves. There are fewer gate valves than high-vacuum pumps. A method for fabricating a semiconductor device using the above apparatus includes the sequence and duration of opening gate valves, injecting reaction gases, and pumping with the low vacuum pump. According to the present invention, since the number of pumps is reduced, the cost for installation, operation and maintenance of the semiconductor device fabrication apparatus is reduced.

Abstract: An alignment mark AM appears on the surface of an aluminum (Al) wiring layer 110 when the Al wiring layer is formed to fill up a recess 108 therewith, the recess 108 being formed in oxide layers 104 and 106 formed over the surface of a silicon substrate 102 by etching these layers in part. The depth of the recess 108 is controlled such that there is formed no direct contact between the Al wiring layer 110 and the metallic silicon of the silicon substrate 102. Consequently, in the process of forming the alignment mark, the Al wiring layer 110 is prevented from chemically reacting with the metallic silicon. Thus, there is caused neither deterioration in the quality of oxide films 104 and 106, nor destruction of the alignment mark AM appearing on the surface of the Al wiring layer 110, even if the Al wiring layer 110 is formed by sputtering aluminum on oxide layers and the recess as well at a high temperature.

Abstract: A rotary vane machine having a rotary-linear vane guidance structure, including a translation ring disposed at each axial end of the machine, the translation ring rotating around a fixed hub, with the fixed hub being eccentric to a rotor shaft axis, with the rotor spinning around the rotor shaft axis which is a fixed rotational axis relative to a stator cavity. A plurality of vanes are disposed in a corresponding plurality of vane slots in the rotor, each of the vanes having a tip portion and a base portion, with the base portion having a protruding tab extending from each axial end therefrom. A plurality of linear channels are formed in each translation ring, wherein the protruding tabs extending from the base portion of each of the plurality of vanes communicate with a respective linear channel in the translation ring, whereby the rotor rotation causes rotation of the vanes and a corresponding rotation of the translation ring.

Abstract: An air current guiding apparatus includes a plurality of dampers installed on a filter unit on an inner wall of air supply unit for blowing clean air over wafers loaded in a boat for transfer to a reaction chamber for chemical vapor deposition. Each of the dampers has a certain length and angular orientation to force the air in a designated direction so that the air current in a wafer loading chamber maintains an appropriate velocity and is free from air turbulence, thereby minimizing the number of contaminating particles in the wafer loading chamber.

Abstract: A clock pulse circuit having a construction of multiple stories provided with a terminal for a clock pulse generator, a first story trunk line connected the clock pulse generator, a plurality of first story branch lines, each of which is connected the first story trunk line, a plurality of second story trunk lines each of which is connected one of the second story trunk liens, a plurality of second story branch lines, each of which is connected one of the second story trunk lines, anda plurality of combinations of higher story trunk lines and higher story branch lines, such combinations being composed of in the similar manner as is defined above, wherein a switching element is provided between selected one of the branch lines and the trunk line following the selected one of the branch lines.

Abstract: A development system for manufacturing semiconductor devices uses a container to easily remove by-products of development from a wafer by: soaking the wafer in the developer with the pattern face downward; spraying rinse onto the pattern face from below; rotating the wafer at high speed to remove the rinse and by-products; and then cleaning and ventilating the container so that the developer, rinse, cleaning solution and development by-products are removed from the container. No by-products are left in the comers of the pattern of the pattern face, because the development and rinse are performed with the pattern facing downward. No by-products, developer, rinse or cleaning solution contaminate the wafer, because steps of the process are performed in an enclosed container which is cleaned and ventilated between development of each wafer.

Abstract: Disclosed is a semiconductor memory in which a repair device is easily positioned with respect to a redundancy fuse for a designation of replacement and a defect identification fuse. A semiconductor memory 1 includes sixteen blocks I/0300-I/0315 containing regular memory cells and redundancy memory cells, a fuse area 2 on one side, and sixteen I/O pads 3a-3p serving as connecting points, to the outside, of an internal circuit. The fuse area 2 includes a row redundancy fuse region 21, a column redundancy fuse region 22 and an operating fuse region 23. The operating fuse region 23 embraces operating fuses 231, 232 and an identification fuse 4 cut off when the internal circuit is defective, which are disposed adjacent to each other. An identification pad 5 for outputting a state of the identification fuse 4 to the outside is provided adjacent to the fuse area 2.

Abstract: A device for concentrating chemical substances for use during the fabrication of a semiconductor device uses a sample container for holding chemical substances. A feed tube in gas flow communication with the sample container introduces a carrier gas. A vapor outlet in gas flow communication with the sample container discharges a mixture of a vapor and the carrier gas. A sample heater, disposed above and apart from the sample container, heats the chemical substances to a first predetermined temperature. A gas source supplies the carrier gas, and a gas heater, in gas flow communication with both the gas source and the feed tube, heats the carrier gas to a second predetermined temperature. A condenser in flow communication with the vapor outlet produces a liquid from the vapor, and a collecting container collects the liquid.

Abstract: The object of the present invention is to provide dust proof clothing comprised such that on the inside of the dust proof clothing in contact with the wearer a lot of dust is caught, and on the outside of the dust proof clothing dust does not attach easily, and which has superior strength. Compared to the inside surface of the dust proof clothing the outside surface has fewer dust catching spaces, and compared with the outside surface the inside surface has more dust catching spaces so that on the inside surface more curved fibers are exposed than linear fibers and on the outside surface, more linear fibers are exposed than curved fibers.

Abstract: A semiconductor memory device of the present invention comprises a memory cell array including row lines, column lines and memory cells arranged in rows and columns is disclosed. Each memory cell is connected to one of the row lines and one of the column lines. The semiconductor memory device further comprises a row select circuit connected to the row lines for selecting one of the row lines in response to a row select signal, a column select circuit connected to the column lines for selecting one of the column lines in response to a column select signal, a potential detector connected to the memory cell array for detecting a potential level of the lines of the memory cell array, and a test memory cell array connected to said potential detector through a test line. The test memory cell array tests a structural default of the row lines. The test memory cell array has a row of transistors each of which has a source connected to a potential source.