Patents Represented by Attorney, Agent or Law Firm Joseph Bach
  • Patent number: 6818140
    Abstract: A high plasma density etch process for etching an oxygen-containing layer overlying a non-oxygen containing layer on a workpiece in a plasma reactor chamber, by providing a chamber ceiling overlying the workpiece and containing a semiconductor material, supplying into the chamber a process gas containing etchant precursor species, polymer precursor species and hydrogen, applying plasma source power into the chamber, and cooling the ceiling to a temperature range at or below about 150 degrees C. The etchant and polymer precursor species contain fluorine, and the chamber ceiling semiconductor material includes a fluorine scavenger precursor material. Preferably, the process gas includes at least one of CHF3 and CH2F2. Preferably, the process gas further includes a species including an inert gas, such as HeH2 or Ar. If the chamber is of the type including a heated fluorine scavenger precursor material, this material is heated to well above the polymer condensation temperature, while the ceiling is cooled.
    Type: Grant
    Filed: October 31, 2001
    Date of Patent: November 16, 2004
    Inventor: Jian Ding
  • Patent number: 6818562
    Abstract: A method and apparatus for operating a matching network within a plasma enhanced semiconductor wafer processing system that uses pulsed power to facilitate plasma processing.
    Type: Grant
    Filed: May 14, 2002
    Date of Patent: November 16, 2004
    Inventors: Valentin Todorow, John Holland, Nicolas Gani
  • Patent number: 6812145
    Abstract: Charging damage, caused by electron shading during plasma etching in a dual damascene structure, is alleviated by first depositing a protective conductive layer which provides a conductive path for maintaining charge balance in the etched structures. This conductive layer reduces the buildup of unbalanced positive charge in the contact opening, and the damage done to underlying layers caused by the resultant tunneling current. Further, if the protective conductive layer comprises a material which can also serve as an interdiffusion barrier layer for the contact opening fill material, a separate subsequent step to deposit such a barrier layer on the contact opening sidewall is avoided. Further, in the process of doing lithography on the trench etch resist layer, the protective conductive layer also functions as an antireflective coating, permitting the stepper to accurately focus the desired pattern.
    Type: Grant
    Filed: June 5, 2003
    Date of Patent: November 2, 2004
    Inventor: Shawming Ma
  • Patent number: 6813534
    Abstract: In an endpoint detection method for a process performed in a substrate processing chamber with an energized gas, a process variable of the process is detected. The process variable comprising at least one of (i) a radiation emitted by the energized gas, (ii) a radiation reflected from a substrate in the chamber, (iii) a reflected power level of the energized gas, and (iv) a temperature in the chamber. An endpoint signal is issued when the process variable is indicative of an endpoint of the process. A process parameter of the process is also detected, the process parameter comprising at least one of (i) a source power, (ii) an RF forward power, reflected power, or match components, (iii) an RF peak-to-peak voltage, current or phase, (iv) a DC bias level, (v) a chamber pressure or throttle valve position, (vi) a gas composition or flow rate, (vii) a substrate temperature or composition, (viii) a temperature of a chamber component or wall, and (ix) a magnetic confinement level or magnet position.
    Type: Grant
    Filed: February 20, 2002
    Date of Patent: November 2, 2004
    Inventors: Zhifeng Sui, Paul E Luscher, Nils Johansson, Michael D Welch
  • Patent number: 6808647
    Abstract: A method and apparatus for reducing the sensitivity of semiconductor processing to chamber conditions is provided. Process repeatability of common processes are affected by changing surface conditions which alter the recombination rates of processing chemicals to the chamber surfaces. In one aspect of the invention, a composition of one or more etchants is selected to optimize the etch performance and reduce deposition on chamber surfaces. The one or more etchants are selected to minimize buildup on the chamber surfaces, thereby controlling the chamber surface condition to minimize changes in etch rates due to differing recombination rates of free radicals with different surface conditions and achieve etch repeatability. In another embodiment, the etchant chemistry is adjusted to reduce the change to internal surface conditions after a cleaning cycle. In another embodiment, a process recipe is selected to reduce the sensitivity of the etch process to the chamber conditions.
    Type: Grant
    Filed: July 12, 1999
    Date of Patent: October 26, 2004
    Inventors: Songlin Xu, Zhiwen Sun, Dragan Podlesnik, Xueyu Qian
  • Patent number: 6808747
    Abstract: A method of depositing boron carbide on an aluminum substrate, particularly useful for a plasma etch reactor having interior surfaces facing the plasma composed of boron carbide, preferably principally composed of B4C. Although in this application, the boron carbide may be a bulk sintered body, in the method of the invention it may be a layer of boron carbide coated on an aluminum chamber part. The boron carbide coating may be applied by thermal spraying, such as plasma spraying, by chemical vapor deposition, or by other layer forming technique such as a surface converting reaction. The boron carbide is highly resistant to high-density plasma etchants such as BCl3. The plasma sprayed coating is advantageously applied to only a portion of an anodized aluminum wall. The boron carbide may be sprayed over the exposed portion of an aluminum substrate over which the anodization has been removed.
    Type: Grant
    Filed: January 21, 2000
    Date of Patent: October 26, 2004
    Inventors: Hong Shih, Nianci Han
  • Patent number: 6806095
    Abstract: A method of etching high dielectric constant materials using halogen gas and reducing gas chemistry. An embodiment of the method is accomplished using a 20 to 300 sccm of chlorine and 2 to 200 sccm of carbon monoxide, regulated to a total chamber pressure of 2-100 mTorr to etch a hafnium oxide layer.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: October 19, 2004
    Inventors: Padmapani C. Nallan, Guangxiang Jin, Ajay Kumar
  • Patent number: 6802933
    Abstract: This invention is directed to a method for etching films on semiconductor substrates and cleaning etch chambers. The method includes an improved processing sequence and cleaning method where residue formed from processing a previous substrate are cleaned by the etching process used to remove an exposed layer of material from the present substrate. The process provides improved substrate throughput by combining the step to clean residue from a previous substrate with an etch step conducted on the present substrate. Applicants have found the method particularly useful in processing structures such as DRAM stacks, especially where the residue is formed by a trench etched in the previous silicon substrate and the exposed layer etched from the present substrate is silicon nitride.
    Type: Grant
    Filed: December 18, 2000
    Date of Patent: October 12, 2004
    Inventors: Anisul Khan, Ajay Kumar, Jeffrey D. Chinn, Dragan Podlesnik
  • Patent number: 6800213
    Abstract: An oxide etching recipe including a heavy hydrogen-free fluorocarbon having F/C ratios less than 2, preferably C4F6, an oxygen-containing gas such as O2 or CO, a lighter fluorocarbon or hydrofluorocarbon, and a noble diluent gas such as Ar or Xe. The amounts of the first three gases are chosen such that the ratio (F—H)/(C—O) is at least 1.5 and no more than 2. Alternatively, the gas mixture may include the heavy fluorocarbon, carbon tetrafluoride, and the diluent with the ratio of the first two chosen such the ratio F/C is between 1.5 and 2.
    Type: Grant
    Filed: June 7, 2002
    Date of Patent: October 5, 2004
    Inventors: Ji Ding, Hidehiro Kojiri, Yoshio Ishikawa, Keiji Horioka, Ruiping Wang, Robert W. Wu, Hoiman (Raymond) Hung
  • Patent number: 6797189
    Abstract: A plasma etching process, particularly useful for selectively etching oxide over a feature having a non-oxide composition, such as silicon nitride and especially when that feature has a corner that is prone to faceting during the oxide etch. A primary fluorine-containing gas, preferably hexafluorobutadiene (C4F6), is combined with a significantly larger amount of the diluent gas xenon (Xe) enhance nitride selectivity without the occurrence of etch stop. The chemistry is also useful for etching oxides in which holes and corners have already been formed, for which the use of xenon also reduces faceting of the oxide. For this use, the relative amount of xenon need not be so high. The invention may be used with related heavy fluorocarbons and other fluorine-based etching gases.
    Type: Grant
    Filed: March 25, 1999
    Date of Patent: September 28, 2004
    Inventors: Hoiman (Raymond) Hung, Joseph P. Caulfield, Hongqing Shan, Michael Rice, Kenneth S Collins, Chunshi Cui
  • Patent number: 6797581
    Abstract: A method for manufacturing an improved APD structure and an improved manner of operating APD's particularly beneficial for a single photon detection applications are provided. An APD is provided having an absorption region, a control region, and a multiplication region, wherein the multiplication region has a k value of approximately 1. In one example the multiplication region comprises a doped InP layer. The field control layer is designed so as to produce a reduction of electric field that is equal to the multiplication region's breakdown electric field, plus or minus 5V/&mgr;m. The method comprises applying a potential across the APD so as to induce an electric field across the multiplication region that exceeds the breakdown field; while having the control region shield the absorption region to prevent excessive noise.
    Type: Grant
    Filed: November 24, 2003
    Date of Patent: September 28, 2004
    Assignee: Credence Systems Corporation
    Inventor: James S. Vickers
  • Patent number: 6797639
    Abstract: A capacitively coupled reactor for plasma etch processing of substrates at subatmospheric pressures includes a chamber body defining a processing volume, a lid provided upon the chamber body, the lid being a first electrode, a substrate support provided in the processing volume and comprising a second electrode, a radio frequency source coupled at least to one of the first and second electrodes, a process gas inlet configured to deliver process gas into the processing volume, and an evacuation pump system having pumping capacity of at least 1600 liters/minute. The greater pumping capacity controls residency time of the process gases so as to regulate the degree of dissociation into more reactive species.
    Type: Grant
    Filed: September 24, 2002
    Date of Patent: September 28, 2004
    Assignee: Applied Materials Inc.
    Inventors: James D Carducci, Hamid Noorbakhsh, Evans Y Lee, Bryan Y Pu, Hongching Shan, Claes Bjorkman, Siamak Salimian, Paul E Luscher, Michael D Welch
  • Patent number: 6797188
    Abstract: A method of etching a silicon-containing material in a substrate comprises placing the substrate in a process chamber and exposing the substrate to an energized gas comprising fluorine-containing gas, chlorine-containing gas and sidewall-passivation gas. The silicon-containing material on the substrate comprises regions having different compositions, and the volumetric flow ratio of the fluorine-containing gas, chlorine-containing gas, and sidewall-passivation gas is selected to etch the compositionally different regions at substantially similar etch rates.
    Type: Grant
    Filed: February 18, 2000
    Date of Patent: September 28, 2004
    Inventors: Meihua Shen, Wei-nan Jiang, Oranna Yauw, Jeffrey Chinn
  • Patent number: 6795292
    Abstract: An apparatus for reducing by-product formation in a semiconductor wafer-processing chamber. In a first embodiment, the apparatus comprises a chuck having a chucking electrode and a radially extending peripheral flange. A collar is disposed over the peripheral flange defining a first gap therebetween, and circumscribes the chuck. A heater element is embedded within the collar and adapted for connection to a power source. In a second embodiment, the apparatus comprises a chuck having a chucking electrode and a radially extending peripheral flange, and a collar having a heater element embedded therein. The collar is disposed over the peripheral flange to define a gap therebetween, and circumscribes the chuck. Moreover, a pedestal having a gas delivery system therein is disposed below the chuck and collar. In a third embodiment, the apparatus comprises a chuck having a chucking electrode and a radially extending peripheral flange, a collar, and a waste ring having a heater element embedded therein.
    Type: Grant
    Filed: May 15, 2001
    Date of Patent: September 21, 2004
    Inventors: Dennis Grimard, Arnold Kholodenko, Alex Veytser, Senh Thach, Wing Cheng
  • Patent number: 6793835
    Abstract: An integrated in situ etch process performed in a multichamber substrate processing system having first and second etching chambers. The process includes transferring a substrate having formed thereon in a downward direction a patterned photoresist mask, a dielectric layer, a stop layer and a feature in the substrate to be contacted into the first etching chamber to etch the dielectric layer. The substrate is then transferred from the first etching chamber to the second etching chamber under vacuum conditions and, in the second etching chamber, is exposed to an oxygen plasma or similar environment to strip away the photoresist mask deposited over the substrate. After the photoresist mask is stripped, the stop layer is etched through to the feature to be contacted in either the second or a third etching chamber of said multichamber substrate processing system. All three etching steps are performed in a system level in situ process so that the substrate is not exposed to an ambient between steps.
    Type: Grant
    Filed: October 24, 2002
    Date of Patent: September 21, 2004
    Inventors: Lee Luo, Claes H. Bjorkman, Brian Sy Yuan Shieh, Gerald Zheyao Yin
  • Patent number: 6790311
    Abstract: In a plasma reactor including a reactor chamber, a workpiece support for holding a workpiece inside the chamber during processing and an inductive antenna, a window electrode proximal a wall of the chamber, the antenna and wall being positioned adjacently, the window electrode being operable as (a) a capacitive electrode accepting RF power to capacitively coupled plasma source power into the chamber, and (b) a window electrode passing RF power therethrough from said antenna into the chamber to inductively couple plasma source power into the chamber.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: September 14, 2004
    Inventors: Kenneth S Collins, Michael Rice, Farahmand E Askarinam, Douglas A Buchberger, Jr., Craig A Roderick
  • Patent number: 6787054
    Abstract: A process for etching a substrate and removing etch residue deposited on the surfaces in the etching chamber has two stages. In the first stage, an energized first process gas is provided in the chamber, and in the second stage, an energized second process gas is provided in the chamber. The energized first process gas comprises SF6 and Ar, the volumetric flow ratio of SF6 to other components of the first process gas being from about 5:1 to about 1:10. The energized second process gas comprises CF4 and Ar, the volumetric flow ratio of CF4 to other components of the second process gas being from about 1:0 to about 1:10.
    Type: Grant
    Filed: February 3, 2003
    Date of Patent: September 7, 2004
    Inventors: Xikun Wang, Scott Williams, Shaoher X. Pan
  • Patent number: 6787475
    Abstract: A dielectric plasma etch method particularly useful for assuring that residue does not form in large open pad areas used for monitoring etching of narrow via and contact holes. The main dielectric etch of the via and contact holes uses a highly polymerizing chemistry, preferably of a low-F/C fluorocarbon such as C4F6 in conjunction with O2 and Ar. A short flash step precedes the main plasma etch using a plasma of a gas less polymerizing than the gas of the main etch, and the plasma is not extinguished between the flash and main steps. The flash step may be used to remove an anti-reflection coating (ARC) covering the dielectric layer and use a lean fluorocarbon, such as CF4, perhaps together with O2 and Ar. In the absence of ARC, an argon flash may be used.
    Type: Grant
    Filed: June 5, 2002
    Date of Patent: September 7, 2004
    Inventors: Zhuxu Wang, Jingbao Liu, Claes H. Bjorkman, Bryan Pu
  • Patent number: 6784107
    Abstract: A method of planarizing a copper interconnect structure using an atomic layer removal (ALR) technique to planarize a copper layer. In one embodiment, the ALR process performs a plurality of cycles, each cycle having a period of forming a film of copper fluoride on the copper layer and a period of removing the film of copper fluoride. The ALR process is repeated until a barrier layer beneath the copper layer is then etched to expose a dielectric material. The remaining copper forms a conductive line that is substantially coplanar with the dielectric material.
    Type: Grant
    Filed: March 18, 2003
    Date of Patent: August 31, 2004
    Inventors: Hui Chen, Chun Yan, Wai-Fan Yau
  • Patent number: 6783626
    Abstract: A substrate processing apparatus has a chamber having a substrate transport to transport a substrate onto a substrate support in the chamber, a gas supply to provide a gas in the chamber, a gas energizer to energize the gas, and an exhaust to exhaust the gas. A detector is adapted to detect a first intensity of a first wavelength of a radiation emission from an energized gas in the chamber and generate a first signal in relation to the first intensity and to detect a second intensity of a second wavelength of the radiation emission and generate a second signal in relation to the second intensity. A controller receives the first and second signals from the detector, performs a mathematical operation on the first and second signals to determine a value related to a condition of the chamber, and treats the chamber in relation to the value by providing instructions to operate one or more of the substrate transport, substrate support, gas supply, gas energizer and gas exhaust.
    Type: Grant
    Filed: May 14, 2001
    Date of Patent: August 31, 2004
    Inventors: Nam-Hun Kim, Chong Hwan Chu