Patents Represented by Attorney, Agent or Law Firm Juan Carlos A. Marquez, Esq.
  • Patent number: 6714005
    Abstract: A non-contact type displacement sensor is provided with a housing, a rotational shaft being in an approximately cylindrical hollow shape, a magnetic circuit forming member disposed in an inner space of the rotational shaft, and a magnetic sensing element supported by a housing so as to be positioned on a central axis of the rotational shaft in a space enclosed by the magnetic circuit forming member, wherein the magnetic sensing element is not displaced.
    Type: Grant
    Filed: March 22, 2002
    Date of Patent: March 30, 2004
    Assignee: Aisin Seiki Kabushiki Kaisha
    Inventors: Masahiro Kimura, Keiji Yasuda, Kiyohiro Fukaya
  • Patent number: 6715065
    Abstract: In an information processing apparatus which executes micro programs having branch instructions, two micro instructions are read at once, each of which instructions comprises either a field for specifying the branch target address in the following Nth (N≧2) cycle from the reading cycle of the micro instruction, or a field for determining the termination of micro program in the following Nth (N≧2) cycle, and a control field for controlling the execution in the next cycle.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: March 30, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Atsushi Ebata, Michitaka Yamamoto, Takeshi Kato
  • Patent number: 6713401
    Abstract: Disclosed is a method for manufacturing a semiconductor device which efficiently carries out a process on a semiconductor substrate, such as dry etching, and cleaning for removing a foreign matter after the process. The method includes a step of removing a foreign matter by using both an electric action of a plasma generated by plasma generation means and a physical action caused by a frictional stress of a fast gas stream formed by a pad structure which is arranged close to a wafer surface.
    Type: Grant
    Filed: August 28, 2001
    Date of Patent: March 30, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Kenetsu Yokogawa, Yoshinori Momonoi, Kazunori Tsujimoto, Shinichi Tachi
  • Patent number: 6714176
    Abstract: A plasma display device includes plural discharge cells each defined by a pair of first and second discharge-sustaining electrodes and an address electrode intersecting therewith. A driving method thereof includes period for addressing the discharge cells and thereby inducing address-discharge therein, and light-emission period for applying repetitive pulse voltages to at least one of the first and second discharge-sustaining electrodes such that the addressed ones of the discharge cells start and sustain main discharge depending upon the presence of the address-discharge to generate light. Second repetitive pulse voltages are applied to the address electrodes to generate pre-discharge, and rise in portions of the light-emission period during which an absolute value of a voltage difference between the first and second discharge-sustaining electrodes does not exceed 0.
    Type: Grant
    Filed: February 20, 2002
    Date of Patent: March 30, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Kenichi Yamamoto, Keizo Suzuki, Hiroshi Kajiyama, Shirun Ho
  • Patent number: 6711114
    Abstract: A disc transfer apparatus, which relies on a spring force for inserting a disc and on a motor for removing the disc, is provided to prevent the motor from acting as a load when the disc is inserted. A holding mechanism is provided in the disc transfer apparatus for holding a control gear included in a power transmission path (from a two-way motor for moving a pickup and for moving a push-back member), with respect to an upstream gear and a downstream gear without meshing therewith. The control gear is released from the holding mechanism by ejecting means.
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: March 23, 2004
    Assignee: Tanashin Denki Co., Ltd.
    Inventors: Shinsaku Tanaka, Takashi Yamanaka
  • Patent number: 6710429
    Abstract: A semiconductor device is provided with outer leads which show themselves in the bottom surface of the resin encapsulated body. This structure eliminates minute chipping and cracking near the resin which has been cut in the vicinity of the end of the outer lead. The semiconductor device is produced in such a way that a push-back-portion is previously arranged between leads of the lead frame and the push-back-portion is pushed down after molding. The resulting semiconductor device has outer leads such that there is no encapsulating resin between outer leads which show themselves in the bottom surface of the resin encapsulated body.
    Type: Grant
    Filed: June 18, 2001
    Date of Patent: March 23, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Masahiro Saito, Toru Nagamine, Ichio Shimizu
  • Patent number: 6711179
    Abstract: Provided is a signal processing apparatus including upper, intermediate and lower layer processing sections. The lower layer processing section includes a first storage unit having a first memory capacity of a limited size for transfer data. The intermediate layer processing section includes a second storage unit having a second memory capacity larger than the limited size. The upper layer processing section transmits the transfer data of a size, larger than the first memory capacity and not larger than the second memory capacity, to the intermediate layer processing section. The intermediate layer processing section receives the transfer data, divides the data into plural divided data each having a size not larger than the limited size, and transmits the data to the lower layer processing section. Being untransmitted divided data, the intermediate layer processing section transmits this data to the lower layer processing section without transmitting any response signal.
    Type: Grant
    Filed: December 29, 1999
    Date of Patent: March 23, 2004
    Assignees: Kobe Steel, LTD., Seiko Epson Corporation
    Inventors: Kunihiro Hanaoka, Shoji Akashita, Osamu Tomioka, Mitsukazu Kurose
  • Patent number: 6710839
    Abstract: Even when gate lines are pulled around at both left and right picture frame regions, it is possible to prevent a gate wiring pattern which is constituted of the gate lines and gate-line pull-around lines and a storage wiring pattern which is constituted of storage lines and a common line which connects storage lines each other from getting over each other. The gate lines GL1, GL2 are pulled around by the gate-line pull-around lines GLL1, GLL2 in both left and right picture frame regions. The common lines B2, B3 which connect the storage lines STL each other are formed at both left and right picture frame regions. Further, the gate wiring pattern which is constituted of the gate lines GL1, GL2 and the gate-line pull-around lines GLL1, GLL2 and the storage wiring pattern which is constituted of the storage lines STL and the common lines B2, B3 do not cross each other.
    Type: Grant
    Filed: September 6, 2002
    Date of Patent: March 23, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Hitoshi Komeno, Kouichi Anno
  • Patent number: 6710973
    Abstract: A magnetic head for perpendicular recording without writing from the lateral sides of a main pole and without erasing data on adjacent tracks. A magnetic disk storage apparatus using the magnetic head. The lateral side of the main pole of a magnetic head for perpendicular recording may have an inverted tapered shape obtained by forming a groove as a track portion to an inorganic insulating layer and then forming a magnetic layer and then flattening the upper surface. A leading edge, a trailing edge, or both lateral edges of the magnetic head may be tapered. The taper may be either smooth and linear or curved in profile.
    Type: Grant
    Filed: August 3, 2001
    Date of Patent: March 23, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Tomohiro Okada, Yoshiaki Kawato, Yasutaka Nishida, Yasuo Wakaki, Masafumi Mochizuki, Hisashi Takano
  • Patent number: 6705584
    Abstract: In a liquid crystal display device comprising a first substrate having switching elements formed for respective pixel electrodes thereon and a second substrate having color filters and a common electrode formed on a main surface thereof, the present invention provides a plurality of columnar spacers formed on both areas of the second substrate inside and outside the common electrode, covers a group of the columnar spacers formed on the common electrode with an alignment film, and arranges another group of the columnar spacers formed around the common electrode at both sides of a sealing material sticking the first substrate and the second substrate to one another. According to the present invention, the group of the columnar spacers fixed to the second substrate with the alignment film firmly secures a gap between the first and second substrates in cooperation with the another group of the columnar spacers arranged so as to compensate for deformation of the sealing material.
    Type: Grant
    Filed: June 24, 2002
    Date of Patent: March 16, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Minoru Hiroshima, Tatsuo Hamamoto, Hironobu Yamada
  • Patent number: 6707102
    Abstract: A power MOSFET for a high frequency amplification element having good output power characteristics and high frequency characteristics is described. In the power MOSFET, a shield conductive film electrically connected to via an insulating film is arranged over a drain-offset semiconductor region. A wiring for a drain electrode is so arranged as to extent in parallel to the shield conductive film at one end side of the shield conductive film. On the other hand, a wiring for the gate electrode, a wiring for a source electrode and a gate shunt wiring are arranged in this order to extend in parallel to each other at the other end side of the shield conductive film. The shield conductive film is so formed that the thickness thereof is smaller than that of the wiring for the gate electrode. In this way, the input and output capacitances of the MOSFET can be decreased.
    Type: Grant
    Filed: August 15, 2001
    Date of Patent: March 16, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Masatoshi Morikawa, Mio Shindo, Isao Yoshida, Kenichi Nagura
  • Patent number: 6707751
    Abstract: The present invention provides a novel semiconductor integrated circuit device equipped with memory circuits, high-speed memories and large memory capacity memory circuits, which enables speeding up and facilitation of timing settings.
    Type: Grant
    Filed: January 10, 2003
    Date of Patent: March 16, 2004
    Assignee: Renesas Technology Corporation
    Inventors: Satoshi Iwahashi, Shigeru Nakahara, Takeshi Suzuki, Keiichi Higeta
  • Patent number: 6705730
    Abstract: It is an object of the present invention to implement a display providing high optical efficiency irrespective of the size of a light valve, and capable of enhancing the uniformity of the luminance of an image to be projected. In order to attain the foregoing object, for example, as shown in FIG. 1, a light valve 103 of a projector is located roughly at the focus point of an illumination lens 102. Further, as shown in FIG. 2, a light source 101 is also located roughly at the focus point of the illumination lens 102. Consequently, it is possible to implement a miniaturized projector.
    Type: Grant
    Filed: August 31, 2001
    Date of Patent: March 16, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Tetsuya Ohshima, Hiroki Kaneko, Kazutaka Tsuji, Akira Arimoto, Osamu Ebina, Masahiko Yatsu
  • Patent number: 6708322
    Abstract: A functional block for verifying correct interface operation of any functional block is generated from interface description and installed on a LSI chip. To accomplish this, from the interface description, hardware description of a synthesizable interface checker is generated. Means for selecting interface functions to be checked is provided, thereby making it possible to reduce the overhead of circuits to be installed on the LSI.
    Type: Grant
    Filed: February 27, 2002
    Date of Patent: March 16, 2004
    Assignee: Hitachi, Ltd.
    Inventor: Masaki Ito
  • Patent number: 6700793
    Abstract: Disclosed is a technique capable of improving a power supply efficiency in a power supply circuit. A power MOSFET in a high side of a combined power MOSFET constituting a DC-DC converter is constituted of a horizontal MOSFET, and a power MOSFET in a low side thereof is constituted of a vertical MOSFET.
    Type: Grant
    Filed: January 16, 2002
    Date of Patent: March 2, 2004
    Assignee: Renesas Technology Corporation
    Inventors: Kyouichi Takagawa, Kozo Sakamoto, Nobuyoshi Matsuura, Masashi Koyano
  • Patent number: 6700429
    Abstract: A semiconductor device includes a differential level converter circuit that receives a first signal and outputs a second signal of greater amplitude. The differential level converter has a first MISFET pair for receiving the first signal, a second MISFET pair for enhancing the withstand voltage of the first MISFET pair, and a third MISFET pair with cross-coupled gates for latching the second signal from output. The film thickness of the gate insulating films of the second and third MISFET pairs is made thicker than that of the first MISFET pair, and the threshold voltages of the first and second MISFET pairs are made smaller than that of the third MISFET pair. This level converter circuit operates at high speed even if there is a large difference in the signal amplitude before and after level conversion.
    Type: Grant
    Filed: August 5, 2002
    Date of Patent: March 2, 2004
    Assignee: Renesas Technology Corporation
    Inventors: Yusuke Kanno, Hiroyuki Mizuno, Kazumasa Yanagisawa
  • Patent number: 6697040
    Abstract: In a liquid crystal display comprising a plurality of pixels each of which has an switching element, a plurality of drain drivers and gate drivers for operating the switching elements and the pixels, and a plurality of drain lines and gate lines supplying signals from the drain drivers and the gate drivers to the switching elements being formed on one of a pair of substrates sandwiching a liquid crystal layer, the present invention provides wiring lines formed on the one of a pair of substrates for transferring display data signals and a clock signal between each pair of the plurality of drain drivers adjacent to one another, and provides at least one gate circuit for at least one of the plurality of drain drivers which is controlled by the clock signal and switches the display data signals and the clock signal either (1) to be acquired by the at least one of the plurality of drain drivers or (2) to be transferred to another of the plurality of drain drivers arranged adjacent to the at least one of the plural
    Type: Grant
    Filed: February 13, 2001
    Date of Patent: February 24, 2004
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Yoshihiro Imajo, Tetsuro Izawa, Kimitoshi Ohgiichi, Hiroshi Okawara, Shiro Ueda, Nobuyuki Ishige, Tetsuya Kawamura, Hisashi Ishino, Fumiaki Komori
  • Patent number: 6691921
    Abstract: An object of the present invention is to prevent secret information that is being internally processed from being inferred through operational information of a secured device, including the current consumption information. One solution is provided by an information processing device having at least a key generation apparatus that generates key data automatically, an encryption unit that encrypts data with the corresponding key data, a register that stores a plurality of encrypted data items with the corresponding encryption key data items, and an arithmetic unit that performs operations using data expressed with the corresponding encryption key data and new key data as the input, encrypts the operation result with new input key data, and outputs the result, thereby being capable of performing internal processing on an encrypted data expression. Accordingly, only encrypted data is transferred on the internal or external data bus line.
    Type: Grant
    Filed: August 14, 2002
    Date of Patent: February 17, 2004
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Takashi Endo, Masahiro Kaminaga, Takashi Watanabe, Kunihiko Nakada, Takashi Tsukamoto
  • Patent number: 6690461
    Abstract: A method for displaying microarray information by which unknown but useful information is extracted from a mass amount of sample information obtained with microarrays. Luminescent intensity information of sample spots obtained with the microarrays is standardized for each microarray and displayed as a graph as a difference from the standardized luminescent intensity of a sample spot of interest. Accordingly, information can be compared without being influenced by a difference of experiment status between the microarrays or a difference of physical properties between the samples. A three-dimensional graph is displayed by sorting the set of samples and the set of microarrays to which the sample spots belong, under predetermined conditions, and assigning the set of sorted samples and the set of sorted microarrays to X-axis and Y-axis, and the accumulated luminescence intensity to Z-axis.
    Type: Grant
    Filed: March 27, 2001
    Date of Patent: February 10, 2004
    Assignee: Hitachi Software Engineering Co., Ltd.
    Inventors: Takuro Tamura, Jyunji Yoshii, Katsuya Mizuno
  • Patent number: 6690641
    Abstract: An optical disk that enables high-speed reproduction of address signals. A wobble address system for optical disk supports various types of synchronization, such as phase synchronization, bit synchronization, word synchronization, etc., to be established easily with high detection reliability with the use of an self-orthogonal code. Thus, the invention provides a method for easily synchronizing an address signal, i.e., high-speed reproduction of the address signal. Further, by virtue of an efficient modulation system of the address signal and redundancy thereof, it becomes possible to detect address information with high reliability. This capability is particularly effective in optical recording/reproduction with a blue light source whose signal light quantity and reproduction quality are prone to reduce.
    Type: Grant
    Filed: June 28, 2002
    Date of Patent: February 10, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Harukazu Miyamoto, Takahiro Kurokawa