Abstract: A method of manufacturing a light-emitting device using laser scribing to improve overall light output is disclosed. Upon placing a semiconductor wafer having light emitting diode (“LED”) devices separated by streets on a wafer chuck, the process arranges a first surface of semiconductor wafer containing front sides of the LED devices facing up and a second surface of semiconductor wafer containing back sides of the LED devices facing toward the wafer chuck. After aligning a laser device over the first surface of the semiconductor wafer above a street, the process is configured to focus a high intensity portion of a laser beam generated by the laser device at a location in a substrate closer to the back sides of the LED devices.

Abstract: A network system and method capable of creating separate output queues on demand to improve overall network routing performance are disclosed. The network system, in one embodiment, includes a classifier, an egress queuing device and a processor. The classifier provides a result of classification for an incoming data flow in accordance with a set of predefined application policies. The egress queuing device is an egress per flow queue (“PFQ”) wherein a separately dedicated queue can be dynamically allocated within the egress PFQ in accordance with the result of classification. The processor is configured to establish a temporary circuit connection between the classifier and the egress queuing device for facilitating routing process.

Abstract: A method and apparatus for measuring a distance are disclosed. A measuring device includes a timer, a counter, an optical emitter, an optical receiver, and a distance computing element. In one embodiment, the timer provides a sequence of signals and the counter counts pulses in a loop. The loop includes an electrical path and an optical path. While an optical emitter such as a laser can emit outgoing beams, an optical receiver such as a photodiode receives return beams from the reflective surface. The reflective surface reflects the return beam in accordance with the outgoing beam. The distance computing element measures a distance in response to the outgoing and return beams.

Abstract: A method and apparatus of providing a programmable system using non-volatile programmable transistors are disclosed. A programmable logic circuit, in one embodiment, includes a first programmable transistor and a second programmable transistor. The first programmable transistor includes a first gate terminal, a first source terminal, a first drain terminal, and a first programming terminal. The second programmable transistor includes a second gate terminal, a second source terminal, and a second drain terminal, and a second programmable terminal. The first and second programmable transistors include non-volatile memory elements. The first and the second gate terminals are coupled to an input terminal, and the first drain terminal and the second source terminal are coupled to an output terminal to perform a logic function.

Abstract: A network device having a system performance measurement unit employing one or more global time stamps for measuring the device performance is disclosed. The device includes an ingress circuit, a global time counter, an egress circuit, and a processor. The ingress circuit is configured to receive a packet from an input port while the global time counter generates an arrival time stamp in accordance with the arrival time of the packet. The egress circuit is capable of forwarding the packet to other network devices via an output port. The processor, in one embodiment, is configured to calculate packet latency in response to the arrival time stamp.

Abstract: Impedance matching and trimming apparatuses and methods using programmable resistance devices. According to one exemplary embodiment, the impedance matching circuit includes a programmable resistance element, a comparator, a resistor divider having a common node coupled to a first input of the comparator, and an impedance element control circuit coupled between an output of the comparator and the programmable resistance element. The programmable resistance element includes one or more programmable resistance devices (PRDs). Programmed resistances of the programmable resistance element combine with the resistance of an external reference resistor to provide an impedance matched termination. A change in the resistance of the termination impedance causes a change in the output of the comparator.

Abstract: An apparatus and method for enhancing packet transfer in a network using duplicated copy of data packets are disclosed. Upon classifying a data packet in accordance with a set of predefined packet identifiers, the method for enhancing packet transfer, in one embodiment, generates a replicated packet which is substantially similar to the data packet in response to the result of classification of the data packet. The replicated packet is subsequently forwarded to an application component via a route of non-bearer traffic for facilitating parallel processing.

Abstract: A wireless communication network system includes a central office network, a plurality of cell sites, each for communicating wirelessly with external cellular phones within its transmission range, and a passive optical network (PON)-based wireless backhaul system that transfers communication information between the cell sites and the central office network. The PON-based wireless backhaul system further includes at least a source optical network terminal (ONT), an optical line terminal (OLT), and a quality of service (QoS) converter in each of the source ONT and OLT to allow for quality of service-enabled communication between the cell sites and the central office network via the PON-based wireless backhaul system.

Abstract: Phase change devices, and particularly multi-terminal phase change devices, include first and second active terminals bridged together by a phase-change material whose conductivity can be modified in accordance with a control signal applied to a control electrode. This structure allows an application in which an electrical connection can be created between the two active terminals, with the control of the connection being effected using a separate terminal or terminals. Accordingly, the resistance of the heater element can be increased independently from the resistance of the path between the two active terminals. This allows the use of smaller heater elements thus requiring less current to create the same amount of Joule heating per unit area. The resistance of the heating element does not impact the total resistance of the phase change device.

Abstract: A light emitting diode (“LED”) using an electrical conductive and optical transparent or semi-transparent layer to improve overall light output is disclosed. The device includes a first conductive layer, an active layer, a second conductive layer, an electrical conductive and optical transparent or semi-transparent layer, and electrodes. In one embodiment, the electrical conductive and optical transparent or semi-transparent layer has a first surface and a second surface, wherein the first surface is overlain the second conductive layer. The second surface includes a pattern which contains thick regions and thin regions for facilitating light passage.

Abstract: A network system, having an array of processing engines (“PEs”) and a delay line, improves packet processing performance for time division multiplexing (“TDM”) sequencing of PEs. The system includes an ingress circuit, a delay line, a demultiplexer, a tag memory, and a multiplexer. After the ingress circuit receives a packet from an input port, the delay line stores the packet together with a unique tag value. The delay line, in one embodiment, provides a predefined time delay for the packet. Once the demultiplexer forwards the packet to an array of PEs for packet processing, a tag memory stores the tag value indexed by PE number. The PE number identifies a PE in the array, which was assigned to process the packet. The multiplexer is capable of multiplex packets from PE array and replacing the packet with the processed packet in the delay line in response to the tag value.

Abstract: An apparatus and method for improving network efficiency during an automatic switchover are disclosed. Upon receipt of a switching request from a first network peer (“NP”) transmitted via a connection containing multiple links, a process capable of providing automatic switchover protection (“ASP”), in one embodiment, bring down all or multiple links simultaneously at the second NP in response to the switching request. When the links are ready to be brought up in accordance with APS pending state, the process temporarily suppresses network alarms to avoid higher level entities from entering link reset renegotiations.

Abstract: Phase change devices, and particularly multi-terminal phase change devices, include first and second active terminals bridged together by a phase-change material whose conductivity can be modified in accordance with a control signal applied to a control electrode. This structure allows an application in which an electrical connection can be created between the two active terminals, with the control of the connection being effected using a separate terminal or terminals. Accordingly, the resistance of the heater element can be increased independently from the resistance of the path between the two active terminals. This allows the use of smaller heater elements thus requiring less current to create the same amount of Joule heating per unit area. The resistance of the heating element does not impact the total resistance of the phase change device.

Abstract: A retrofit kit for providing flexible paintball loading mechanism is disclosed. In one embodiment, the retrofit kit includes a right side portion of a receiver, a left side portion of the receiver, and a bottom removable adapter. The right side portion of a receiver having a first feed hatch is able to receive paintballs through an upper loading mechanism. The left side portion of the receiver after coupling with the right side portion of the receiver to form a receiver is capable of coupling to a barrel as well as a pressured gas container. The bottom removable adapter, in one embodiment, facilitates to receive paintballs via a bottom feeding mechanism.

Abstract: An optical device deploring a phosphor layer having a textured surface to improve output of visual light is disclosed. A light emitting device includes a solid state light emitter and a phosphor layer. The solid state light emitter, for example, is configured to convert electrical energy to optical light. The phosphor layer includes a first surface and a second surface, wherein the first surface, for example, is the top surface while the second surface is the bottom surface. The phosphor layer is disposed over the solid state light emitter for generating luminous light in response to the optical light. The first surface of the phosphor layer, in one embodiment, is configured to include a texture, which has similarly shaped uniform configurations, capable of reducing total internal reflection.

Abstract: An apparatus and a method for load balancing across multiple routes using an indirection table and hash function during a process of packet classification are disclosed. A network device such as a router includes a memory, a hash component, and a result memory. The memory is referred to as an indirection random access memory (“RAM”), is capable of storing information regarding number of paths from source devices to destination devices. The memory, in one embodiment, provides a base index value and a range number indicating the number of paths associated with the base index value. The hash component generates a hash index in response to the base index value and the range number. Upon generation of hash index, the result memory identifies a classification result in response to the hash index.

Abstract: A bus scheduling device having a group of direct memory access (“DMA”) engines, a group of target modules (“TM”), a read pending memory, and a bus arbiter is disclosed. A common bus, which is coupled with the DMA engines, TMs, and the read pending memory, is employed in the device for data transmission. DMA engines are capable of transmitting and receiving data to and from TMs via the common bus. The read pending memory is capable of storing information indicating the read status of the DMA engines. The arbiter or bus arbiter arbitrates bus access in response to a bus allocation scheme and the information stored in the read pending memory.

Abstract: An apparatus and method for improving efficiency of data transfer utilizing packet resizing to optimize network management traffic are disclosed. After obtaining a maximum link capacity of a link which is capable of transmitting information, a process of dynamic packet resizing compares the maximum link capacity with a network management system (“NMS”) maximum packet size. The outbound packet size of a network element (“NE”) is set to the maximum link capacity if the maximum link capacity of the link is smaller than the NMS maximum packet size.

Abstract: A process capable of tracking bugs across multiple product releases using multiple scopes is disclosed. Upon receipt of a bug report, a process creates a defect record in a storage memory wherein the record describes the bug in accordance with the bug report. After allocating a first scope associated with a first product release and a second scope associated with a second product release, the process displays the defect record together with the first scope and the second scope on a screen. The first scope allocates a portion of the storage space to track a bug status associated with the first product release and the second scope allocates another portion of the storage space to track the bug status associated with the second product release.

Abstract: A processing system includes a group of processing units (“PUs”) arranged in a daisy chain configuration or a sequence capable of parallel processing. The processing system, in one embodiment, includes PUs, a demultiplexer (“demux”), and a multiplexer (“mux”). The PUs are connected or linked in a sequence or a daisy chain configuration wherein a first PU is located at the beginning of the sequence and a last digital PU is located at the end of the sequence. Each PU is configured to read an input data packet from a packet stream during a designated reading time frame. If the time frame is outside of the designated reading time frame, a PU allows a packet stream to pass through. The demux forwards a packet stream to the first digital processing unit. The mux receives a packet steam from the last digital processing unit.