Patents Represented by Law Firm Katz & Cotton
  • Patent number: 5519331
    Abstract: A "personality" card (bias adapter board) is employed to program power supply connections in a DUT (Device Under Test) fixture in an automated test environment. The DUT fixture is designed to provide access to power supply voltages from the automated test equipment (ATE) and to selected (configurable) pins of the device under test. Specific connections are established between designated power supply pins of the DUT and the ATE via the bias adapter card, thereby eliminating the need for a separate, expensive DUT board for each different DUT.
    Type: Grant
    Filed: November 10, 1994
    Date of Patent: May 21, 1996
    Assignee: LSI Logic Corporation
    Inventors: Lawrence R. Cowart, James E. Spooner
  • Patent number: 5517055
    Abstract: The present invention relates to a method of and system for reducing the drive requirements for the input and output pads of an integrated circuit die. An intermediate structure is added between the output connection pad and substrate to reduce the amount of electron charge required to charge the output pad capacitance to a substantially negligible amount. In addition, an intermediate structure may be added between an input connection pad and substrate to reduce the amount of electron charge required to charge the input pad capacitance to a substantially negligible amount. The present invention connects a transistor amplifier driver to the intermediate structure between the output pad and substrate to charge the capacitance that exists between the intermediate structure and substrate so that the voltage potential of the intermediate structure is substantially the same value as the output pad voltage value.
    Type: Grant
    Filed: October 25, 1993
    Date of Patent: May 14, 1996
    Assignee: LSI Logic Corporation
    Inventor: Nicholas F. Pasch
  • Patent number: 5514150
    Abstract: Various forms of micromachined electrostatic microconveyors and useful devices based thereon are described. In one embodiment, a tube shaped conveyor is formed by disposing conductors circumferentially about the exterior surface of the tube. The tube is formed of an insulating material (e.g., silicon dioxide). Driving voltages are applied in staggered phase to selected ones of the conductors to provide a travelling electrostatic wave within the tube. Charged particles (or fluid or gas) can be propelled through the tube electrostatically by "riding" the travelling wave. Various aspects of the invention are directed to apparatus making use of the microconveyor to convey particles, gas ions, etc.. Apparatus is described for using gas pressure resulting from the transport of gas ions to do mechanical work (i.e., to operate mechanical actuators.
    Type: Grant
    Filed: March 3, 1994
    Date of Patent: May 7, 1996
    Assignee: LSI Logic Corporation
    Inventor: Michael D. Rostoker
  • Patent number: 5504035
    Abstract: A process of interconnecting a semiconductor device to a substrate wherein solder balls on the semiconductor device are fused with one side of an embedded noble metal foil within a through hole in an interposer structure. Solder balls on the substrate are fused with the metal foil within the structure window on the other side of the metal foil.
    Type: Grant
    Filed: August 12, 1993
    Date of Patent: April 2, 1996
    Assignee: LSI Logic Corporation
    Inventors: Michael D. Rostoker, Nicholas F. Pasch
  • Patent number: 5500555
    Abstract: Improved thermal characteristics are obtained in a multi-layer substrate for mounting a semiconductor device. A prepeg layer disposed in close proximity to or immediately adjacent to a semiconductor device is formed incorporating an integral, thermally-conductive mesh or screen. The prepeg layer is preferably a sandwich structure of two BT-resin layers (films), between which is disposed a copper screen. In this manner, heat is conducted away from an operating device by an integral part of the substrate, without the need for additional slugs or heat sink structures. Utility for multichip modules is also disclosed.
    Type: Grant
    Filed: April 11, 1994
    Date of Patent: March 19, 1996
    Assignee: LSI Logic Corporation
    Inventor: Tom Ley