Abstract: There is provided a method and apparatus for use in fabrication of emitter-coupled logic circuits in integrated circuit form in which the base regions for transistor-transistor logic transistors and tub regions for emitter resistors for use in these circuits are fabricated utilizing a compound diffusion process. The use of the compound diffusion process both reduces spiking problems prevalent with emitter resistors while at the same time enabling the appropriate doping concentrations in the bases of both the ECL transistors and the TTL transistors to be established by opening up these regions during specified portions of the fabrication process.

Abstract: This disclosure describes power distribution with the use of semiconductor switches. A digital differential analyzer (DDA) selectively switches integer cycles of a generator into a load demand determined by analog sensing located at the work station associated with the load.

Abstract: A method for manufacturing integrated circuits provides total self-alignment of all critically positioned device regions. Self-alignment is accomplished by a combination of selectively etchable thin layers on the surface of a semiconductor body. An initially formed predetermined pattern of openings defines all active regions of the device. Selective introduction of impurities in sub-sets of this predetermined pattern form regions of a semiconductor device in a totally self-aligned manner while ion implantation through all overlying layers provides for the formation of further shallow device regions irrespective of the predetermined pattern of openings.

Abstract: A circuit for minimizing voltage excursions on the emitter-follower output terminals of an emitter coupled logic (ECL) gate including a compensating circuit connected to collector nodes associated with the input switching transistors and the reference switching transistor. The compensating circuit comprises a single current source for continuously delivering current which is selectively applied in predetermined amounts to one of the collector nodes residing in a high state. This predetermined amount of current compensates for undesired voltage changes experienced at the load impedance connected to that node due to varying ambient temperatures effecting the base-emitter junction of the output emitter follower transistor.

Abstract: An opto-coupler for isolating electrical signals constituted by an electrically responsive radiation source or emitting device, such as a light emitting diode (LED), optically coupling to a radiation sensitive detector for generating an electrical output in response to an electrical signal applied to the radiation source. The detector includes a PN junction positioned within a semiconductor body for generating maximum output current at high switching speeds with attendant minimization of capacitance. Increased values of detector current generation allow economical, reliable, and uncomplicated integrated circuit amplifying means to be responsive to the generated detector output current for generating increased current and voltage output signals, for example, TTL compatible, without speed degradation and readily implementable on a single small semiconductor integrated circuit chip or substrate.

Abstract: A fluid pressure sensor for use internal to the human body including a completely ceramic sectioned outer shell having an opening therein for allowing fluid access to a thin metal diaphragm member. The thin metal diaphragm member is disposed between the sectioned outer shell by diffusion bonding in order to limit exposure of the human tissue solely to the diaphragm member and the ceramic shell. A variable tuned LC circuit is responsive to fluid pressure for establishing a predetermined electrical parameter. The electrical parameter is capable of affecting an electromagnetically responsive electrical circuit means located external to the human body for providing data indicative of the fluid pressure. The thin diaphragm member constitutes one plate of the LC circuit and the remainder of the LC circuit is located beneath the thin diaphragm member so as to be protected from fluid and moisture.

Abstract: This specification discloses a frequency synthesizer or phase-locked loop transceiver operating from a reference oscillator source, F.sub.REF. A single phase-locked loop system for the transceiver includes counter means located in a feedback path connected between a voltage controlled oscillator (VCO) and a digital phase detector. The counter is preset to a predetermined number N for generating a frequency representation ##EQU1## The counter means includes logic and decoding circuitry for automatically modifying the ##EQU2## signal representation by a factor M for generating a feedback signal F.sub.F, where F.sub.F is ##EQU3## The feedback signal representation ##EQU4## is applied to the digital phase detector for generating a transmit or receive signal .sup.F OUT, where .sup.F OUT = .sup.F REF .sup.(N .+-. M).

Abstract: A current mode logic circuit providing AND/OR type functions wherein "0" voltage level changes and spikes are substantially eliminated without sacrificing switching speeds by omitting conventional emitter and collector-dotting between the logic input gates and an emitter-follower output stage. The input gates employ diode loads for generating reduced signal swings for driving the output gate. The output gate contains more devices than a single emitter-follower output stage, but the reduced signal swing and a push-pull drive mode for the output gate offsets any increased switching times due to the greater number of devices and thus achieves the overall objectives without any overall sacrifice in switching speed.