Abstract: A column shorted and full array shorted functional plane for simultaneously transferring, or shorting, data to and from the data exchange subsystems of the array processor. This functional plane nominally includes an array of pseudo-modules that architecturally corresponds to the module arrays of the other functional planes of the array processor. Thus, a pseudo-module is present in each of the elemental processors. These pseudo-modules are associated as columns that are each interconnected by a shorted plane column data exchange subsystem. These columns are, in turn, associated with column control logic circuits that each include a column memory register. A mode decode logic circuit establishes the operating configuration of the column control logic circuits.

Abstract: Associative holography memory apparatus is disclosed which employs a hologram and two phase conjugate mirrors. The mirrors are arranged to form a conjugate resonator whereby the output image from the apparatus tends to converge to that stored image most closely associated with an input image. Alternate embodiments are described which employ a multiple storage and erasure hologram, and which employ only a single phase conjugate mirror.

Abstract: Insulating layers responsible for the trapping of electric charge in non-volatile semiconductor memories, such as FAMOS or MNOS, are fabricated as thicker layers when doped with metals having partially filled d or f electron shells. Typically the insulating layer is silicon oxide doped with up to 10 atomic % of a first transition series metal.

Abstract: A laser apparatus (10) utilizing a master oscillator power amplifier configuration wherein a master oscillator (12) provides a source of low energy, high phase front quality, and high spectral purity radiation, injected into at least one lasing medium gain element (14) disposed along an optical path. Coupling means (16) is positioned to selectively couple a predetermined percentage of the master oscillator (12) radiation into the gain element (14) medium while preventing all but a predetermined percentage of any amplified radiation exiting the gain element (14) from re-entering the master oscillator (12). Phase conjugation means (20) is disposed along the optical path on the opposite side of the gain element (14) as the coupling means (16), for reflecting the phase conjugate of laser radiation incident thereon.

Abstract: A voltage multiplier circuit is disclosed. The circuit comprises three p-channel MOS transistors and three capacitors. When these elements are connected to properly phased transfer and pump clock signals of positive polarity, the circuit generates a negative output voltage which is roughly equal in magnitude to the peak-to-peak voltage of the pump clock. One of the transistors couples the output node to the circuit input node, and is clocked by the transfer clock so as to isolate the input node from the output node when the output node potential is lower than the input node potential. Several of the circuits may be cascaded to produce a large negative supply from a small positive supply. The circuit is advantageously employed to provide the programming signal supply for EEPROM devices.

Abstract: A non-volatile memory device comprising a volatile memory and a non-volatile memory. The volatile memory comprises a volatile memory circuit, such as a D-type cell, or the like, which incorporates a data input, a volatile storage circuit for storing Q and Q output signals, and Q and Q data outputs. The non-volatile memory comprises circuitry which selectively stores a predetermined one of the Q and Q output signals, and which selectively transfers the stored signal to the volatile memory. The non-volatile memory may comprise, for example, a FATMOS transistor, or the like, and control circuitry coupled thereto. The non-volatile memory also includes transistor circuitry coupled between a voltage source and the FATMOS transistor, for example, which selectively controls the storage and transfer of signals between the non-volatile memory circuit and the volatile storage circuit in conjunction with signals applied to the control circuitry.

Abstract: Disclosed are novel opto-isolator devices and processes for fabricating same wherein suitable semiconductive substrates, such as galium arsenide wafers, are treated with conductivity type determining impurities in such a manner as to form radiation emitters, radiation detectors and interconnecting waveguides therein. These operative regions which form a monolithic opto-isolator have the necessary electro-optical characteristics for generating and coupling radiation from the emitter and through the waveguide coupler to the detector; and all of these regions may be integrally fabricated in a monolithic batch fabrication process. Such process may use, for example, particle implantation and masking steps, thereby ensuring high yield and low cost device fabrication.

Abstract: A photolithographic process useful for VLSI fabrication is disclosed for achieving side-wall profile control of poly lines, metal lines, contact and via openings. Layers of a first and second photoresist materials are formed on the poly, metal or oxide-covered substrate. The top layer is patterned by conventional processes to define the final device geometry. The bottom layer is exposed and over-developed to form an overhang structure about the line pattern or the contact/via opening. During the subsequent anisotropic plasma-assisted etching step, some ions or particles are passed obliquely over the overhang and bombard the opening corner, the side-wall and the under-cut area. The plasma-assisted etching step not only forms the poly or metal lines, or the contact or via opening, but also results in an opening with rounded corners and a smoothly tapered side-wall profile. The subsequent metal film deposition step results in a uniform film thickness around the edges of the opening.

Abstract: A packet switching node which processes applied data packets containing routing tag signals indicative of the output port destination to which the data packets are to be applied. The invention comprises an N.times.M switch node that accepts data packets at any of N input ports and routes each to any of M output ports. The output selected is determined by the routing tag signal in the packet. The node comprises a multiport memory having a predetermined number of memory locations available for storage of data packets applied to each of a plurality of input ports. Control logic coupled to the input and output ports and memory is designed so that the data packets are effectively sorted according to their desired output port destination. The control logic comprises arbitration logic which randomly, in a statistical sense, chooses among any data packets that are directed to the same output port.

Abstract: A load balancing circuit arrangement for use with a packet switching node. The packet switching node processes applied data packets containing routing tag signals indicative of the output port destinations to which the data packets are addressed, and routes these packets to the identified output ports. The present invention a load balancing circuit coupled to the packet switching node which monitors the output port addresses of the applied data packets and monitors the number of data packets addressed to each of the output ports. The load balancing circuit is adapted to generate new routing tag signals identifying output port addresses which redistribute the output port load. The load balancing circuit arrangement includes a tag selection circuit coupled to the load balancing circuit and the packet switching node which selectively replaces the routing tag signals of the applied data packets with the new routing tage signals in order to redistribute and balance the output port load.

Abstract: We disclose and claim a process for fabricating wraparound solar cells wherein vertical slots are scribed in a semiconductor wafer to initially define the lateral dimensions of the cell. Thereafter, photolithographic masking, etching and diffusion steps are used to define the geometry of a p-n junction of the cell. Then, using lift-off photolithography and a multiple-element metal deposition process, the solar cell grid lines are formed on one surface of the cell and p- and n-type metal contacts are extended around to the opposite surface of the cell. In this manner, the dimensions of the cell can be made less than the diameter of the semiconductor wafer from which it is made.

Abstract: Inter-layer electrical shorting between layers of conductors of an integrated circuit caused by "hillocks" in the bottom layer is prevented by the use of a double layer photoresist coatings atop the insulating layer that separates the metal layers. The double layer photoresist insures that irregularities in the dielectric layer caused by hillocks in the underlying insulating layer do not cause a break in the photoresist and a subsequent undesired etching of a spurious "via" through the dielectric layer.

Abstract: We disclose and claim a novel high efficiency oscillator circuit and method of operation wherein output signal distortion is minimized by applying the weighted sum of currents flowing in an input complementary transistor pair to each transistor in an output complementary pair. This operation is accomplished using a novel summing current mirror stage to interconnect the input and output complementary pairs, and the channel width-to-length, W/L, ratios of transistors in the mirror stage sets the value of the weighted sum of currents applied to the complementary pair output stage.

Abstract: An emitter-dispenser housing for a controlled porosity dispenser cathode manufactured of a single material as a unitary piece by a chemical vapor deposition process in which a configured mandrel is coated with a layer of material such as tungsten, for example, so that when the mandrel is removed from the coating of material a hollow housing is formed having a side wall and an end wall which define a reservoir. In addition, intersecting strips of this same material as the coating, which had been placed in the mandrel, extend transversely across the reservoir with the edges thereof atomically bonded to the coating during the chemical vapor deposition to form a unitary piece. Thereafter an array of apertures is formed in the end wall of the housing by laser drilling to create an emitter-dispenser.

Abstract: The spatial power combiner disclosed here is used to efficiently combine the power sources, which incorporate two-terminal negative resistance devices, in a coherent manner such that a high power output with a stable and definite frequency and phase is obtained, the sources to be combined being arranged in an array configuration.

Abstract: Apparatus is disclosed which processes sum and difference signals generated from received radar signals to provide target angle information in terms of amplitude or phase. The system includes an IF section and an RF section which processes the sum and difference signals. In the amplitude mode, the sum and difference signals are processed in a conventional manner through a hybrid combiner to an amplitude angle detector which provides the desired target information. A selectively controllable phase shifter is provided as part of the IF section to control the phase of the difference signals provided as output signals therefrom. In the amplitude mode, the phase delay associated with of the signals in the sum and difference channels is matched (zero phase difference between channels) so that amplitude information is processed to generate the target information. In the phase mode, the difference signals are incremented by 90.degree. which generates signals indicative of target phase information.

Abstract: Image processing sections and associated circuitry for generating signals indicative of the centered moments of a sliding submatrix window of signals located within a larger image matrix are disclosed. The processing sections include registers for storing signals indicative of the columnar sums of the signals within an intermediate submatrix of signals and for storing the sum of a subset of the columnar sums that is thereby indicative of the sum of the signals within the sliding submatrix window and, further is equivalent to an uncentered moment of the signals within the sliding submatrix window. The signals stored in the registers are continuously updated as the sliding submatrix window is sequentially moved within the image matrix. The associated circuitry combines the uncentered moment signals to produce centered moment signals.

Abstract: Apparatus is provided which includes a laser oscillator for providing light along a first optical path, and a laser amplifier for amplifying light along a second optical path. Means for coupling light between the first and second optical paths is disposed at one end of the laser amplifier, and a nonlinear medium disposed at the other end thereof for intercepting light provided along the first and second optical paths. The laser oscillator provides a single-mode laser beam along the first optical path which is made incident upon the nonlinear medium from substantially opposite directions. A portion of the beam from the laser oscillator is coupled through the laser amplifier, which forms a probe beam that samples the laser amplifier system. This beam further impinges upon the nonlinear medium and interacts with the counter-propagating laser beams therein.

Abstract: Apparatus is disclosed for digitizing an applied analog signal. A plurality of closely-spaced parallel optical waveguide pairs are disposed in an electro-optic crystal substrate. A laser source applies light energy simultaneously to one waveguide of each waveguide pair. Electrical conductors disposed on the substrate and connected to a source of an analog signal apply signals therefrom across a coupling region of each of the plurality of waveguide pairs so as to induce coupling of the laser energy between one waveguide and the other waveguide of each of the pairs. The coupling regions are of different lengths for each of the waveguide pairs, the lengths of the coupling regions being related in a predetermined manner. The coupling is proportional to the applied analog signal and to the lengths of the coupling regions. A comparator is disposed so as to compare the output of both waveguides of each of the waveguide pairs and provide a digitized signal therefrom.

Abstract: A laser provides light of a first frequency .omega.+.DELTA. along a first optical path, the light being focused by optics onto a target disposed at the primary focal plane of the optics. A laser amplifier is disposed along a second optical path which receives light reflected from the target and processed through a portion of the optics. This amplifier transmits, substantially unamplified, light at the first frequency .omega.+.DELTA. and amplifies light substantially at a second frequency .cndot.. Phase conjugation apparatus is disposed along the second optical path and provides light which is the phase conjugate of light incident thereupon. The phase conjugated light is provided at the second frequency .omega. and directed back through the laser amplifier for amplification thereof and through the optics to the target.