Abstract: Disclosed are embodiments of an electrically conductive fluid interconnect for coupling an integrated circuit (IC) device to a substrate. The IC device may be coupled to the substrate in a socketless manner or using a socket. The electrically conductive fluid interconnect may include, for example, a metal, an electrically conductive paste, or an electrically conductive polymer material. The fluid may be in a liquid or paste state over at least part of an operating temperature range of the IC device, and in other embodiments the fluid may be in the liquid or paste state at room temperature. Other embodiments are described and claimed.

Abstract: Embodiments of a method of attaching an integrated circuit (IC) die to a substrate are disclosed. In one embodiment, at a first temperature, a solder disposed between the IC die and substrate is reflowed. The reflowed solder is allowed to solidify to form electrical connections between the IC die and substrate. At a second temperature less than the first temperature, a liquid curable underfill material is placed in a gap between the IC die and substrate, and this underfill material may be placed in the gap, at least in part, by capillary action. The second temperature is maintained while curing the underfill material, and this second temperature is below a melting temperature of the solidified solder. Other embodiments are described and claimed.

Abstract: Disclosed are embodiments of a multi-chip assembly including optically coupled die. The multi-chip assembly may include two opposing substrates, and a number of die are mounted on each of the substrates. At least one die on one of the substrates is in optical communication with at least one opposing die on the other substrate. Other embodiments are described and claimed.

Abstract: The disclosed embodiments relate to the formation of an electrical contact using a skiving technique. The electrical contact includes a spring structure that has been skived away from an underlying metal body, but the spring remains coupled with the metal body which provides a base for the spring structure. The skived spring portion of the electrical contact may comprise a cantilever-like spring, a coil-like spring, or any other suitable type of spring. Such a spring contact may be used to form an electrical connection between an integrated circuit device and a circuit board (or other substrate). Other embodiments are described and claimed.

Abstract: The disclosed embodiments relate to the formation of an electrical contact using a skiving technique. The electrical contact includes a spring structure that has been skived away from an underlying metal body, but the spring remains coupled with the metal body which provides a base for the spring structure. The skived spring portion of the electrical contact may comprise a cantilever-like spring, a coil-like spring, or any other suitable type of spring. Such a spring contact may be used to form an electrical connection between an integrated circuit device and a circuit board (or other substrate). Other embodiments are described and claimed.

Abstract: Disclosed are embodiments of a multi-chip assembly including optically coupled die. The multi-chip assembly may include two opposing substrates, and a number of die are mounted on each of the substrates. At least one die on one of the substrates is in optical communication with at least one opposing die on the other substrate. Other embodiments are described and claimed.

Abstract: An integrated, on-chip thermal management system providing closed-loop temperature control of an IC device and methods of performing thermal management of an IC device. The thermal management system comprises a temperature detection element, a power modulation element, a control element, and a visibility element. The temperature detection element includes a temperature sensor for detecting die temperature. The power modulation element may reduce the power consumption of an IC device by directly lowering the power consumption of the IC device, by limiting the speed at which the IC device executes instructions, by limiting the number of instructions executed by the IC device, or by a combination of these techniques. The control element allows for control over the behavior of the thermal management system, and the visibility element allows external devices to monitor the status of the thermal management system.

Abstract: A stencil and method for depositing a coupon of underfill material onto a substrate that is to receive an integrated circuit die.

Abstract: A composite carbon nanotube structure including a number of carbon nanotubes disposed in a metal matrix. The composite carbon nanotube structure may be used as a thermal interface device in a packaged integrated circuit device.

Abstract: Disclosed are various embodiments of a method of forming vias for backside connections in a wafer stack, wherein the vias are formed by non-thermal laser ablation. Other embodiments are described an claimed.

Abstract: Embodiments of a composite carbon nanotube structure comprising a number of carbon nanotubes disposed in a matrix comprised of a metal or a metal oxide. The composite carbon nanotube structures may be used as a thermal interface device in a packaged integrated circuit device.

Abstract: A method and apparatus for issuing one or more next-line prefetch requests from a predicted memory address. The first issued next-line prefetch request corresponds to a cache line having a memory address contiguous with the predicted memory address. Any subsequent next-line prefetch request corresponds to a cache line having a memory address contiguous with a memory address associated with a preceding next-line prefetch request.

Abstract: Embodiments of a method of forming a tapered via using a receding mask are disclosed. In one embodiment, an etch mask formed on a substrate includes a first aperture in a first photoresist layer and a second, larger aperture in an overlying second photoresist layer. Peripheries of the first and second apertures may be tapered as a result of an out-of-focus exposure. An etching process may be performed to create a tapered via in the substrate, and during this etching process, the first, relatively thinner photoresist layer will recede outwardly toward the aperture in the second photoresist layer. Other embodiments are described and claimed.

Abstract: A method of forming air gaps surrounding conductors in a dielectric layer, the dielectric layer comprising, for example, part of the interconnect structure of an integrated circuit device. The air gaps are formed, in part, by depositing a sacrificial material within a trench and/or via that have been formed in a dielectric layer, and the sacrificial material is ultimately removed after metal deposition to create the air gaps. A porous dielectric cap may be deposited over the dielectric layer, and the sacrificial material may be removed through this porous dielectric layer. Other embodiments are described and claimed.

Abstract: A method and apparatus for whacking a ?OP based upon the criticality of that ?OP. Also disclosed are embodiments of a method for determining the criticality of a ?OP.

Abstract: Various methods of forming backside connections on a wafer stack are disclosed. To form the backside connections, vias are formed in a first wafer that is to be bonded with a second wafer. The vias used for the backside connections are formed on a side of the first wafer along with an interconnect structure, and the backside connections are formed on an opposing side of the first wafer using these vias.

Abstract: A network driver provides additional transmit commands to a network interface when the number of transmit commands at the network interface falls below a specified threshold.

Abstract: Embodiments of a transition metal alloy having an n-type or p-type work function that does not significantly shift at elevated temperature. The disclosed transition metal alloys may be used as, or form a part of, the gate electrode in a transistor. Methods of forming a gate electrode using these transition metal alloys are also disclosed.

Abstract: A method and apparatus for combining cost effectiveness of data signal ports sharing a common memory storage device with reliable data signal communication of data signal ports each having a dedicated memory storage device. In one embodiment, data signals are received at a number of data signal ports of a data signal communication platform. A data signal bandwidth capability of a memory storage device of the data communication platform is determined. Once the data signal bandwidth capability of the memory storage device is determined, the memory storage device is segmented to improve utilization of the data signal bandwidth capability. As a result, cost effectiveness of data signal ports sharing a common memory storage device and reliability of data signal communication of data signal ports each having a dedicated memory storage device is combined.

Abstract: A method and apparatus for moderating packet ingress interrupts. A network interface includes a packet timer and an absolute timer or absolute counter. The packet timer functions to minimize packet latency during periods of low packet ingress at the network interface. Each of the absolute timer and absolute counter functions to minimize CPU load and packet latency during periods of high packet ingress at the network interface.