Abstract: An integrated, on-chip thermal management system providing closed-loop temperature control of an IC device and methods of performing thermal management of an IC device. The thermal management system comprises a temperature detection element, a power modulation element, a control element, and a visibility element. The temperature detection element includes a temperature sensor for detecting die temperature. The power modulation element may reduce the power consumption of an IC device by directly lowering the power consumption of the IC device, by limiting the speed at which the IC device executes instructions, by limiting the number of instructions executed by the IC device, or by a combination of these techniques. The control element allows for control over the behavior of the thermal management system, and the visibility element allows external devices to monitor the status of the thermal management system.

Abstract: A method and system for automatically associating a signed certificate with its matching certificate signing request. A data structure includes distinguished name data, or other suitable data, for all outstanding certificate signing requests. Distinguished name data, or other suitable data, is extracted or read from the signed certificate and compared against the data structure to identify the matching certificate signing request.

Abstract: A content prefetcher including a virtual address predictor. The virtual address predictor identifies candidate virtual addresses in a cache line without reference to an external address source.

Abstract: A method and device for determining an attribute associated with a locked load instruction and selecting a lock protocol based upon the attribute of the locked load instruction. Also disclosed is a method for concurrently executing the respective lock sequences associated with multiple threads of a processing device.

Abstract: A method of forming channels on a die or other substrate. Also disclosed are liquid cooling systems including such channels.

Abstract: Various methods of forming backside connections on a wafer stack are disclosed. To form the backside connections, vias are formed in a first wafer that is to be bonded with a second wafer. The vias used for the backside connections are formed on a side of the first wafer along with an interconnect structure, and the backside connections are formed on an opposing side of the first wafer using these vias.

Abstract: An intermediate layer referred to as InfiniSock that enables socket-based, legacy applications to access an InfiniBand® fabric, while also enabling new applications designed to take advantage of the InfiniBand® Architecture to function within a socket API environment. The InfiniSock layer supports the traditional AF_INET address family and also includes a novel address family referred to as AF_IB to support the InfiniBand® Architecture.

Abstract: An integrated, on-chip thermal management system providing closed-loop temperature control of an IC device and methods of performing thermal management of an IC device. The thermal management system comprises a temperature detection element, a power modulation element, a control element, and a visibility element. The temperature detection element includes a temperature sensor for detecting die temperature. The power modulation element may reduce the power consumption of an IC device by directly lowering the power consumption of the IC device, by limiting the speed at which the IC device executes instructions, by limiting the number of instructions executed by the IC device, or by a combination of these techniques. The control element allows for control over the behavior of the thermal management system, and the visibility element allows external devices to monitor the status of the thermal management system.

Abstract: A system and method for determining a best match from a plurality of matches received in response to a search input for an associative memory includes a priority field associated with each data item stored in the associative memory. The priority field corresponds to criteria that is used to order the priority of the data items in the associative memory. A match resolution circuit is coupled to receive match signals from an associative memory, such as a CAM, and the priority fields of the matching data items. The match resolution structure compares the priority fields of the matching data items to determine which data item has the highest priority. The match resolution structure indicates the data item with the highest priority in the priority field as the best match of the associative memory for the particular search input.

Abstract: A boundary addressable memory (BAM) array comprises a plurality of BAM word modules, each BAM word module comprises a plurality of BAM cells for performing arithmetic comparisons between input data and an upper bound value and a lower bound value stored in each BAM cell to generate a matching signal indicating whether the input data is not greater than the upper bound value and not less than the lower bound value or whether the input data is not greater than the lower bound value and not less than the upper bound value.

Abstract: The present invention provides application programming interfaces (APIs) which allow a host to control the functioning of a network processor and also perform various network data manipulation functions. The APIs are intended to encapsulate as much as possible the underlying messaging between the host system and the network processor and to hide the low device level command details from the host. The APIs are provided by a program module. A host may invoke an API which is then communicated by the program module to the network processor where functions corresponding to the API are performed. Responses to the APIs may be forwarded back to the host. Asynchronous callback functions, invoked in response to the API calls, may be used to forward responses to the host.