Patents Represented by Attorney Kevin A. Reif
  • Patent number: 8292655
    Abstract: Embodiments of the invention use a small piece of flex or rigid PCB as the cable plug. The wires of the cable are soldered onto the pads on the PCB with the pads so arranged that all the ground pads are tied together without needing a separate grounding bar. The signal and GND pads are so aligned such that minimum strip length is required for soldering and the symmetry of the differential signals is maintained.
    Type: Grant
    Filed: April 1, 2011
    Date of Patent: October 23, 2012
    Assignee: Intel Corporation
    Inventors: Yun Ling, Daniel T. Tong
  • Patent number: 8151450
    Abstract: A land grid array (LGA) socket uses a series of inclined engagement features to transfer a lateral load into a normal load to retain the LGA package in the socket. The number and position of the engagement features along the side of the socket permits a more uniform transfer of load to the solder ball array as compared to current mechanisms.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: April 10, 2012
    Assignee: Intel Corporation
    Inventors: Rick Canham, Tozer Bandorawalla, Alan McAllister, Kelly Eakins
  • Patent number: 8149680
    Abstract: Current probe-type memory architecture assumes that the minimum chunk of data that a probe tip can access is one entire track and perhaps only four out of five-thousand, for example, probes participate in the access thereby degrading performance. By subdividing the track into D finer chunks or data zones, D times more probes can cooperate to read out the data, hence increasing the data throughput by Dx. Each tip now only scans approximately one Dth of the track and hence the scan time is reduced by a factor D, while D probes are being utilized in parallel.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: April 3, 2012
    Assignee: Intel Corporation
    Inventors: Valluri R. Rao, Sanjay Rangan
  • Patent number: 8072016
    Abstract: The fabrication of seek-scan probe (SSP) memory devices involves processing on both-sides of a wafer. However, there are temperature restrictions on the mover circuitry side of the wafer and doping level constrains for either side of wafer. Using a low doped EPI layer on a highly doped substrate solves this issue and provides good STO growth.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: December 6, 2011
    Assignee: Intel Corporation
    Inventors: Ajay Jain, Valluri R. Rao, John Magana
  • Patent number: 8018821
    Abstract: A micro-electro-mechanical system (MEMS) seek-scan probe (SSP) memory device utilizes a protective layer over the delicate media layer to protect the media during harsh processing steps that may otherwise damage the media layer. The protective layer may comprise a layer of germanium and a layer of silicon dioxide.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: September 13, 2011
    Assignee: Intel Corporation
    Inventor: John Heck
  • Patent number: 8000565
    Abstract: A buried dual taper waveguide has a flat surface after taper processing thus facilitating further processing with more complex photonic integrated circuits. This allows for light coupling between a large core size fiber and a small waveguide photonic integrated circuit. The taper structure disclosed enables monolithic integration of silicon photonic components and passive alignment for low-cost packaging.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: August 16, 2011
    Assignee: Intel Corporation
    Inventor: Ansheng Liu
  • Patent number: 7999988
    Abstract: A laser is placed inside the Mach-Zehnder interferometer and the output from opposite ends of the laser are fed directly into the opposite arms of the Mach-Zehnder interferometer. If the output from opposite sides of the laser are equal in amplitude and wavelength, then when the outputs are recombined at the output of the modulator the intensity is dependent on the relative phase of the light in the two arms of the Mach-Zehnder, just as in a normal Mach-Zehnder modulator. Thus by modulating the phase of one or both arms of the modulator, an intensity modulated source is created. This reduces the overall size of the device, and may ensure that all of the output power from the laser is utilized.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: August 16, 2011
    Assignee: Intel Corporation
    Inventor: Brian R. Koch
  • Patent number: 7988459
    Abstract: An apparatus for removably retaining an IC package in engagement with a socket such that the contacts of both the IC package and the socket are properly engaged is disclosed. Specifically, a universal retention mechanism (URM) which may be fabricated in a diecast material, may comprise a retention frame to engage a socket. A load plate hinged to the retention frame may be caused to press the socket and IC package together through force selectively applied through the use of a load lever. In addition, the frame may contain features to attach a thermal solution (e.g. a heat sink or other cooling device) directly to the frame thus eliminating the need to attach it directly to a motherboard or through a backplate.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: August 2, 2011
    Assignee: Intel Corporation
    Inventors: Neal Ulen, David Llapitan
  • Patent number: 7991252
    Abstract: Blind-made optical connectors may not be robust and tend to be very sensitive to dust. Accordingly, a floating barrel blind mate optical connector is described which floats with many degrees of freedom for easy connections and accommodates expanded beam connectors to alleviate many common drawbacks.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: August 2, 2011
    Assignee: Intel Corporation
    Inventors: Hengju Cheng, Jamyuen Ko
  • Patent number: 7970287
    Abstract: A driver circuit is coupled to an optical waveguide transmitter. The driver circuit has a current generator that is in series with the transmitter, and a current robbing circuit is coupled to the transmitter. The current robbing circuit is to divert first and second amounts of current from the transmitter, in accordance with predetermined values of first and second bit streams, respectively, in which data is received to be transmitted. Other embodiments are also described and claimed.
    Type: Grant
    Filed: October 9, 2009
    Date of Patent: June 28, 2011
    Assignee: Intel Corporation
    Inventors: Hengju Cheng, Peter Kirkpatrick
  • Patent number: 7801442
    Abstract: Embodiments introduce redundant optical channels to significantly extend the lifetime of parallel optical transceivers. A plurality of transmitters, N, transmit on a plurality of optical channels, where N is an integer number of optical channels greater than 1. One or more redundant channels, M, are also provided. N+M multiple input shift registers provide multiple paths for signals from each of the transmitters to connect to N+M laser diodes. In the event up to M of the N+M laser diodes fail, the multiple input shift registers connect the N transmitters to functioning ones of the N+M laser diodes thus extending the life of the device. A corresponding scheme is also described for the receiver side.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: September 21, 2010
    Assignee: Intel Corporation
    Inventors: Frank Wang, Darren Crews, Lee Xu, Graham Flower, Miaobin Gao, Chien-Chang Liu, Jesse Chin, Brian Kim, William Wang, Guobin Liu, Xiaojie Xu, Thiri Lwin, Yousheng Wu, Simon Lee, II
  • Patent number: 7767486
    Abstract: An optical connector module complete with optoelectronic devices, supporting integrated circuitry, and connector housing may be fabricated on a wafer level. A plurality of cavities may be formed on the backside of the wafer to accommodate an optoelectronic device. Active circuitry may be formed in a front side of the wafer. Through-vias electrically connect the front side to the back side. The backside of the wafer is overmolded with a polymer layer which when singulated into individual dies forms the plastic housing of an optical connector module.
    Type: Grant
    Filed: November 21, 2007
    Date of Patent: August 3, 2010
    Assignee: Intel Corporation
    Inventors: Mohammed Edris, Daoqiang Lu
  • Patent number: 7755650
    Abstract: A technique includes pulse width modulating an illuminating beam of a light to establish a pixel intensity and modulating the illuminating beam to create different tonal resolution ranges for the pixel intensity.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: July 13, 2010
    Assignee: Intel Corporation
    Inventors: Cynthia S. Bell, Paul Winer, Andrew H. Steinbach
  • Patent number: 7751719
    Abstract: An electrical return to zero (RZ) encoder converts non-return to zero (NRZ) data, into of RZ data patterns with a flexibility for duty cycle adjustment so that any RZ data pattern may be provided for a specific application's need. A duty cycle of>50% or<50% may be achieved by selecting between a clock signal or its complement and adjusting its delay.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: July 6, 2010
    Assignee: Intel Corporation
    Inventors: Li L. Wang, Song Q. Shang
  • Patent number: 7703991
    Abstract: An optical connector comprises a housing having a cavity extending there through to accept a mating connector. The connector comprises no optical components. Dummy solder bonding pads positioned on the connector allow the connector to be automated flip-chip bonded over a substrate waveguide.
    Type: Grant
    Filed: May 6, 2005
    Date of Patent: April 27, 2010
    Assignee: Intel Corporation
    Inventors: Daoqiang Lu, Gilroy J. Vandentop, Henning Braunisch
  • Patent number: 7692757
    Abstract: A liquid crystal over silicon light modulator may include a trenched cover glass. The trenched cover glass enables the provision of regions between adjacent dice on the wafer level. These regions facilitate sealing of the individual modulators and dicing of the individual modulators from the overall wafer. In some embodiments this may reduce contamination of the liquid crystal with the sealing material and losses at the dicing stage.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: April 6, 2010
    Assignee: Intel Corporation
    Inventor: John F. Magana
  • Patent number: 7692501
    Abstract: A stream of data may flow over a fiber or other medium without any accompanying clock signal. The receiving device may then be required to process this data synchronously. Embodiments describe clock and data recovery (CDR) circuits which may sample a data signal at a plurality of sampling points to partition a clock cycle into four phase regions P1, P2, P3, and P4 which may be represented on a phase plane being divided into four quadrants. A relative phase between a data signal transition edge and a clock phase may be represented by a phasor on the phase plane. The clock phase and frequency may be adjusted by determining the instantaneous location of the phasor and the direction of phasor rotation in the phase plane.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: April 6, 2010
    Inventors: Yu-Li Hsueh, Miaobin Gao, Chien-Chang Liu
  • Patent number: 7688450
    Abstract: A thin, deformable member may be fixed at one end, while another portion of the member rests on a hydrogel substance whose thickness changes depending on a characteristic of a liquid that permeates the hydrogel. When the hydrogel changes thickness and causes part of the member to tilt, a reflective surface on the member may reflect light in a different direction. Appropriate sensors may detect the change in the direction of the reflected light, allowing determination of the change in thickness, which in turn permits determination of the relevant characteristic of the liquid.
    Type: Grant
    Filed: May 25, 2007
    Date of Patent: March 30, 2010
    Assignee: Intel Corporation
    Inventor: Ming Lei
  • Patent number: 7660054
    Abstract: Embodiments allow for uniform die cooling or heating with a solid immersion lens equipped microscope over a larger temperature range than is currently attainable using liquid coolant. The SIL tip is insulated from the rest of the objective body to realize a controllable temperature. This thermal control may be done by convection or Joule heating. If the tip is to be cooled, cold gas may be injected through channels around the tip and fins. If the tip is to be heated, hot gas may be injected around the tip and fins 208 or an electrical heater may be thermal anchored to the tip and a current passed through it to deliver power.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: February 9, 2010
    Assignee: Intel Corporation
    Inventors: Cameron Wagner, David Shykind, Travis Eiles
  • Patent number: 7639719
    Abstract: An optimized structure for heat dissipation is provided that may include two types of thermal shunts. The first type of thermal shunt employed involves using p and n metal contact layers to conduct heat away from the active region and into the silicon substrate. The second type of thermal shunt involves etching and backfilling a portion of the silicon wafer with poly-silicon to conduct heat to the silicon substrate.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: December 29, 2009
    Assignee: Intel Corporation
    Inventors: Alexander Fang, Richard Jones, Hyundai Park, Matthew Sysak