Abstract: A non-integer fractional divider divides a reference clock signal having period P by a non-integer ratio K. The divider includes multiplexers to receive a plurality N of clock signals wherein each clock signal is equally phase shifted by a P/N delay. Incrementers coupled to the multiplexers select first and second clock signals between the N clock signals. Such that the phase shift delay between the two selected clock signals is representative of the non-integer value of K. The selected clock signals are combined to output a divided clock signal. The enabling time of each selected clock signal is respectively representative of the duration of the low level and the high level of the divided clock signal.

Abstract: A data buffer memory management method and system is provided for increasing the effectiveness and efficiency of buffer replacement selection. Hierarchical Victim Selection (HVS) identifies hot buffer pages, warm buffer pages and cold buffer pages through weights, reference counts, reassignment of levels and ageing of levels, and then explicitly avoids victimizing hot pages while favoring cold pages in the hierarchy. Unlike LRU, pages in the system are identified by both a static manner (through weights) and in a dynamic manner (through reference counts, reassignment of levels and ageing of levels). HVS provides higher concurrency by allowing pages to be victimized from different levels simultaneously. Unlike other approaches, Hierarchical Victim Selection provides the infrastructure for page cleaners to ensure that the next candidate victims will be clean pages by segregating dirty pages in hierarchical levels having multiple separate lists so that the dirty pages may be cleaned asynchronously.

Abstract: A clock controller and clock generating method are provided for AC self-test timing analysis of a logic system. The controller includes latch circuitry which receives a DC input signal at a data input, and a pair of continuous out-of-phase clock signals at capture and launch clock inputs thereof. The latch circuitry outputs two overlapping pulses responsive to the DC input signal going high. The two overlapping pulses are provided to waveform shaper circuitry which produces therefrom two non-overlapping pulses at clock speed of the logic system to be tested. The two non-overlapping pulses are a single pair of clock pulses which facilitate AC self-test timing analysis of the logic system.

Abstract: Channel-to-channel communications is provided by integrating channel-to-channel functionality into one or more communication channels of a computing environment which may include heterogenous computer systems. The one or more channels having the integrated CTC function are non-dedicated channels also capable of conventional channel functionality. Work units at such channels are forwarded to either the CTC function or the channel function based on work unit type. Further, a facility is provided for. automatically deciding which of the first channel and the second channel is to provide the CTC function for a CTC connection. Partition-to-partition communication can also be accomplished using the integrated CTC function by establishing an internal logical path between a first logical partition and the CTC function and a second logical path between a second logical partition and the CTC function.

Abstract: A facility is provided for distributing events to consumers in a content-based publish-subscribe system, wherein the consumers each have at least one subscription. The facility includes deriving a set of g approximate multicast groups from a larger set of G possible multicast groups in the publish-subscribe system. The deriving includes exploiting knowledge of subscription predicates of the consumers of the publish-subscribe system. The set of G possible multicast groups is collapsed to the smaller set of g approximate multicast groups, while minimizing the expected performance penalty in using the approximate multicast groups. The set of g approximate multicast groups is then used to forward events to consumers within the publish-subscribe system.

Abstract: A technique is provided for programmably controlling output of compressed data from, for example, a video encoder. The technique can be implemented within the video encoder and includes buffering the compressed data in a write buffer, followed by transferring the compressed data from the write buffer to a read buffer. At least one programmable output mode is provided for selectively controlling output of the compressed data from the read buffer. When the read buffer is full, the compressed data is stored to the encoder's external memory to await transfer to the read buffer. The at least one programmable mode can include a slave mode, a gated master mode, a multi-cycle speed mode, and a paced master mode, which may be employed individually or in combination. A mechanism for inserting pad bytes of data into the compressed data is also provided.

Abstract: Resource contention monitoring and analysis are provided for a single system or multi-system environment. Resource contention is tracked at a task level when contention occurs by listing each owner of a resource in a blocker list and each waiter for the resource in a waiter list. Each list is ordered oldest to newest so each instance of contention is added to the end of the respective list. The resource request and contention lists are cross-linked to provide easy coordination between the resource queues and the contention lists. Techniques for analyzing contention using the lists, including deadlock analysis, are described.

Abstract: Techniques are provided for initializing, maintaining, updating and recovering secure operation within an integrated system. The techniques, which employ a data access control function within the integrated system, include authenticating by a current level of software a next level of software within an integrated system. The authenticating occurs before control is passed to the next level of software. Further, an ability of the next level of software to modify an operational characteristic of the integrated system can be selectively limited via the data access control function. Techniques are also provided for initializing secure operation of the integrated system, for migrating data encrypted using a first key set to data encrypted using a second key set, for updating software and keys within the integrated system, and for recovering integrated system functionality following a trigger event.

Abstract: A processing facility is provided for simultaneously receiving multiple streams of digital audio data and based thereon concurrently outputting both an unmixed digital audio signal and a mixed digital audio signal. The processing facility can be implemented, for example, within an audio decoder of a set top box. The facility includes receiving a first stream of digital audio data and a second stream of digital audio data, and outputting the first stream of digital audio data as an unmixed digital audio signal. Simultaneous therewith, the first stream of digital audio data and the second stream of digital audio data are digitally mixed and outputted as a mixed digital audio signal. If necessary, the second stream of digital audio data is redigitized based on a sample frequency of the first stream of digital audio data, and either or both the first stream and second stream of digital audio data are decoded prior to mixing.

Abstract: A cooling system is provided for cooling a heat generating component of an electronic device. The cooling system includes at least two cooling subsystems for a staged reduction of the temperature of a cooling fluid exposed to heat generated by the heat generated component. A first stage cooling subsystem reduces the temperature of the cooling fluid to ambient temperature or above, while a second stage cooling subsystem reduces the temperature of the cooling fluid exiting the first stage cooling subsystem to below ambient temperature. The first stage cooling subsystem is passive while the second stage cooling subsystem is active and can include one or more thermoelectric modules.

Abstract: A unitary support device for a polycapillary optic is provided wherein a housing has a central opening therethrough and at least two locating structures, such as positioning shoulders, formed therein. Each locating structure is sized and positioned to accommodate a different polycapillary positioning component within the housing. Each polycapillary positioning component has at least one opening for holding at least one polycapillary of the polycapillary optic. One or more coaxial bores can define the central opening of the housing and the locating shoulders in one continuous fabrication operation. Depending upon the polycapillary positioning components employed, i.e., location of the openings therein for accommodating the polycapillaries, the positioning components can be oriented within the housing such that radiation from one of a divergent beam, a focused beam, or a parallel beam is collected by the optic, and such that the optic can output one of a collimated beam, a focused beam or a divergent beam.

Abstract: Method, system and program storage device are provided for monitoring and ameliorating congestion in a tightly coupled network. Commensurate with sending a packet into the network, a first time stamp is recorded. Upon receipt of an acknowledgment back across the network responsive to sending of the packet, a second time stamp is recorded. The round trip time of the packet is determined and an amount of congestion is estimated using the determined round trip time and a statically predetermined round trip representative of at least one of no network congestion or a known degree of network congestion. The number of flow control tokens for the destination node can be dynamically varied in response to the estimate of the amount of network congestion. If desired, monitoring and estimating of network congestion can be initiated only after identifying the existence of network congestion, for example, represented by a lack of flow control tokens at a sender node for a destination node.

Abstract: External job scheduling capabilities are provided to a local job control system lacking or having insufficient job scheduling capabilities. This is accomplished by encapsulating running of a user job by the local job control system (LJCS) within running of a marker job at a node management system, which is responsive to an external resource scheduler. The technique includes starting a marker job by the resource scheduler external to the local job control system, wherein the marker job corresponds to a user job to be run by the LJCS; responsive to starting of the marker job, starting the user job by the LJCS; and upon termination of the user job, ending the marker job started by the resource scheduler, wherein starting of the user job by the LJCS is responsive to the resource scheduler's starting of the marker job and wherein ending of the marker job is responsive to termination of the user job.

Abstract: Control systems and methods are provided for controlling optical energy transmitted through a fiber optic. The systems and methods employ a digital controller circuit coupled to at least one sensor for receiving a sensed level stimulus output therefrom, and coupled to a fiber optic power control device for providing a digitized feedback signal thereto. The digital controller circuit, which can operate in one of a plurality of modes and automatically switch between modes, can include one or more of a digital filter, memory for storing control programs and data, an analog-to-digital converter for converting received sensed level stimulus to a digital signal, a digital communication interface, and a processor for software processing of the digital signal. Automatically powering up or resetting the digital power control system is also provided.

Abstract: A facility is provided to allow retrieval of specific parameters by a communications stack (e.g., TCP/IP) of a multi-partitioned processing system from a shared network adapter coupling the processing system to a network. The processing system includes multiple communications stacks, each of which registers internet protocol (IP) addresses with the network adapter in an address resolution table shared by the multiple communications stacks. The facility includes query request and reply commands for selectively retrieving specific data from the shared address resolution table, wherein the specific data can include: local registered IP addresses for a communications stack issuing a query request, network address resolution entries associated with a particular HOME IP address, HOME IP addresses of one or more other communications stacks sharing the network adapter, IP addresses owned by other entities on the network, IP addresses which are in the address cache, as well as other types of data.

Abstract: Apparatus, method and computer program product are provided for performing integrity checking of a relocated executable module loaded within memory by an operating system loader. A repeatable digital signature is generated by determining the load address of the executable module in memory, normalizing at least some content of the executable module in memory employing the load address of the module, and then performing integrity analysis on a digital section of the module's content, including the normalized content, thereby deriving the repeatable digital signature.

Abstract: A cooling system and method of fabrication are provided for cooling a heat-generating electronic element within a portable computer. The cooling system includes a cold plate assembly coupled to a heat-generating electronic element, and a heat exchange assembly disposed within the cover of the portable computer. The heat exchange assembly includes a hollow channel for carrying coolant, as well as a thermally conductive plate and air-cooled fins. The hollow channel is coupled to one main surface of the plate, while the air-cooled fins are coupled to an opposite main surface of the plate. A conduit carries coolant between the cold plate assembly and the hollow channel of the heat exchange assembly, and a circulation pump circulates coolant through the conduit between the cold plate assembly and the heat exchange assembly in a manner to remove heat from the heat-generating electronic component.

Abstract: Storage devices are presented which have some facility of error indication and error correction. The basic idea of the present invention is to double only the storing part inside the storing cell and share the environmental logic. Especially in case of multi-port cells this reduces the area penalty significantly because the read/write control within the cell is shared and only placed once. Writing the cell always writes both latches so that they hold the same data. A soft error can flip only one of the two latches. Then, a ‘XOR’ block detects that the data is no longer identical. While the data is read out the check bit indicates that the data is corrupted. The approach of doubling only the storing elements can be extended to implement a triple storing element (10, 12, 30) in the same cell. Then, with the help of a small and simple error correction logic (32) in the cell from a ‘majority vote’ can be seen which bit value is wrong in case of a soft error affecting one bit in the cell.

Abstract: In a mainframe class data processing system having multiple logical partitions and a port to a network, a host-network interface is established for reducing network overhead at the multiple partitions. The host-network interface includes, for example, a host channel connection coupling the multiple partitions of the host system to a communications adapter having a network device driver for each network coupled to the adapter. The adapter also includes an address resolution protocol (ARP) cache designed to hold predetermined media headers for the clients coupled to the network(s) for use in forwarding an internet protocol (IP) datagram across the network to one of the clients from a partition of the host system. Provision is also made for partition-to-partition communication of IP datagrams by storing IP addresses of the logical partitions as HOME addresses in the ARP cache of the adapter.

Abstract: A technique for transferring data between a first device and a second device using a shared line buffer connected to a system bus which couples the first device and the second device. The technique includes (i) transferring data between the line buffer and dedicated memory associated with the first device, wherein the first device includes a data controller coupled to the system bus through a bus interface. The transferring (i) includes using the data transfer controller to effectuate a multiword data transfer between the dedicated memory and the line buffer. The technique further includes multiword data (ii) transferring between the line buffer and the second device across the system bus. When the transferring (i) precedes the transferring (ii), data is read from the dedicated memory from output to the second device, and when the transferring (ii) precedes the transferring (i), data is written to dedicated memory from the second device.