Abstract: A battery type detector for battery-using and battery-charging equipment is disclosed. Operational characteristics of the using and charging equipment is modified in accordance with the battery type detected.

Abstract: The present patent application includes a discussion of a signal compensation apparatus (119). The apparatus is implemented in a digital radiotelephone (101) having diversity receivers (111, 113). The signal compensation apparatus utilizes three control loops and a branch selection switch circuit to substantially diminish the undesired gain and DC offset present in the selected received data signal. Portions of the apparatus are implemented in a digital signal processor (DSP) (249) for rapid adjustment of the control loops when switching to a different receiver branch.

Abstract: An amplifier which contains two amplifier stages. Each amplifier stage (433,435) utilizes a diode (407) to attenuate the RF input signal (401) and to stabilize the bias current over temperature. The two amplifier stages (433, 435) are cascaded together. The control voltage inputs are serially coupled through a transistor (423). The transistor (423) shifts the voltage of the control signal (425) down, thereby, shifting the control characteristics and AM characteristics of the first amplifier stage (435) relative to the second amplifier stage (433).

Abstract: The present disclosure includes a discussion of a radio receiver. The radio receiver has at least two operational states and includes a variable gain amplifier and at least two adaptive DC offset compensators (421, 427) to suppress undesired DC offset. The first operational state of the radio receiver (121) adjusts the adaptive DC offset compensator circuits (421, 427) to appropriate output levels in absence of an input signal to the radio (121). The second operational state receives the input signal through the radio receiver (121) and eliminates the undesired DC offset (309) from the received input signal with the adaptive DC offset compensator circuits (421, 427) and allows the received input signals to be processed.

Abstract: A radio receiver (107) including at least two amplifier (245, 247, 207) stages each having adjustable gain. The receiver (107) generates a first and a second control signal (267, 229). In absence of receiving an input signal, the receiver (107) adjusts the gain of at least the first of the at least two amplifier stages (207) with said first control signal (229). Upon generation of the second control signal (267) the gain of the first of the at least two amplifiers stages (207) is maintained at a constant level. The gain of a second of the at least two amplifier stages (247) is adjusted with said first control signal (229), producing an output signal (269). A predetermined amplitude of the output signal (269) is maintained while receiving an input signal.

Abstract: A fractional-N type frequency synthesizer (700) for use in a radiotelephone (901). The synthesizer (700) utilizes multiple latched accumulators (401, 403, 405, 407), within an accumulator network, to perform multiple integrals of an input signal (439). The outputs of the accumulators are combined in series to form a data output signal (453). The data output signal (453) is input to a divider network (703) and used as a variable divisor of the frequency input from a variable oscillator (701) into the divider network (703).

Abstract: An amplifier which contains two amplifier stages. Each amplifier stage (433,435) utilizes a diode (407) to attenuate the RF input signal (401) and to stabilize the bias current over temperature. The two amplifier stages (433,435) are cascaded together. The control voltage inputs are serially coupled through a transistor (423). The transistor (423) shifts the voltage of the control signal (425) down, thereby, shifting the control characteristics and AM characteristics of the first amplifier stage (435) relative to the second amplifier stage (433).

Abstract: A keypad apparatus for a radio telephone has the keypad circuit (200) inked onto the lightpipe (105), thereby, allowing freedom in designing the shape of the keypad (103) and reducing the amount of circuitry required on the main circuit board (109) contained within the housing (107) of the radiotelephone.

Abstract: A method of controlling a receiver's on-time (313). The radio receiver (109) receives radio frequency signals (309) of a predetermined duration (305) at an interval having a predetermined time period (301). The method varies the receiver's on-time (415, 417) until the data detector (205) is on the verge of failing to detect all of the data.

Abstract: A method of generating a first signal (115) in a radiotelephone (101) representing the detection of speech on a second signal having background noise, a magnitude, a zero crossing rate and divided in time by frames having a predetermined time period. In absence of speech, the method characterizes the background noise (209) and computes background noise thresholds (211). The method computes an average of the magnitude of the second signal and a zero crossing rate of the second signal for a given frame (215). Then, compares said average of the magnitude (217) and said zero crossing rate (221) of the second signal to said background noise threshold. Upon one of said average of the magnitude and said zero crossing rate consecutively exceeding said background noise thresholds for a first predetermined number of frames, the transceiver(107) is turned on.

Abstract: The present disclosure includes a discussion of a power amplifier controller which powers up a power amplifier (203) without a substantial burst of frequency noise. The controller has a RF output power detector (211) which generates a signal (229) correllated to the power level of the power amplifier (203). This signal (229) is compared (215) to a reference signal (213) to determine if the power amplifier (203) is active. The signal (227) generated by this comparator (215) is used to determine the voltage level of the Automatic Output Control (AOC) signal (231).

Abstract: A voltage controlled oscillator and buffer amplifier circuit (211) is disclosed. The circuit is in a stacked configuration, whereby, the current from the power supply (361) is used by the buffer amplifier circuit and reused by the VCO circuit. The VCO circuit includes two transistors (333, 325). The transistors are set-up in a mirrored configuration, so that one of the transistors (325) controls the bias current in the other transistor (333). Both of the transistors are integrated into a semiconductor circuit die (365), thus, matching the thermal characteristics of the transistors (333, 325) and improving control of the bias current. The die (365) is bonded to a ceramic substrate (601). The substrate (601) has connectivity paths for connecting components in the circuit die to components external to the circuit die. Some of the connectivity paths are made of a material and length to form passive circuit elements.