Patents Represented by Attorney Krishnendu Gupta
  • Patent number: 6398935
    Abstract: There is disclosed an improved method for manufacturing printed circuit boards which solves the problem of immersion bath contaminants being plated-out onto electrically-conductive, circuit functional pads, (board-features) by introducing into the bath system a mechanism for attracting those contaminants to non-functional “micro-thieves” which are electrically-conductive, non-circuit-functional pads having substantially smaller dimensions than those of the smallest board-feature, thereby taking advantage of previously unknown immersion bath uncontrolled strike phenomena, whereby the contaminants are directed to the micro-thieves and away from the board-features. Application of the micro-thieves in the immersion bath environment also produces plated features, of both finer and larger geometries, having flatter surfaces and a more uniform plated thickness for all features on the printed circuit board, than previously obtained.
    Type: Grant
    Filed: March 27, 2000
    Date of Patent: June 4, 2002
    Assignee: EMC Corporation
    Inventor: Stuart Douglas Downes
  • Patent number: 6347335
    Abstract: A distributed computer system includes a plurality of computer nodes, including conventional digital computer systems, mass storage subsystems, servers and the like, and a common event log. The common event log includes a plurality of storage locations for storing common event log entries. Each computer node performs processing operations in connection with a program, and generates, at selected points in its program, an event log entry including status information representing status of the computer node at the point at which the log entry was generated, the computer nodes storing the event log entries which they generate in the common event log contemporaneous with the generation thereof. As a result, the event log entries are stored in the common event log in the order in which the computer nodes reach the points in their respective programs.
    Type: Grant
    Filed: September 22, 1995
    Date of Patent: February 12, 2002
    Assignee: EMC Corporation
    Inventors: Eli Shagam, Natan Vishlitzky, Yuval Ofek
  • Patent number: 6321308
    Abstract: A method of managing a storage system which includes a local and remote systems is provided. Link services between the two subsystems are provided though the use of a task queue. The task queue resides in a global memory of the local storage system and receives requests from the various host controllers, device, and remote controllers connected to the local storage. The remote controllers of the local storage service the requests placed in the task queue to enable data transfer between the local and remote storage systems. The task queue may be a doubly linked list of records including forward and backward pointers in addition to the request data. A two level locking scheme is employed to prevent the addition of incompatible requests to the queue and to enable maximum parallelism in servicing requests in the queue. The first level of locking applies to the entire queue and is used when records are added to and deleted from the queue. The second level of locking applies to the individual queue records.
    Type: Grant
    Filed: March 21, 1997
    Date of Patent: November 20, 2001
    Assignee: EMC Corporation
    Inventors: Dan Arnon, Yuval Ofek
  • Patent number: 6317759
    Abstract: A method and apparatus for providing an HTML applications development environment is disclosed. The applications development environment is used to develop large HTML based applications. The invention includes a preprocessor and associated preprocessor commands which are inserted into a source HTML file. The preprocessor reads the source file, evaluates the preprocessor commands, and makes the appropriate substitutions into an output HTML file.
    Type: Grant
    Filed: December 1, 1997
    Date of Patent: November 13, 2001
    Assignee: EMC Corporation
    Inventor: Roger Osmond
  • Patent number: 6260109
    Abstract: A method and apparatus for providing very large logical volumes (Meta Device) in a storage system is provided. The storage system includes host controllers and disk controllers which communicate through a shared memory. I/O requests are received by the host controller and placed into request queues. The request queues are associated with logical devices. A number of request queues in the host controller are concatenated together to produce the larger logical volume. The large logical volume appears to the host as a single addressable logical unit. I/O requests to the large logical volume are analyzed by the host controller to determine which logical devices are actually needed to service the request. The host controller then makes the appropriate queue entries. Processing of the requests then occurs in the same fashion as if the request had been to a non-Meta Device. This allows the disk controllers and memory to operate without modification.
    Type: Grant
    Filed: January 21, 2000
    Date of Patent: July 10, 2001
    Assignee: EMC Corporation
    Inventors: Erez Ofer, John Fitzgerald, Kenneth Halligan
  • Patent number: 6222277
    Abstract: A semiconductor interconnect structure which includes a semiconductor substrate having a bottom surface. The printed circuit board also has a plurality of solder wettable pads disposed on the top surface of the printed circuit board. The printed circuit board and the semiconductor substrate are both comprised of material taken from the same group of materials. The interconnect structure also includes a plurality of balls formed of a first solder alloy disposed on the bottom surface of the semiconductor substrate and projecting downwardly therefrom. Each one of the plurality of balls are sized to support the weight of the semiconductor substrate. The interconnect structure also includes a plurality of solder joints formed of a second solder alloy connecting the plurality of balls to the corresponding plurality of wettable pads on the printed circuit board.
    Type: Grant
    Filed: June 23, 1999
    Date of Patent: April 24, 2001
    Assignee: EMC Corporation
    Inventor: Stuart Downes
  • Patent number: 6148369
    Abstract: A method and apparatus for providing very large logical volumes (Meta Device) in a storage system is provided. The storage system includes host controllers and disk controllers which communicate through a shared memory. I/O requests are received by the host controller and placed into request queues. The request queues are associated with logical devices. A number of request queues in the host controller are concatenated together to produce the larger logical volume. The large logical volume appears to the host as a single addressable logical unit. I/O requests to the large logical volume are analyzed by the host controller to determine which logical devices are actually needed to service the request. The host controller then makes the appropriate queue entries. Processing of the requests then occurs in the same fashion as if the request had been to a non-Meta Device. This allows the disk controllers and memory to operate without modification.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: November 14, 2000
    Inventors: Erez Ofer, John Fitzgerald, Kenneth Halligan
  • Patent number: 6098149
    Abstract: A method of improving storage system performance is provided. The method includes queuing asynchronous requests for data stored in physically disparate storage locations. The queue is then examined in order find those requests for data which has an acceptable level of physical proximity. Those requests having acceptable physical proximity are then bundled and transmitted as a single request a storage controller which activates the storage device and retrieves the data associated with the requests bundled into the single request.
    Type: Grant
    Filed: June 13, 1997
    Date of Patent: August 1, 2000
    Assignee: EMC Corporation
    Inventors: Erez Ofer, John Fitzgerald
  • Patent number: 6073998
    Abstract: A seat warmer having a self-regulating heating mechanism. The heating mechanism constructed as a sheet comprising layers of a chemical-resistant and moisture-resistant material. Heating elements are enclosed between the layers for heating the sheet to a predetermined temperature.
    Type: Grant
    Filed: October 15, 1996
    Date of Patent: June 13, 2000
    Inventors: Bret Siarkowski, Karl E. Becker, III
  • Patent number: 6047353
    Abstract: A method of providing synchronized operational information for a host computer and an attached storage system is provided. The method includes providing a trace buffer in a memory of the storage system. A special command is created which allows a host computer to write information to the provided trace buffer. The special command uses a command from the communication protocol command set is a specific way in order to effectuate the trace buffer entry. The trace buffer entry will have a time component based on the storage system time clock. Thus, host activity may be synchronized in time with the storage system activity. In addition to the trace buffer, a statistics table is provided which maintains a log of which applications programs running on specific hosts, accessed the devices of the storage system.
    Type: Grant
    Filed: May 7, 1997
    Date of Patent: April 4, 2000
    Assignee: EMC Corporation
    Inventors: Natan Vishlitzky, Erez Ofer, Eli Shagam, David Shadmon
  • Patent number: 6003047
    Abstract: A method and apparatus for managing a network attached storage system is presented which includes a web based user interface. The interface allows for the execution of many different commands on several different storage system attributes without loss of context between command execution. The interface is HTML based and provides dynamic construction of Javascript object lists based on a database read by a CGI program executing on an HTTP server. The interface eliminates the hierarchical structure of menu navigation associated with other interfaces.
    Type: Grant
    Filed: December 30, 1996
    Date of Patent: December 14, 1999
    Assignee: EMC Corporation
    Inventors: Roger F. Osmond, Uday Gupta
  • Patent number: 5956352
    Abstract: An adjustable filter for a computing system having memory error detecting and correcting features selectively masks user-specified errors, thereby preventing storage of such errors in a control and status register (CSR). The invention includes a command and data register 102; a CSR 103; an error detecting and correcting circuit 108, including a check bit generator 108a, an error detecting circuit 108b, and an error correcting circuit 108c; a memory module 114; and filter logic 300. The contents of a filter control register 220 of the CSR 103 operate to specify a particular error which is to be "filtered". The filter logic 300 includes a plurality of logic gates that compare the user-specified signals stored in the register 220 with error-related signals reported by the error detecting circuit 108b. If the signals match, information associated with the detected error is prevented from being stored in the CSR 103.
    Type: Grant
    Filed: September 9, 1996
    Date of Patent: September 21, 1999
    Assignee: Digital Equipment Corporation
    Inventors: David Adrian Tatosian, Donald Wayne Smelser, Paul Marshall Goodwin
  • Patent number: 5835346
    Abstract: A low profile personal computer includes an enclosure having a bottom wall. A riser card including functional circuitry extends vertically from the bottom wall and partitions the enclosure into first and second regions. A motherboard is positioned within the first region of the enclosure along the bottom wall and adjacent to the riser card for interfacing with the riser card. A series of horizontal option card interfaces are located above each other on the riser card within the first region of the enclosure each for interfacing with a corresponding option card and to position the option cards horizontally over the motherboard. The horizontal option card interfaces are capable of interfacing with a maximum of three option cards at the same time. The functional circuitry on the riser card minimizes the number of option cards which enables the overall height of the enclosure to be minimized.
    Type: Grant
    Filed: June 27, 1996
    Date of Patent: November 10, 1998
    Assignee: Digital Equipment Corporation
    Inventors: David Joseph Albani, Robert John McCaffrey, David Wilfred Tardiff, Yun-Long Tun, Daniel C. Tyo
  • Patent number: 5828817
    Abstract: Apparatus and method for recognizing the language type of the page description language (PDL) of a print document that is not dependent on the presence of a `dead-ringer`, standard identifying sequence of characters for language type identification.
    Type: Grant
    Filed: June 29, 1995
    Date of Patent: October 27, 1998
    Assignee: Digital Equipment Corporation
    Inventor: Richard B. Landau
  • Patent number: 5820171
    Abstract: A filler plate for filling an option card slot in a computer enclosure includes a cover plate portion for substantially covering the option card slot. The cover plate portion has a first end and a second end opposite to the first end. A tongue extends from the first end of the cover plate portion for insertion into a capture slot located in the enclosure adjacent to the option card slot to secure the first end of the cover plate portion to the enclosure. First and second retaining tabs extend substantially perpendicularly from the cover plate for engaging first and second edges of the option card slot to hold the filler plate in position relative to the option card slot.
    Type: Grant
    Filed: June 27, 1996
    Date of Patent: October 13, 1998
    Assignee: Digital Equipment Corporation
    Inventors: David Joseph Albani, Robert John McCaffrey, David Wilfred Tardiff, Yun-Long Tun, Alan Michael Vale
  • Patent number: 5813793
    Abstract: A locking mechanism for facilitating connection between a first housing and a second housing. The locking mechanism mounted in the mounting region of the second housing and includes a plunger mounted for movement up to an extended position, a biasing device urging the plunger toward the extended position, a catch spring, and a release button having a ramp, such release button being mounted on the second housing for back and forth movement in a direction transverse to the direction of the plunger and along a path that brings the ramp into contact with the catch spring when the release button is moved forward.
    Type: Grant
    Filed: January 13, 1997
    Date of Patent: September 29, 1998
    Assignee: Digital Equipment Corporation
    Inventor: Allan Scott Baucom
  • Patent number: 5811998
    Abstract: A digital phase lock loop synchronizes a first signal to a second signal having a predefined frequency. The first signal usually has an instantaneous frequency greater than the predefined frequency, so that the first signal is constantly gaining phase with respect to the second signal. The digital phase lock loop performs periodic correction cycles by detecting a predefined phase relationship between the first signal and the second signal, and when the predefined phase relationship is detected, expanding the first signal in phase by a predetermined amount. Preferably, the first signal is generated by clocking a frequency divider with a clocking frequency, and the first signal is expanded in phase by inhibiting the clocking of the frequency divider for one clocking cycle for each correction cycle. Preferably, the predetermined phase relationship is detected when the second signal has a predetermined logic state coincident with clocking by the clocking signal and a predetermined state of the frequency divider.
    Type: Grant
    Filed: November 8, 1995
    Date of Patent: September 22, 1998
    Assignee: Digital Equipment Corporation
    Inventors: James R. Lundberg, Gilbert M. Wolrich
  • Patent number: 5781417
    Abstract: A circuit board retainer for use within an enclosure for guiding and securing a circuit board within the enclosure includes a guide portion having an upper rail and a lower rail extending along an edge of the circuit board retainer forming a slot therebetween for guiding a side of the circuit board. A latching portion positioned adjacent to the guide portion engages an ejector lever pivotably connected to the circuit board. The ejector lever is capable of locking the circuit board in place relative to the circuit board retainer.
    Type: Grant
    Filed: June 27, 1996
    Date of Patent: July 14, 1998
    Assignee: Digital Equipment Corporation
    Inventors: David Joseph Albani, Robert John McCaffrey, David Wilfred Tardiff, Yun-Long Tun
  • Patent number: 5726864
    Abstract: This invention packages option devices, such as floppy drives and hard disk drives, within an enclosure, thereby providing EMI/RFI shielding, promoting unimpeded option device electronic signaling, and reducing wasted space within an enclosure, such that small enclosures may encase the components. This invention includes a cage, for holding option devices, that is groundingly mounted in spaced relation to the major surface of a logic board, and an option device bracket that is slideably mounted within the cage. Each of the option device brackets contains one option device.
    Type: Grant
    Filed: August 24, 1995
    Date of Patent: March 10, 1998
    Assignee: Digital Equipment Corporation
    Inventors: Jeffrey P. Copeland, Dennis Robinson
  • Patent number: D402642
    Type: Grant
    Filed: December 12, 1997
    Date of Patent: December 15, 1998
    Assignee: Digital Equipment Corporation
    Inventors: Robert T. Faranda, Bradford G. Chapin, Allan S. Baucom