Abstract: An integrated circuit (IC) includes a strained-silicon layer formed by deposition of amorphous silicon onto either a region of a semiconductor layer that has been implanted with ions to create a larger spacing between atoms in a crystalline lattice of the semiconductor layer or a silicon-ion layer that has been epitaxially grown on the semiconductor layer to have an increased spacing between atoms in the silicon-ion layer. Alternatively, the IC includes a strained-silicon layer formed by silicon epitaxial growth onto the region of the semiconductor layer that has been implanted with ions. The IC also preferably includes a CMOS device that preferably, but not necessarily, incorporates sub-0.1 micron technology. The implanted ions may preferably be heavy ions, such as germanium ions, antimony ions or others. Ion implantation may be done with a single implantation process, as well as with multiple implantation processes.

Abstract: An integrated circuit (IC) package comprises a package substrate, an IC die mounted on the package substrate, a wire bond electrically connecting the IC die and the package substrate, and a heat spreader mounted on the package substrate. The heat spreader comprises a hole through a portion thereof. The IC die and the wire bond are disposed substantially between the heat spreader and the package substrate.

Abstract: An integrated circuit, or portion thereof, such as a CMOS device, includes an epitaxially grown dielectric on a silicon carbide base. The epitaxially grown dielectric forms a gate dielectric and the silicon carbide base serves as a channel region for the CMOS device. In various embodiments, the epitaxially grown dielectric may be a crystalline carbon or carbon-containing film.

Abstract: An integrated circuit (IC) includes one or more inductors that have magnetic flux lines substantially parallel to a generally horizontal plane of the IC. The inductor is formed in a plurality of conductor layers separated by insulating layers of the IC. Regions of highest magnetic flux density of the inductor may preferably be located near the edge of the IC. Additionally, the inductor may preferably be segmented. The over-all inductance may preferably be controlled by turning on and off selected inductors or inductor segments.

Abstract: An integrated circuit (IC) includes one or more inductors that have magnetic flux lines substantially parallel to a generally horizontal plane of the IC. The inductor is formed in a plurality of conductor layers separated by insulating layers of the IC. Regions of highest magnetic flux density of the inductor may preferably be located near the edge of the IC. Additionally, the inductor may preferably be segmented. The over-all inductance may preferably be controlled by turning on and off selected inductors or inductor segments.

Abstract: An integrated circuit, or portion thereof, such as a CMOS device, includes an epitaxially grown dielectric on a silicon carbide base. The epitaxially grown dielectric forms a gate dielectric and the silicon carbide base serves as a channel region for the CMOS device. In various embodiments, the epitaxially grown dielectric may be a crystalline carbon or carbon-containing film.

Abstract: An integrated circuit (IC) includes a CMOS device formed above a semiconductor substrate having ions therein that are implanted in the semiconductor substrate by an ion recoil procedure. The IC preferably, but not necessarily, incorporates sub-0.1 micron technology in the CMOS device. The implanted ions may preferably be germanium ions. A strained-silicon layer is preferably, but not necessarily, formed above the ion-implanted layer of the semiconductor substrate. The strained-silicon layer may be formed by a silicon epitaxial growth on the ion-implanted layer or by causing the ions to recoil into the semiconductor substrate with such energy that a region of the semiconductor substrate in the vicinity of the surface thereof is left substantially free of the ions, thereby forming a strained-silicon layer in the substantially ion-free region.

Abstract: A wafer edge inspection method and apparatus include a review tool that captures images of the semiconductor wafer. According to various embodiments, the present invention also includes a map of points of interest proximate to the edge of the wafer, automatic image capturing at the points of interest, fake defect locations defining the points of interest, a database in which the images are stored and computer-searchable for detailed defect analysis, a software tool for controlling the method and apparatus and/or context information identifying the points of interest, the inspected wafer and/or the fabrication station/step preceding the inspection.

Abstract: An integrated circuit (IC) includes a CMOS device formed above a semiconductor substrate having ions therein that are implanted in the semiconductor substrate by an ion recoil procedure. The IC preferably, but not necessarily, incorporates sub-0.1 micron technology in the CMOS device. The implanted ions may preferably be germanium ions. A strained-silicon layer is preferably, but not necessarily, formed above the ion-implanted layer of the semiconductor substrate. The strained-silicon layer may be formed by a silicon epitaxial growth on the ion-implanted layer or by causing the ions to recoil into the semiconductor substrate with such energy that a region of the semiconductor substrate in the vicinity of the surface thereof is left substantially free of the ions, thereby forming a strained-silicon layer in the substantially ion-free region.

Abstract: A loop of delayed read commands is established from a larger set of queued commands. Upon recognizing a delay in completing a first read command which is followed by a second read command, the loop is established by setting loop start pointer to identify the first delayed read command and setting a loop end pointer to identify the second read command. Upon recognizing a delay in completing the second read command which is followed by a third read command, the loop end pointer is advanced to identify the third read command. All of the read commands in the loop at and between the loop start pointer and the loop end pointer are completed before attempting to complete other commands in the queue not within the loop.

Abstract: A method and apparatus for testing an integrated circuit (IC) package includes a printed circuit board (PCB) on which is mounted the IC package and which is removably connected (preferably perpendicular) to a motherboard. The IC package, the PCB and the motherboard are subjected to thermal, humidity and/or electrical test conditions.

Abstract: A set of programming macros implement bit-fields in a variable, such as an unsigned integer structure having a bit-field definition number associated with each bit-field. The bit-field definition numbers have a value that defines the associated bit-field in terms of its end bits. In various embodiments, the macros extract the end bits from the value of the structure elements to form mask and shift values with which to manipulate the bit-fields.

Abstract: A pipeline processor having an exception program counter chain generates a return address in the exception program counter chain for an executing instruction. The return address is the point at which instruction execution should resume after an exception handler routine runs if the executing instruction incurs an exception. The return address is stored into a profiling register if and when the corresponding instruction completes execution. The profiling register is periodically sampled and a statistical profile is built of instructions executed in the processor by using the return addresses sampled. A sampled return address is identified as a branch delay instruction and included in the statistical profile if the sampled return address is that of a branch instruction which immediately precedes a branch delay instruction.

Abstract: Multiple processors of a multiprocessor system are placed into a debug mode of operation approximately simultaneously when one processor initially enters the debug mode as a result of incurring a debug event. The other processors enter the debug mode as a result of the one processor asserting a debug event signal upon initially entering the debug mode. A logic circuit associated with each processor responds to any debug event signal asserted by another processor and the failure of its associated processor to assert a debug event signal, to assert an external debug break signal to the associated processor and place the associated processor into the debug mode.

Abstract: A photo-therapy device emits photo-therapeutic radiation to treat. living tissue. The device incorporates an array of emitters, the photo emissions of which is dependent on their temperature. Temperature feedback is provided to a voltage supply that supplies current to the emitters, to regulate the voltage supply level and the temperature of the emitters. Additionally, the wavelength of the radiation is dependent on the temperature of the emitters, so the wavelength is moved closer to an optimum wavelength for absorption by the tissue by controlling the temperature of the emitters. Furthermore, the useful life of the emitters is extended by pulsing the emitters on and off by sequentially applying an activation signal to one group of emitters at a time. Also, the device can operate on a wide range of voltage input levels since it utilizes a switching regulator, which can convert a voltage level in the range to the level required to drive the array of emitters.

Abstract: A scrubber more effectively mixes air or gas with water or a liquid cleaning agent to entrain and thereby clean contaminants from an airflow. An improved baffle-defining structure forces a more complete interaction between the air and water and buffets the mixture into an air/water mixing zone while preventing the water from collecting on an inner surface of the water scrubber and draining down out of the airflow path. A cyclonic, centrifugal dewatering apparatus removes the mist and residual contaminants after the water scrubbing removes most of the contaminants from the air.

Abstract: A gas delivery apparatus used in gas-assisted electrocoagulation temporarily reduces a gas flow rate in a flowpath to an application which applies the flow of gas and electrical energy to the tissue during an arc initiation sequence. The reduced gas flow rate enhances the arc initiation capabilities and reduces the possibilities of embolism. After the arc initiation sequence is complete, the gas flow rate returns to a greater rate used during electrocoagulation. The back pressure in the flowpath and a user requested flow rate are control variables used to reduce the flow rate upon the occurrence of back pressure-related conditions and to increase the flow rate after the dissipation of those back pressure conditions.

Abstract: A method and apparatus for sensing the state of a computer system and changing the state, if necessary, before connecting the computer system to a computer expansion unit. The computer system has an electrical sense pad on which it sets a state signal. This state signal can indicate one of several states of the computer system. When the computer system is placed in the computer expansion unit, the expansion unit detects the state signal from the electrical sense pad and determines the state of the computer therefrom. If the determined state is an acceptable state, then the expansion unit will complete the connection of the computer to itself. If the determined state is an unacceptable state, then the expansion unit will delay completion of the connection and will send a signal back to the computer system telling the computer system to change its state.

Abstract: A connection assembly includes a coaxial cable to microstrip flexible circuit connector and a mating microstrip flex circuit to electronic circuit connector. The coaxial cable to microstrip flex circuit connector comprises a portion which is mechanically attached to the coaxial cable and a portion which is mechanically attached to the microstrip flex circuit. The coaxial cable attachment portion includes a first electrical connector electrically connected to the center conductor and a second electrical connector electrically connected to the shielding conductor of each coaxial cable. The microstrip flex circuit attachment portion includes a third electrical connector electrically connected to each trace and a fourth connector electrically connected to the ground plane conductor. The flex circuit to electrical circuit connector comprises a plurality of unsupported extensions of a trace or the ground plane conductor.