Abstract: Disclosed is a method and resulting product whereby thick film conductors which require a reducing firing atmosphere may be included in circuits with thick film resistors requiring an oxidizing firing atmosphere. In accordance with one embodiment, a fritless paste including copper is deposited onto a substrate in a desired conductor pattern and fired to establish adhesion. The copper oxide in the pattern is then reduced to copper metal at a high temperature. This is followed by oxidation of the copper to produce a copper oxide of lower density than the oxide formed after the initial firing. The resistor material is then deposited and fired in an oxidizing atmosphere. The low density copper oxide may then be reduced at a low temperature so that resistor properties are not adversely affected.

Abstract: Disclosed is a crossover structure and method of fabricating such structure which contributes low capacitance to the circuit performance. The crossover utilizes a dielectric material which includes spheres of an insulating material in order to separate the conductors. In one aspect of the invention, a UV curable epoxy including hollow glass spheres is deposited on the crosspoint areas and the crossover connector deposited thereon. In another aspect of the invention, the crossover is formed with an air gap and the gap is subsequently filled with an encapsulating material including the spheres.

Abstract: Disclosed is a method of isolating portions of integrated circuits which permits closely packed structures. A semiconductor wafer is provided with a substrate of one conductivity type, a first layer of opposite conductivity type and high impurity concentration formed thereon, and a second layer of either conductivity type but lower concentration formed over the first layer. The major surfaces of the semiconductor layers are parallel to the (110) plane. Narrow grooves with sidewalls in the (111) plane are etched into the first layer. A shallow diffusion of impurities of the same conductivity type as the first layer is performed in the sidewalls and bottom of the grooves which permits the first layer to be contacted from the surface of the second layer. The groove is then etched further until it extends into the underlying substrate. Impurities of the same conductivity type as the substrate are diffused into the bottom and sidewalls of the grooves.

Abstract: The timing pattern of incoming pulses is modified by amplifying the pulses, selectively shifting the dc potential of the amplified pulses, and clipping or slicing the amplified pulses at a predetermined potential. The thus clipped or sliced output pulses have a predetermined timing pattern at a predetermined dc level,resulting in a time pattern correction of the incoming pulses.

Abstract: Disclosed is a method and structure for protecting circuit components from the ambient and in particular for protecting the contact metal from the adverse effects of moisture. A first layer of amorphous silicon is deposited over the circuit including the metal contacts. A second layer which may be silicon nitride or silicon dioxide is then deposited over the amorphous silicon. The amorphous silicon layer reduces cracking in the second layer and prevents cracks in the second layer from propagating to the circuit components.

Abstract: Disclosed are dielectrically isolated high voltage planar devices and methods of fabricating such devices. The devices are designed so that the large electric fields at the junction edges are significantly reduced; thereby permitting a closely packed structure. This concept may be achieved by forming narrow grooves at the junctions and filling with a thermally grown oxide. In a preferred embodiment, the surface of the devices lies in the (110) plane so that the walls of the grooves are perpendicular thereto in the (111) plane. Fabrication includes bonding the semiconductor wafer to a substrate with an oxide layer therebetween and forming grooves through the wafer to the oxide layer for isolation from device to device.

Abstract: Disclosed is a crossover structure and method of fabricating such crossovers in microelectronic circuits. The invention utilizes as a separator between the crossover beam and the conductor on the substrate a mixture of at least 50 percent by weight of fine grain SiO.sub.2 and an organic dielectric. For high temperature curing, this dielectric can be a silicone resin. For metallization systems which are sensitive to high temperatures, the dielectric can be a low temperature or ultra-violet curing organic material, such as an epoxy. The crossover processing is simplified by fabricating the beam crossover in direct contact with the insulating layer.

Abstract: A metallization scheme for interconnection of elements in thin film and hybrid circuits is described. A thin layer of titanium is first formed, preferably by evaporation or sputtering, on the surface of the insulating substrate. A thin layer of copper is then formed in the same manner over the titanium layer. This is followed by electroplating of copper to a desired thickness onto selected portions of the Ti-Cu multilayer. Successive layers of nickel and gold are then selectively electroplated onto the plated copper regions. An additional layer of palladium may also be included between the titanium and copper layers for improved adhesion. The Ti-Cu-Ni-Au metallization system has been found unusually compatible with the major processing requirements of thin film circuits, for example, thermocompression bonding, soldering, via-hole coverage and resistor stabilization.

Abstract: Disclosed is a method of removing silicone rubber encapsulating material from micro-electronic circuits. The encapsulant is broken down molecularly and removed by a solution of tetramethyl-ammonium hydroxide which is diluted with an alcohol such as 2-propanol. It was found that this stripping solution causes minimal swelling of the encapsulant and leaves no significant residue which cannot be removed by standard rinsing.

Abstract: Disclosed is a circuit for converting a current input of either polarity to a low voltage output of a single polarity. The circuit includes two pairs of pnp-npn transistors which are coupled to that current flow in one direction will turn on one pair while the other is reverse biased, and the same polarity will appear at the output regardless of the polarity of the input. The low voltage at the output is established by the voltage drop across the transistors of the pair which are conducting. The circuit is particularly suited for converting telephone line current to a voltage output of 1.5 volts or less.

Abstract: Line imaging and area imaging devices are described which employ the concept of storage and transfer of charge carriers in a semiconductor medium by the application of appropriate potentials to electrodes disposed above the medium. The devices are characterized by two arrays of electrodes, one functioning as an optical sensing array and the other as a storage and readout array. Charge carriers are collected in the medium under the metal electrodes of the sensing array in proportion to incident light. This information is rapidly transferred to the storage and readout array by sequentially biasing series of electrodes of the two arrays. The information may then be read out of the array without smearing while the sensing array continues to integrate. The structure includes means for preventing cross-coupling and maintaining transfer efficiency for small area electrodes.

Abstract: Disclosed is a method for encapsulating selected areas of solid state integrated circuits. The areas which are to remain uncoated are covered with a water and/or alcohol soluble polymer of sufficient viscosity to form stable droplets. The encapsulant is then applied, usually by flow coating, and cured. The polymer mask is removed by applying a material such as water or alcohol which does not affect the encapsulant. The method thus allows relatively small areas to be masked without any significant residue left on the circuit.

Abstract: A technique is disclosed for the mechanical removal of elastomeric encapsulants from integrated circuits. The encapsulant to be removed is outlined by cutting, and the outlined area is cooled sufficiently either during or subsequent to cutting such that the encapsulant may be removed by gripping one edge with tweezers and peeling from the circuit.

Abstract: Disclosed is a monolithic oscillator circuit which relies upon the thermal characteristics of the semiconductor chip for oscillation. The circuit includes, in one embodiment, first and second transistors with similar output characteristics coupled to the input of a comparator element, and a third transistor coupled to the output of the comparator. The first and second transistors are unbalanced and the third transistor is placed close to only one of these transistors so that any heat generated will primarily affect the output of only the adjacent transistor. Thus, when a current flows from the comparator through the third transistor, the generated heat will decrease the potential across the first and second transistors until they are balanced, and the current through the comparator will shut off. The current remains off until the transistor cools off and an unbalanced condition is again achieved.

Abstract: Disclosed is a crossover fabrication technique which is compatible with interconnect metallization for thin film and hybrid circuits which comprises a layer of copper. In one embodiment, evaporated layers of Ti and Cu are used as the base layers to build up the crossover spacing layer. A nickel protective layer is formed over the evaporated layers and the interconnect metallization. A copper spacing layer is then formed over the nickel layer by plating. Pillar holes are etched over selected areas of the interconnect metal preferably using an etchant which removes both the copper spacing layer and nickel protective layer, followed by forming the gold crossovers. The remaining copper spacing layer is removed by an etchant which preferentially attacks copper, and the nickel protective layer and copper base layers are preferably removed by a single etchant.

Abstract: Charge transfer devices which permit movement of charge carriers in two noncollinear directions in the surface plane of the device. A network of electrodes in two levels of metallization is combined with an appropriate doping of the storage medium to define the charge transfer paths. The direction of charge transfer is determined by an appropriate pulsing of the network which may take the form of different driving sequences of a number of phases in various embodiments. This concept may be used for both charge coupled and bucket brigade devices.

Abstract: Opto-isolators are disclosed which provide enhanced coupling between the light-emitting element and detector, and a method of manufacture is taught which permits efficient mass production of such devices. Recesses are etched in a silicon body and areas of the proper conductivity type are formed in the side walls to produce diodes, transistors or darlington pairs for light detection. Appropriate insulation and leads are then fabricated in the recesses to make contact to the detectors. In one embodiment, bonding pads are also formed at the bottom of the recesses along with associated conductors. Light emitting elements are then bonded to the pads on one major surface of the elements and wire bonded on the other major surfaces. The recesses are filled with an encapsulating material and the silicon body is etched apart to produce discrete devices.

Abstract: Disclosed is an apparatus for recording optical information by means of laser machining of holes on a recording medium. The optical components include a solid state laser, means for converting the light emanating from the laser into a circular beam, and an optical fiber with a graded index of refraction for focusing the light onto the recording medium. The components are mounted on a support arm which is deflected at a rate sufficient to achieve line scan of the medium, while frame scan is achieved by translating either the support arm or the film in a direction essentially perpendicular to the plane of deflection. Means may also be included for displaying the printed information on a screen.

Abstract: Disclosed is a method of encapsulating integrated circuit chips formed on an insulating substrate which permits complete filling of areas under the chip. The encapsulant employed is a dispersion of a material, such as a silicone elastomer, which cures by reaction with water vapor. Subsequent to application of the encapsulant over and under the chip, the solvent of the dispersion is evaporated during a pre-cure treatment by means of a dry ambient of less than 5% relative humidity which suppresses crosslinking. After essentially all the solvent is thus removed, the encapsulant is cured by exposure to a second ambient of higher relative humidity which enhances crosslinking.

Abstract: A metallization scheme for interconnection of elements in thin film and hybrid circuits is described. A thin layer of titanium is first formed, preferably by evaporation or sputtering, on the surface of the insulating substrate. A thin layer of copper is then formed in the same manner over the titanium layer. This is followed by electroplating of copper to a desired thickness onto selected portions of the Ti-Cu multilayer. Successive layers of nickel and gold are then selectively electroplated onto the plated copper regions. An additional layer of palladium may also be included between the titanium and copper layers for improved adhesion. The Ti-Cu-Ni-Au metallization system has been found unusually compatible with the major processing requirements of thin film circuits, for example, thermocompression bonding, soldering, via-hole coverage and resistor stabilization.