Patents Represented by Attorney Lowe, Hauptman, Ham & Berner, LLP.
  • Patent number: 8254525
    Abstract: The present invention relates to an X-ray scanning system which is used to synchronize the preheating of an X-ray irradiation unit and the initialization of a digital image panel using wireless synchronization signals. The preheating of the X-ray irradiation unit and the initialization of the digital image panel are synchronized with each other using the wireless synchronization signal generated by the user's commands inputted through a hand-held switch unit. This makes it possible to conveniently take an X-ray image of an object.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: August 28, 2012
    Assignee: Poskam Co., Ltd.
    Inventors: Ki-Bong Sung, Jong-Lae Park
  • Patent number: 8253204
    Abstract: A semiconductor device includes: a gate pattern over a substrate; recess patterns provided in the substrate at both sides of the gate pattern, each having a side surface extending below the gate pattern; and a source and a drain filling the recess patterns, and forming a strained channel under the gate pattern.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: August 28, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Young-Ho Lee, Seung-Joon Jeon, Tae-Hang Ahn
  • Patent number: 8253041
    Abstract: An electronic element packaging module including a lead frame, an insulating layer and at least one electronic element is provided. The lead frame is a patterned metal sheet and has a first surface, a second surface opposite thereto and a through trench passing from the first surface to the second surface. A substrate portion and a plurality of lead portions around the substrate portion of the lead frame are defined by the through trench. The second surface of the lead frame is exposed outside the electronic element packaging module. The insulating layer disposed in the through trench has a third surface and a forth surface substantially coplanar with the first and the second surfaces, respectively. The electronic element disposed on the first surface is coupled to the lead frame.
    Type: Grant
    Filed: May 20, 2010
    Date of Patent: August 28, 2012
    Assignee: Cyntec Co., Ltd.
    Inventors: Da-Jung Chen, Chi-Feng Huang, Yi-Tsung Chen, Huei-Ren You, Jeng-Jen Li
  • Patent number: 8251966
    Abstract: Provided is an absorptive article having absorption elements capable of following the body of a user. This absorptive article (1) comprises a generally rectangular base absorption element (2), a top absorption element (3) disposed on one surface of the base absorption element (2) at substantially lateral center of the base absorption element (2) and along the longitudinal direction of the base absorption element (2), and a fixing part (4) for fixing the base absorption element (2) to the top absorption element (3) so that at least one end of the top absorption element (3) in the longitudinal direction thereof is made to be a free end (31). A temporary locking part (5) for restricting the movement of the top absorption element (3) is provided on the top absorption element (3) near a free end part (32) thereof at least before application of the absorptive article to the body of the user.
    Type: Grant
    Filed: July 5, 2007
    Date of Patent: August 28, 2012
    Assignee: Uni-Charm Corporation
    Inventors: Jun Kudo, Akira Hashino
  • Patent number: 8248558
    Abstract: A roll of optical-film laminate that increases accuracy, speed and yield in the production of liquid-crystal display elements. The roll of optical film laminate is for use in an apparatus for continuously producing liquid-crystal display elements. The optical film comprises a polarizing composite film of a laminate having a continuous web of polarizer and a protective film superposed on one side of the continuous polarizer, an adhesive layer disposed on one side of the laminate; and a carrier film superposed on the adhesive layer of the polarizing film in a peelable state. Defective and normal regions in the polarizing film are determined. According to these determined regions, coded information that specifies positions of slit lines to be formed in the optical-film web are recorded on the continuous web.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: August 21, 2012
    Assignee: Nitto Denko Corportation
    Inventors: Kouji Kimura, Takayoshi Yamano, Takuya Nakazono, Kazuo Kitada, Tomokazu Yura, Fumihito Shimanoe, Satoru Koshio
  • Patent number: 8247900
    Abstract: A flip chip semiconductor package is provided. In one embodiment, the flip chip semiconductor package comprises a first substrate having a first surface and a second surface opposite the first surface, a semiconductor chip mounted on the first surface of the first substrate by solder bumps, a thermally-conductive stiffener mounted above the first surface of the first substrate and around the chip to define a cavity region therebetween, one or more molding compound material disposed in the cavity region, and a second substrate mounted to the second surface of the first substrate by solder balls.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: August 21, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Tsorng-Dih Yuan
  • Patent number: 8248105
    Abstract: In some embodiments related to a smart edge detector, the smart edge detector uses a second clock in a receiver domain (e.g., clock CLK_D2) to trigger a first flip-flop having a first clock in a transmitter domain (e.g., clock CLK_D1) as input data for the first flip-flop. The clock CLK_D2 through a delay cell also triggers a second flip-flop having the same clock CLK_D1 as input data for the second flip-flop. Based on the output of the first flip-flop (e.g., output S1) and of the second flip-flop (e.g., output S2), the embodiments determine whether the rising and or falling edge of clock CLK_D2 should be used for triggering in a transmitting and receiving application. The embodiments are applicable in both situations where the rising edge or falling edge of clock CLK_D1 is used as a triggering edge. Other embodiments are also disclosed.
    Type: Grant
    Filed: February 16, 2010
    Date of Patent: August 21, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shu-Chun Yang, Jinn-Yeh Chien
  • Patent number: 8247262
    Abstract: A method for performing a CMOS Image Sensor (CIS) silicide process is provided to reduce pixel contact resistance. In one embodiment, the method comprises forming a Resist Protect Oxide (RPO) layer on the CIS, forming a Contact Etch Stop Layer (CESL), forming an Inter-Layer Dielectric (ILD) layer, performing contact lithography/etching, performing Physical Vapor Deposition (PVD) at a pixel contact hole area, annealing for silicide formation at pixel contact hole area, performing contact filling, and defining the first metal layer. The Resist Protect Oxide (RPO) layer can be formed without using a photo mask of Cell Resist Protect Oxide (CIRPO) photolithography for pixel array and/or without silicide process at pixel array. The method can include implanting N+ or P+ for pixel contact plugs at the pixel contact hole area. The contact filling can comprise depositing contact glue plugs and performing Chemical Mechanical Polishing (CMP).
    Type: Grant
    Filed: May 3, 2010
    Date of Patent: August 21, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Chieh Huang, Chih-Jen Wu, Chen-Ming Huang, Dun-Nian Yaung, An-Chun Tu
  • Patent number: 8247993
    Abstract: An apparatus for driving multi-light emitting devices that drives a multi-channel light emitting unit having a plurality of light emitting channels connected in parallel with each other, each of which has a plurality of light emitting devices connected in series with each other according to an aspect of the invention may include: a DC/DC converter generating a driving voltage; a current control unit having a plurality of current sources connected between cathodes of the plurality of light emitting channels and a ground; a minimum voltage selection unit detecting a minimum detection voltage among the plurality of detected voltages at the cathodes of the plurality of light emitting channels; a first error detection unit detecting an error voltage determined by the difference between the minimum detection voltage and a predetermined first reference voltage; and a feedback coupling unit supplying the input voltage according to the error voltage and the driving voltage.
    Type: Grant
    Filed: September 16, 2009
    Date of Patent: August 21, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jung Chul Gong, Byoung Own Min, Bon Ahm Goo, Sang Cheol Shin
  • Patent number: 8247008
    Abstract: Described are digestive/laxative compositions and methods of manufacture and use of same. In a preferred embodiment, the invention provides for a digestive/laxative composition including actinidin. The actinidin is preferably contributed by inclusion of fruit of genus actinidia, or a product thereof. Preferably, the process for forming the composition includes a method in which the fruit is processed at a temperature below that causing significant degradation of actinidin present, this temperature being preferably in the range of ?40° C. to 40° C. Methods of administration of the composition are also described.
    Type: Grant
    Filed: September 25, 2011
    Date of Patent: August 21, 2012
    Assignee: Vital Food Processors Limited
    Inventor: Bruce William Donaldson
  • Patent number: 8246202
    Abstract: A light emitting diode-based bulb is described. The bulb comprises a base comprising a driver; and a housing releasably coupled with the base. The housing comprises a light emitting diode connected to the driver and a fan connected to the driver.
    Type: Grant
    Filed: February 13, 2009
    Date of Patent: August 21, 2012
    Inventors: Gary K. Mart, Jeffrey Newman
  • Patent number: 8247299
    Abstract: The present invention relates to a flash memory device and a fabrication method thereof. In an embodiment, a flash memory device includes a tunnel insulating film and a floating gate laminated over an active region of a semiconductor substrate, an isolation layer formed in a field region of the semiconductor substrate and projected higher than the floating gate, a dielectric layer formed over the semiconductor substrate including the floating gate and the isolation layer, and a control gate formed on the dielectric layer.
    Type: Grant
    Filed: January 16, 2008
    Date of Patent: August 21, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Phil Soon Jang, Hee Hyun Chang
  • Patent number: 8246459
    Abstract: Disclosed are a method, an apparatus, and a recording medium for a performance game, and more particularly are a method, an apparatus, and a recording medium for providing a performance game for playing indicators in a plurality of areas while a user moves in corresponding areas.
    Type: Grant
    Filed: May 12, 2011
    Date of Patent: August 21, 2012
    Assignee: Neowiz Games Co., Ltd.
    Inventor: Hwi-Man Ryu
  • Patent number: 8245349
    Abstract: It is an object of the present invention to provide effective technique for a higher cleaning effect and higher operability of a cleaning element. According to the representative cleaning element, a distance d1 between adjacent ones of the fusion bonded parts is longer than a length d2 or d3 formed on both of the pair adjacent fusion bonded parts and in the respective longitudinal end regions of the cleaning element.
    Type: Grant
    Filed: September 4, 2007
    Date of Patent: August 21, 2012
    Assignee: Uni-Charm Corporation
    Inventors: Akemi Tsuchiya, Yoshinori Tanaka
  • Patent number: 8241974
    Abstract: A nonvolatile memory device with a blocking layer controlling the transfer of electric charges in a charge storage layer includes the blocking layer having a first blocking layer in contact with the charge storage layer and a second blocking layer over the first blocking layer, wherein the first blocking layer has a greater energy band gap than the second blocking layer and the second blocking layer has a greater permittivity than the first blocking layer.
    Type: Grant
    Filed: June 22, 2011
    Date of Patent: August 14, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Heung-Jae Cho, Moon-Sig Joo, Yong-Soo Kim, Won-Joon Choi
  • Patent number: 8242411
    Abstract: A method for holding together an electrically non-conductive stack of objects, such as a stack of magazines or foil strips includes forming the stack of objects; and applying to one side of the stack a static polarity with a planar, semi-conductive electrode.
    Type: Grant
    Filed: July 7, 2006
    Date of Patent: August 14, 2012
    Assignee: Illinois Tool Works Inc.
    Inventors: Johan Hendrik Vreeman, Gerrit Hendrik Ten Tije
  • Patent number: D665739
    Type: Grant
    Filed: May 31, 2011
    Date of Patent: August 21, 2012
    Assignee: Envision Energy (Denmark) APS
    Inventor: Anders Varming Rebsdorf
  • Patent number: D665929
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: August 21, 2012
    Assignee: LG Innotek Co., Ltd.
    Inventors: Kwang Soo Kim, Bu Kwan Je, Ki Man Park, Young Ho Shin, Ye Seul Yang, Ji Hoo Kim
  • Patent number: D666334
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: August 28, 2012
    Assignee: LG Innotek Co., Ltd.
    Inventors: Kwang Soo Kim, Bu Kwan Je, Ki Man Park, Young Ho Shin, Ye Seul Yang, Ji Hoo Kim
  • Patent number: D666347
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: August 28, 2012
    Assignee: LG Innotek Co., Ltd.
    Inventors: Kwang Soo Kim, Bu Kwan Je, Ki Man Park, Young Ho Shin, Ye Seul Yang, Ji Hoo Kim