Patents Represented by Attorney, Agent or Law Firm Majestic, Parsons, Siebert & Hsue
  • Patent number: 6051387
    Abstract: CLNH5 and CLNH11-specific hybridomas, human monoclonal antibodies and their uses are provided. The antibodies distinguish a human neoplastic cell from a normal cell of the same tissue type. The monoclonal antibodies find use in therapy and diagnosis, both in vitro and in vivo.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: April 18, 2000
    Assignee: The Regents of the University of California
    Inventors: Harold H. Handley, Mark C. Glassy, Hideaki Hagiwara, Yoshihide Hagiwara
  • Patent number: 6051229
    Abstract: CLNH5 and CLNH11 specific hybridomas, human monoclonal antibodies and their uses are provided. The antibodies distinguish a human neoplastic cell from a normal cell of the same tissue type. The monoclonal antibodies find use in therapy and diagnosis, both in vitro and in vivo.
    Type: Grant
    Filed: May 18, 1995
    Date of Patent: April 18, 2000
    Assignee: The Regents of the University of California
    Inventors: Harold H. Handley, Mark C. Glassy, Hideaki Hagiwara, Yoshihide Hagiwara
  • Patent number: 6051693
    Abstract: CLNH11-specific hybridomas, human monoclonal antibodies and their uses are provided. The antibodies distinguish a human neoplastic cell from a normal cell of the same tissue type. The monoclonal antibodies find use in therapy and diagnosis, both in vitro and in vivo.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: April 18, 2000
    Assignee: The Regents of the University of California
    Inventors: Harold H. Handley, Mark C. Glassy, Hideaki Hagiwara, Yoshihide Hagiwara
  • Patent number: 6052074
    Abstract: A multi-channel D/A converter is formed with a plurality of converter units, each having one single input transistor and a plurality of output transistors which together form current mirrors. Mutually corresponding ones of these output transistors of different ones of the converter units, which are switched on and off together, are disposed adjacently and connected together to a trunk power supply line such that the parasitic resistances through the conductive lines connected to the output transistors are alike and the conversion characteristics of the individual converter units also become alike. One common input transistor may be shared by all of the converter units for further improving the conversion characteristic.
    Type: Grant
    Filed: June 22, 1998
    Date of Patent: April 18, 2000
    Assignee: Rohm Co., Ltd.
    Inventor: Jun Iida
  • Patent number: 6049771
    Abstract: An apparatus carries out an adaptive pulse code modulation process on voice data and records them in a solid memory which is detachably attached to the apparatus. The code bit number is switched, depending on the selected recording mode. A filter for suppressing a high-voice region of the frequency band of the voice data is used, and there is provided a selector for applying this filter at the time of voice reproduction selectively either always or according to the code bit number.
    Type: Grant
    Filed: December 5, 1997
    Date of Patent: April 11, 2000
    Assignee: Rohm Co., Ltd.
    Inventor: Isao Yamamoto
  • Patent number: 6049309
    Abstract: In a microstrip patch antenna, multipath signals from below the horizon can be reduced by forming ground elements along the edge of the dielectric substrate. Additionally, by using lugs and capacitive elements in the patch antenna, the bandwidth of the antenna can be expanded while maintaining all other antenna characteristics as good as possible.
    Type: Grant
    Filed: April 7, 1998
    Date of Patent: April 11, 2000
    Assignee: Magellan Corporation
    Inventors: Vladimir G. Timoshin, Alexander M. Soloviev
  • Patent number: 6049899
    Abstract: Soft errors occur during normal use of a solid-state memory such as EEPROM or Flash EEPROM. A soft error results from the programmed threshold voltage of a memory cell being drifted from its originally intended level. The error is initially not readily detected during normal read until the cumulative drift becomes so severe that it develops into a hard error. Data could be lost if enough of these hard errors swamps available error correction codes in the memory. A memory device and techniques therefor are capable of detecting these drifts and substantially maintaining the threshold voltage of each memory cell to its intended level throughout the use of the memory device, thereby resisting the development of soft errors into hard errors.
    Type: Grant
    Filed: July 8, 1998
    Date of Patent: April 11, 2000
    Assignee: Zilog, Inc.
    Inventors: Daniel L. Auclair, Jeffrey Craig, John S. Mangan, Robert D. Norman, Daniel C. Guterman, Sanjay Mehrotra
  • Patent number: 6046014
    Abstract: This invention provides new fluorescent molecules useful for detection of target entities. In particular, it relates to fluorescent adducts comprising an apoprotein and a bilin.
    Type: Grant
    Filed: August 1, 1997
    Date of Patent: April 4, 2000
    Assignee: The Regents of the University of California
    Inventors: John Clark Lagarias, John Thomas Murphy
  • Patent number: 6044615
    Abstract: A packaging machine has a roll supporting device with a support shaft rotatably supporting a film roll which extends in an axial direction, an elongated bag-forming film being wrapped around the film roll, a bag forming device which pulls out the film from the film roll and forms the film into a shape of a bag, a packaging device for filling the bag-shaped film with articles to be packaged and sealing the film to produce a package, a roll displacing mechanism for displacing the roll supporting device in the axial direction, and a roll position controller for controlling the roll displacing mechanism to adjust the position of the roll supporting device. The bag forming device includes a former for bending the film into a tubular form and a former roller for guiding the film to the former.
    Type: Grant
    Filed: June 24, 1999
    Date of Patent: April 4, 2000
    Assignee: Ishida Co., Ltd.
    Inventor: Masao Fukuda
  • Patent number: 6044019
    Abstract: Floating gate memories such as EEPROM and flash EEPROM have the memory state of a memory cell thereof determined by sensing the conduction current of the cell. Inherent noise fluctuations in the conduction current during sensing are canceled out by averaging the sensing over a predetermined period of time. In one embodiment, as an integral part of the averaging process, the averaged conduction current is obtained directly as a digital memory state. Accuracy in sensing is therefore greatly improved by avoiding sensing noise with the current and avoiding having to resolve its memory state in the analog domain by comparison with another noisy reference current. In another embodiment, conventional sensing techniques are improved when sensing is made by comparison with a reference current by means of a symmetric, switched or non-switched capacitor differential amplifier.
    Type: Grant
    Filed: October 23, 1998
    Date of Patent: March 28, 2000
    Assignee: SanDisk Corporation
    Inventors: Raul-Adrian Cernea, Rushyah Tang, Douglas Lee, Chi-Ming Wang, Daniel Guterman
  • Patent number: 6040622
    Abstract: A small package is provided for a flash EEPROM memory. The small package uses terminals which are part of a bottom conductive layer of a circuit board. In this manner, the final package can be quite thin. The circuit board can be connected to the integrated circuits and passive devices and can be encapsulated in plastic or glued to a plastic cover. In this manner, a thin and relatively inexpensive package can be formed. Additionally, the circuit board can have testing connections which can be removed before forming the final package.
    Type: Grant
    Filed: June 11, 1998
    Date of Patent: March 21, 2000
    Assignee: SanDisk Corporation
    Inventor: Robert F. Wallace
  • Patent number: 6040972
    Abstract: A protection device for a communication system is inserted between a circuit side and a subscriber side and includes a protection circuit part and trimmable resistors. The protection circuit part includes a tip line and a ring line each extending between an input terminal and an output terminal. The tip line and the ring line each contain at least one thermistor with positive temperature characteristic or one protection resistor as overcurrent-protecting element. The output terminals of the tip line and the ring lines are connected, say, by a diode bridge of which one terminal is grounded and another terminal connected to a power source. Trimmable resistors are each connected to a corresponding one of the output terminals of the protection circuit part and are adapted to be trimmed such that impedance imbalance between the tip and ring lines can be reduced.
    Type: Grant
    Filed: October 10, 1997
    Date of Patent: March 21, 2000
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Haruyuki Takeuchi
  • Patent number: 6041409
    Abstract: Various aspects of data security such as validation, authentication and encryption are accomplished by the combinations of encoding and decoding employing a mapping or inverse mapping controllable by a key k, between a source document x and a transformed document y or a highly compressed transformed document v. In the preferred embodiment, a single mapping module is the basis for an expedient and economic implementation of a unified and comprehensive data security system.
    Type: Grant
    Filed: April 14, 1998
    Date of Patent: March 21, 2000
    Inventor: Liu Zunquan
  • Patent number: 6040755
    Abstract: A chip thermistor is produced by providing a planar rectangular thermistor block with a pair of electrodes formed on its surfaces, each of the electrode being formed so as to be in part on a different one of the main surfaces and extending continuously at least onto one of the side surfaces. The thermistor block thus prepared is cut transversely to obtain a plurality of thermistor elements. A specified number of these thermistor elements are then aligned and stacked one on top of another with their main surfaces facing each other. A layer of an insulating material such as glass with thickness greater than 10 .mu.m is inserted between each mutually adjacently stacked pair of these thermistor elements. Outer electrodes are formed on the outer surfaces of the stacked structure so as to electrically connect to the electrodes on the stacked thermistor elements on their aligned end surfaces.
    Type: Grant
    Filed: June 8, 1999
    Date of Patent: March 21, 2000
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yoshiaki Abe, Toshiharu Hirota
  • Patent number: 6040063
    Abstract: Articles are provided in which a self-supporting structure formed of natural polymer has a self-adherent, moisture resistant hydroxy-functional polyester on the structure surface. The self-supporting structure preferably is a starch and polyvinyl alcohol blend in an expanded form. The articles typically do not delaminate even when soaked in water, and are biodegradable.
    Type: Grant
    Filed: January 15, 1999
    Date of Patent: March 21, 2000
    Assignees: The United States of America as represented by the Secretary of Agriculture, Biotechnology Research & Development Corp.
    Inventors: William M. Doane, John W. Lawton, Jr., Randal Shogren
  • Patent number: 6037716
    Abstract: A degaussing circuit is formed as a series connection of a PTC element and a degaussing coil operated such that the operating frequency of the current therethrough is higher than the frequency of the power source line for the device such as a color television set in which this degaussing circuit is incorporated. This frequency conversion may be effected by a circuit which also functions to convert the alternating current from the power source line into a direct current. The degaussing circuit may further include a relay circuit for switching on and off the current through the PTC element and the degaussing coil.
    Type: Grant
    Filed: November 9, 1998
    Date of Patent: March 14, 2000
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Takashi Shikama, Yuichi Takaoka
  • Patent number: 6037649
    Abstract: A three-dimension inductor structure formed in a conventional integrated circuit technology has a direction of magnetic field perpendicular to the normal direction of the substrate of an applied integrated circuit. Due to the direction of the magnetic field, the electromagnetic interference induced by the three-dimension inductor structure affects other components in the same integrated circuit slightly. The three-dimension inductor structure includes an N-turn coil. Each turn coil in the N-turn coil includes a first-level metal line, a second-level metal line and third-level metal line. The three levels of metal lines are separated from one another by isolating layers. Two nearby levels of metal lines are connected through via plugs in the isolating layers between them. The integral coil is accomplished by connecting the second-level metal line of the Nth turn coil to the third-level metal line of the (N+1)th turn coil.
    Type: Grant
    Filed: April 1, 1999
    Date of Patent: March 14, 2000
    Assignee: Winbond Electronics Corp.
    Inventor: Ping Liou
  • Patent number: 6035763
    Abstract: An improved breadmaker capable of maintaining the freshness of the bread baked for a period of time. A temperature sensor and a humidity level sensor located inside the baking chamber of the breadmaker monitor the ambient conditions inside the baking chamber. In response to these sensors, a surface heater and humidifier are employed to maintain a predetermined temperature and humidity level inside the baking chamber.
    Type: Grant
    Filed: April 16, 1998
    Date of Patent: March 14, 2000
    Inventor: Simon K. C. Yung
  • Patent number: 6037137
    Abstract: The present invention provides for novel reagents whose fluorescence increases in the presence of particular proteases. The reagents comprise a characteristically folded peptide backbone each end of which is conjugated to a fluorophore. When the folded peptide is cleaved, as by digestion with a protease, the fluorophores provide a high intensity fluorescent signal at a visible wavelength. Because of their high fluorescence signal in the visible wavelengths, these protease indicators are particularly well suited for detection of protease activity in biological samples, in particular in frozen tissue sections. Thus this invention also provides for methods of detecting protease activity in situ in frozen sections.
    Type: Grant
    Filed: February 20, 1997
    Date of Patent: March 14, 2000
    Assignee: Oncoimmunin, Inc.
    Inventors: Akira Komoriya, Beverly S. Packard
  • Patent number: 6034569
    Abstract: The DC level of the output of an amplifier may be dynamically adjusted depending on the operating conditions of the amplifier by comparing the output of the amplifier to a set reference value using a comparator. The output of the comparator is then fed to a state machine which adjusts the DC level of the amplifier output in an autocalibration process until the DC level of the output of the amplifier is substantially equal to the reference value. An undervoltage lockout circuit detects a power supply to the amplifier and causes the calibration to be initiated only when the power supply meets certain requirements. A change in the gain setting in the amplifier is also detected for automatically initiating the calibration process.
    Type: Grant
    Filed: June 11, 1998
    Date of Patent: March 7, 2000
    Assignee: Capella Microsystems, Inc.
    Inventors: Ing-Jye Lan, Brian N. Kuo