Abstract: A programmable element sequence selection circuit which selects a repeatable sequence of elements from a plurality of elements is provided. The sequence selection circuit includes a sequence storage circuit into which a sequence of element identifiers is loaded and accessed.

Abstract: A three terminal control circuit for a low dropout voltage regulator having a PNP pass transistor is provided. The control circuit is capable of pulling the base drive point down to a voltage of 3.0 volts or less to permit a current limiting resistor to be inserted between the base drive point and the base of the PNP pass transistor. The control circuit includes a pair of small-valued capacitors for providing stable operation with different output capacitors. The control circuit can also be used with p-channel FET pass transistors.

Abstract: A method and apparatus for identifying each of the members of a set of physical mass storage devices acting as one logical mass storage device are provided. Each physical mass storage device is assigned a membership signature identifying it as a valid member of the set. Whenever a member of a set undergoes a change in membership status, the membership signatures of all other devices in the set are changed, so that the member with the changed membership state no longer has a valid signature. When the member is reinstalled, it can be given a new valid signature after it is updated or regenerated.

Abstract: A method and apparatus for transferring data from one device interface to another device interface via elements of a staging memory and a direct memory access (DMA) channel.

Abstract: Control circuits for a switching voltage regulator circuit which uses magnetic flux sensing are provided. These circuits can be used to improve output voltage regulation by reducing parasitic effects inherently present in magnetic flux-sensed feedback switching voltage regulator designs.

Abstract: A Schottky diode is presented which has reduced minority carrier injection and reduced diffusion of the metallization into the semiconductor. These improvements are obtained by interposing a layer comprising a mixture of silicon and chromium between the anode metallization layer and the semiconductor in a Schottky diode. The layer including chromium acts an effective barrier against the diffusion of the metallization layer into the semiconductor, and at the same time reduces the amount of minority carrier injection into the substrate. The layer including chromium requires no addition photolithograpic masks because it can be plasma etched using the metallization layer as a mask after that layer has been patterned.

Abstract: A three terminal control circuit for a low dropout voltage regulator having a PNP pass transistor is provided. The control circuit is capable of pulling the base drive point down to a voltage of 3.0 volts or less to permit a current limiting resistor to be inserted between the base drive point and the base of the PNP pass transistor. The control circuit includes a pair of small-valued capacitors for providing stable operation with different output capacitors. The control circuit can also be used with p-channel FET pass transistors.

Abstract: A Schottky diode is presented which has reduced minority carrier injection and reduced diffusion of the metallization into the semiconductor. These improvements are obtained by interposing a layer comprising a mixture of silicon and chromium between the anode metallization layer and the semiconductor in a Schottky diode. The layer including chromium acts an effective barrier against the diffusion of the metallization layer into the semiconductor, and at the same time reduces the amount of minority carrier injection into the substrate. The layer including chromium requires no addition photolithograpic masks because it can be plasma etched using the metallization layer as a mask after that layer has been patterned.

Abstract: Methods and apparatus are provided for detecting and correcting various data errors that may arise in a mass data storage apparatus comprising a set of physical mass storage devices operating as one or more larger logical mass storage devices. A method and apparatus is provided for detecting and reconstructing incorrectly routed data. A method and apparatus is also provided for detecting when one or more physical devices fails to write a block of data, and for reconstructing lost data.

Abstract: An improved interface system based in part on the SCSI standard is provided. A single cable data bus simultaneously transfers several bytes of information between two devices. The interface system transfers multiple-byte commands, messages, status information or data in a single parallel transfer. A microsequencer is provided to permit data transfers across the interface without requiring burdensome attention from a processor in a device involved in the transfer.

Abstract: A method and apparatus are provided for detecting and correcting various data errors that may arise in a mass data storage apparatus comprising a set of physical mass storage devices operating as one or more larger logical mass storage devices. More particularly, there is provided a method and apparatus for determining, on restoration of power to a device set, whether or not a write operation was interrupted when power was removed, and for reconstructing any data that may be inconsistent because of the removal of power.

Abstract: A differential input amplifier stage having improved frequency compensation. Frequency compensation is achieved by cancelling one-half of the signal output of a differential error amplifier in the input stage, such that all error signals must pass through a "current-mirror" type load circuit in which a resistor-capacitor network is provided to roll off gain of the input stage.

Abstract: A scheduling mechanism is provided for controlling when the arbitration circuit of a node sharing a CSMA communication medium is to start CSMA arbitration for access to the communication medium once the node has a message ready for transmission, the scheduling mechanism delaying the arbitration circuit from seeking access if total transmission activity on the communication medium exceeds a total use threshold value and transmission activity of the node exceeds a local use threshold value, and otherwise permitting the arbitration circuit to seek access to the communication medium by arbitration in accordance with a priority value assigned to the node.

Abstract: A mass storage apparatus, made up of a plurality of physical storage devices, which is capable of providing both high bandwidth and high operation rate, as necessary, along with high reliability, is provided. The device set is divided into one or more redundancy groups. Each redundancy group is in turn divided into one or more data groups, each of which may span only a small number of the drives in the redundancy group, providing a high request rate, or which may span a large number of drives, providing high bandwidth.

Abstract: A reference voltage generator is presented for use in a differential amplifier. The reference voltage provided by the generator tracks the non-signal dc conditions of a differential input stage and provides a reference voltage to a level-shifting stage so that feedforward compensation can be used to provide extended bandwidth without settling time problems.

Abstract: A new level shifting circuit is presented which does not restrict the upper limit of the common-mode input range of an operational amplifier. This is important particularly in operational amplifiers designated to operate with low power supply voltages. Significant parameters. of the operational amplifier, such as the gain and the slew rate, can be controlled without adversely affecting the common-mode input voltage range. The level shifting stage operates nondifferentially to avoid stability problems found in differential stages. A further improvement is accomplished using current balancing to achieve gain enhancement.

Abstract: A programmable element sequence selection circuit which selects a repeatable sequence of elements from a plurality of elements is provided. The sequence selection circuit includes a sequence storage circuit into which a sequence of element identifiers is loaded and accessed.

Abstract: An integrated circuit is provided which uses a single drive signal for turning a PNP switching transistor "on" and "off." An NPN transistor provides reverse drive current to the PNP transistor's base. When the drive signal is present, the PNP switching transistor is turned "on" and is driven into saturation. The drive signal during this period also charges an integrated capacitor coupled to the base of the NPN transistor. The drive signal then is removed to turn the PNP transistor "off." Removal of the drive signal also causes the voltage developed across the capacitor to drive the base of the NPN transistor. This, in turn, causes the NPN transistor to drive the base of the PNP transistor with a reverse drive current, thus speeding up the switching of the PNP transistor from the conducting state to the non-conducting state.

Abstract: An analog multiplier feedforward technique for use in the feedback loop of a switching regulator circuit is provided. The analog multiplier eliminates the necessity for the output of the error amplifier to the regulator circuit to change voltage when regulator input voltage changes, and makes "loop" gain independent of input voltage.

Abstract: The present disclosure is of a novel circuit for controlling the impedance of an integrated circuit node during power-off and transient power conditions. The circuit includes a PNP transistor having an emitter-collector circuit connected between the circuit node and a ground node. The base of the transistor is connected to the ground node by a resistance, which holds the voltage at the base of the PNP transistor near ground potential when a signal is applied to the circuit node. The resistance can be implemented with a pinch resistor or as a FET transistor. The emitter of the PNP transistor clamps the voltage at the node to a value equal to the voltage drop across the resistor plus the forward voltage drop across the emitter-base circuit of the PNP transistor, the sum of which is less than the minimally necessary base-emitter turn-on voltage of a Darlington-connected NPN transistor pair.