Patents Represented by Attorney, Agent or Law Firm Mark F. Chadurjian, Esq.
  • Method and apparatus for wiring integrated circuits with multiple power buses based on performance
    Patent number: 6311310
    Abstract: A method and structure for designing a circuit, including identifying paths in the circuit not satisfying a preselected performance criteria, wherein identified paths are initially designed to be coupled to a first power supply, and redesigning the circuit such that the identified paths are coupled to a second power supply having a higher voltage than the first power supply. The higher voltage increases performance of the identified paths such that the identified paths satisfy the performance criteria.
    Type: Grant
    Filed: April 8, 1999
    Date of Patent: October 30, 2001
    Assignee: International Business Machines Corporation
    Inventors: Kerry Bernstein, John Joseph Ellis-Monaghan, Norman Jay Rohrer
  • Fluorine barrier layer between conductor and insulator for degradation prevention
    Patent number: 6214730
    Abstract: Method of improving the resistance of a metal against degradation from exposure to fluorine released from a fluorine-containing material by forming a fluorine-barrier layer between the insulator material and the metal. The invention is especially useful in improving corrosion and poisoning resistance of metallurgy, such as aluminum metallurgy, in semiconductor structures. The invention also covers integrated circuit structures made by this method.
    Type: Grant
    Filed: February 25, 1999
    Date of Patent: April 10, 2001
    Assignee: International Business Machines Corporation
    Inventors: Edward C. Cooney, III, Hyun K. Lee, Thomas L. McDevitt, Anthony K. Stamper