Abstract: In a preferred embodiment, a system includes a host, an image data source, and a graphics controller. The image data source provides a frame corresponding to a particular image size. The graphics controller is receives the frame. Preferably, the graphics controller is remote from the image data source and the host, and includes a fitting module for calculating a scale factor based on the image size, and a scaling unit for scaling the image according to the scale factor. In another preferred embodiment, a system includes a display device of a particular resolution, a memory, and a graphics controller. The memory is for storing a frame corresponding to a particular image size. The graphics controller preferably includes: a fitting module for calculating a scale factor based on the image size and the display device resolution, and a scaling unit for scaling the image according to the scale factor. The graphics controller may be adapted for retrieving the display device resolution from the display device.

Abstract: A hybrid navigation satellite receiver and mobile telephone uses only two crystal oscillators. One that operates a master clock around 27-MHz and that consumes milliwatts of power. The other oscillator consumes only microwatts of power and operates continuously on battery power at about 32-KHz. Only the second, low frequency oscillator is kept running during power “off”. On power “restart”, a real-time-clock counter is consulted to cause an estimate of the GPS system time to be regenerated and supplied to the GPS-DSP to quicken its initialization. The master clock is GPS-calibrated, and the accurate clock is used to drive NCO's for the mobile telephone part and host CPU.

Abstract: A fixed-size codeword table is generated for decompressing GIF encoded data. The fixed-size codeword table is defined to store a codeword string and a codeword length for each of a number of codewords. The codeword string is defined by a codeword previously represented in the codeword table and a character. The codeword length represents a total number of characters in the codeword string. A current codeword in the GIF encoded data is translated according to the codeword table to generate a series of characters represented by the current codeword. The generated series of characters is stored in a computer memory space.

Abstract: A system for configuring a chip to perform certain operations is provided. The system includes a CPU. The CPU is in communication with a graphics controller. The graphics controller includes a non-volatile memory for storing a look up table (LUT). The graphics controller further includes a register port. The CPU provides a LUT value to the register port. Look up circuitry, which is in communication with the LUT register port, receives the LUT value from the register port and the LUT circuitry retrieves a corresponding LUT sequence from the LUT. The LUT sequence represents an operation to be performed by the LUT circuitry. The system is further provided with a register block, which can be programmed with values based on the operation to be performed.

Abstract: Advertising information input control module of a POS system receives advertising information, and a billing amount calculating module calculates a billing amount based on advertising information received by input control module. A payment confirming module confirms payment of the billing amount calculated by the billing amount calculating module, and an advertising information storing control module stores the advertising information in a storing device. A check-out information input control module receives input of customer check-out information, and an advertising information retrieving module retrieves the advertising information stored in the storing device. A printing data generating module synthesizes or combines check-out information with the advertising information so as to generate printing data, which is output at a printing device, and printed as a receipt with an ad.

Abstract: The invention is directed to a method and apparatus for storing image data received in a block-interleaved format using an MCU buffer. A first minimum coded unit of the image data is stored in a first memory. The image data in the first minimum coded unit is grouped into pixels. The grouped image data is stored in a second memory as a second minimum coded unit of the image data. Preferably, the image data is converted from a first color format to a second color format. Further, the image is preferably dimensionally transformed.

Abstract: The invention is directed, in preferred embodiments, to method and apparatus for storing overlay pixels of a scaled overlay image over background pixels of a background image. The overlay and background pixels being defined by at least a luminance component and a color component. A preferred method comprises: (a) defining a first luminance value corresponding to a transparent overlay pixel; (b) defining a second luminance value corresponding to an opaque overlay pixel; and (c) where, for any first overlay pixels for which luminance components differ from the first and second luminance values, storing the luminance components so as to over-write the luminance components of the corresponding background pixels, and discarding the associated color components so as to leave remaining the color components of the corresponding background pixels. Preferably, the overlay and background pixels are defined in a sampling format providing for color information to be shared between at least two pixels.

Abstract: A navigation satellite receiver accepts satellite-position table messages comprising truncated GPS ephemeris parameters. In particular, at least one of the two harmonic corrections to inclination angle, Cic and Cis, are not communicated and not used in the solution of navigation receiver position. In a first method embodiment of the present invention, both the two harmonic corrections to inclination angle, Cic and Cis, are omitted from the computation. In a second method embodiment of the present invention, only one of the two harmonic corrections to inclination angle, Cic and Cis, are omitted from the computation, depending on Min(Cis sin(2?k), Cis cos(2?k)).

Abstract: A hardware implemented method for incorporating a border region within an image region is provided. In this method, a portion of the border region is stored in memory. Thereafter, a determination is made as to a relative position of a pixel within the image region. An image pixel or each pixel of the portion of the border region is then fetched from the memory dependent upon the relative position of the pixel. An apparatus and display controller for incorporating a border region within an image region are also described.

Abstract: A method and circuit for excluding regions from an exposure calculation is described. The method includes obtaining pre-image data representing an image of a scene and dividing the image into a plurality of regions. Regions that contain a predetermined number of bright pixels are identified, bright pixels being pixels that are brighter than a threshold level of brightness. Each region that has at least the predetermined number of bright pixels from the exposure calculation are excluded.

Abstract: Provided is a method and apparatus for dynamic cross fading. Specifically, an embedded system can display an image produced from a blend of other images. Initially, a first image and a second image are stored in a buffer in a display controller. Then, the display controller extracts pixels from corresponding locations in the first image and the second image. The pixels are combined with weights associated with each image to perform the cross fade calculation. Consequently, the result from the cross fade calculation is transmitted to a display unit connected to the display controller for viewing. The result can also be fetched during a refresh of a panel in the display unit. In either case, the result is transmitted to a display pipe during dynamic cross fading. Thus, any images stored in the buffer remain unchanged.

Abstract: The invention is directed to a method and apparatus for transforming the dimensions of an image represented by block-interleaved data. The method comprises: (a) storing a first minimum coded unit of the image data in a first memory; (b) dimensionally transforming the first minimum coded unit; and (c) storing a second minimum coded unit of the image data in the first memory. Steps (b) and (c) are performed after step (a). In addition, step (b) is performed before: starting to store any third minimum coded unit in the memory after step (c). The apparatus comprises a first memory, a storing circuit, a dimensional transforming circuit, and a timing control circuit. Preferably, the first memory is sized for storing no more than two minimum coded units.

Abstract: A system and method for effectively storing compressed information in an electronic device includes a memory device coupled to the electronic device for storing the compressed information. A compression module sequentially performs a forward write procedure to store first components of the compressed information. The forward write procedure begins at a top location of the memory device. The compression module concurrently performs a reverse write procedure to store second components and third components of the compressed information sequentially in an interlaced configuration. The reverse write procedure begins at a bottom location of the memory device.

Abstract: A system and method for supporting variable-width memory accesses includes storage registers configured to store transfer data. The storage registers have a pre-determined storage register width. A host interface moves the transfer data to and from the storage registers. The host interface has a data transfer width that is greater than the storage register width. A memory access module analyzes a mode flag that is incorporated into a transfer address. The memory access module performs the memory access operation in a full mode if the mode flag is set to a full access state. Conversely, the memory access module performs the memory access operation in a partial access mode if the mode flag is set to a partial access state. In the partial transfer mode, the transfer data has a data width that is equal to the storage register width. The memory storage module is able to directly access a single one of the storage registers.

Abstract: A digital imaging device is operated to capture a first image in a digital format. At least two non-contiguous portions of the first image are rendered in a display of the digital imaging device. The at least two non-contiguous portions of the first image are used to align a live version of a second image in the display, wherein the second image is an extension of the first image. The second image is captured in a digital format. A corner matching algorithm is applied to determine an offset of the second image with respect to the first image, wherein the offset is required to achieve a substantially accurate alignment of the first and second images. Application of the corner matching algorithm is limited to an overlap region intervening between the at least two non-contiguous portions of the first image.

Abstract: A preferred embodiment is directed to an image processing device for receiving pixel data provided to the device as follows: it is grouped into frames, each pixel datum has an associated value, and first, second, and third pixel data correspond respectively to first, second, and third frames. The image processing device is adapted for processing the pixel data, and has a low-power motion monitoring mode and a capture mode. Further, the pixel data is preferably provided by a data source external to the device. The image processing device preferably includes a control unit for: (a) receiving the pixel data; (b) summing the values of the first pixel data to produce a first total value for the first frame; (c) summing the values of the second pixel data to produce a second total value for the second frame, and (d) causing the image processing device to process the third pixel data only if the difference between the first and second total values exceeds a threshold.

Abstract: A method and apparatus for adaptively adjusting the bandwidth of a data transmission channel having multiple buffered paths. Each output path includes a buffer for holding respective portions of the data. A value representative of at least the number of buffers that are nearly empty of data as compared to a predetermined threshold is determined, and the transmission rate of the input path is adjusted according to the value. Preferably, the buffers are display pipes provided in a graphics controller IC for interfacing between one or more hosts and a graphics display device.

Abstract: In a method, a plurality of scale factors and a plurality of sets of pixel replication sequences are provided. A scale factor, a pixel replication sequence, a first pixel of an original image, and a scale offset parameter are selected. The selected first pixel is mapped into a first pixel location in an enlarged image. The selected scale factor and scale offset are added, producing a first sum. The first sum is compared to a maximum sum. If the first sum is less than the maximum sum, the selected first pixel is also mapped into a second pixel location. Otherwise, a second pixel is selected from the original image and mapped into the second pixel location.

Abstract: A display controller is provided. The display controller is configured to provide an indirect addressing mode to access a memory location within the display controller. The display controller includes a first pin configured to enable access to one of a register of the display controller or a memory region of the display controller based upon a logical level of a first signal received by the first pin. A second pin is included. The second pin is configured to define the access to the register or the memory region as one of address information or data based upon a logical level of a second signal received by the second pin. The display controller includes an extra pin mode module configured to enable the first signal to select the data to access memory without accessing a register block. A device and methods for implementing an indirect addressing mode is also provided.

Abstract: Signal management control units 471-47n of respective scan drivers LSI in an LCD module are cascade-connected and each have the same construction. A detected signal of the signal management control unit 47J is a data signal latch clock LP applied to a terminal CKB1. A detected signal of the signal management control unit 472 is a frame start signal SP applied to a terminal CKB2. A detected signal of the signal management control unit 47n is an AC-transforming clock FR applied to a terminal CKBn. The signal management control unit 471 includes a signal stop detection circuit 48 serving as a signal detection means for detecting a stop of the detected signal delay circuit 49 processing circuit 51 consisting of a signal delay circuit 49 and a logic circuit 50. When stopping oscillations of, e.g., the frame start signal SP, outputs T1-Tn of the circuit 51 change to an L level. Hence, a display-off signal DF of the LCD module assumes the L level. A liquid crystal panel is forcibly set in a display-off mode.