Abstract: A method and system provide for real-time compensation of an imaging system for variations in illumination intensity. An illumination system provides reflected illumination, and a charge coupled device system directly detects the reflected illumination from the illumination system. The CCD system then converts the reflected illumination into illumination data and a host processor converts the illumination data into adjusted control data and final image data. The adjusted control data is based on an illumination profile and a reference illumination intensity. The reference illumination intensity is measured before each document with a compensation reference, and is compared to the illumination profile to adjust control parameters in a real-time mode. Directly measuring the illumination intensity with the CCD system allows for a reduction in parts, manufacturing steps, and errors.

Abstract: An N-way set associative data cache system comprises a cache controller adapted to receive a request for data and instructions. The cache controller includes a cache buffer register for storing the requests for a line of information in the form of a page tag address and line address. The line address is stored in the buffer register as a pointer into a directory associated with each of the N-ways for determining where the line being accessed resides. If the page tag address matches one of the page entry addresses in one of the directories, there is a hit, but if not, the line of data must be fetched by a cache fill request. The line of data is retrieved from an L2 cache or main memory and written into the line of one of the ways at the line address being accessed. A novel LRU ordering tree or look-up table is provided for determining concurrently the one line in the number of N-lines in the cache to be replaced with the new line of data in the event of a miss.

Abstract: A method is provided to establish affinity for each pair of processors with a specific processor bus which eliminates the need for cross-bus operations in cache invalidation operations. Each pair of processors in the network is exercised for elapsed time of cache update cycle completion. Those pairs having the minimal execution times are then selected for utilization of applications to be executed.

Abstract: A method is disclosed for use in a multi-processor computer system having a multiplicity of peripherals coupled thereto. The disclosed method assigns interrupt vectors from the multiplicity of peripherals, and includes the steps of determining if an interrupt resource from a given peripheral has already been assigned, and if not; assigning an affinity and vector to this interrupt resource. Moreover, a determination is made if the affinity and vector assigned in the previous step are within the operational characteristics of the multi-processor computer system.

Abstract: An improved administration system for use in managing and reporting skill assessment data entered by users of a skill assessment tool is disclosed. The skill assessment tool of the preferred embodiment may include a large skill set of possibly-unrelated skills. A large, diverse use population may employ the skill assessment tool to enter data rating a user's proficiency at performing ones of the skills in the skill set. The resulting skill assessment data may therefore be both extensive and diverse. The administration system allows the skill assessment data to be reported using any selectable subset of the users or any selectable subset of the skills supported by the skill assessment tool.

Abstract: A system for providing, via a network, emulation of a console of a first computer system on a second, remotely located computer system on the network comprises an adapter card installed in the first computer system and a client program executing on the remotely located computer system. The adapter card comprises a local bus that interfaces to an input/output bus of the first computer system when the adapter card is connected to the first computer system, a graphics controller coupled to the local bus that interacts with the first computer system to generate a representation of a console screen of the first computer system, a network interface controller coupled to the local bus that provides a connection to the network, and a processor coupled to the local bus that determines changes in the representation of the console screen of the first computer system and that transmits information about the changes to the remotely located computer system via the network interface controller.

Abstract: Method and apparatus for warning the user of potential limitations of a database request or the results provided thereby and for warning the user of potential limitations of a database request and the results provided thereby. Preferably, the identified limitations are provided in a number of caveats. The caveats may warn the user that a survey request and/or survey result may be improper, invalid or otherwise deficient in some way. This may prevent the user from basing important business decisions on misrepresentative database results.

Abstract: A method and apparatus for using prior results when processing successive database requests. This is accomplished by storing selected results during the processing of selected user requests. When a subsequent user request is processed, the system determines if appropriate prior results have already been generated and stored by a previous user request. If so, the prior results are used in the processing of the subsequent user request. Because the prior results are not regenerated, the processing time for the subsequent user request may be reduced accordingly.

Abstract: An apparatus for and method of improving the efficiency of a level two cache memory. In response to a level one cache miss, a request is made to the level two cache. A signal sent with the request identifies when the requester does not anticipate a near term subsequent use for the requested data element. If a level two cache hit occurs, the requested data element is marked as least recently used in response to the signal. If a level two cache miss occurs, a request is made to level three storage. When the level three storage request is honored, the requested data element is immediately flushed from the level two cache memory in response to the signal.

Abstract: A method and apparatus for locking a database table having a plurality of partitions. In various embodiments, lock status codes are maintained for both a database table and for the partitions of the database table. The partition locks do not need to be updated when a lock is granted for the database table since a separate table lock status code is maintained. The separate table lock status code improves database application performance and simplifies programming of explicit lock operations.

Abstract: A specialized computer program is utilized to operate apparatus for testing internal components of an integrated circuit package. A Peltier-junction module is controlled so as to ramp-up and ramp-down the temperature of an integrated circuit package while reading out and plotting the power-bus-ground resistance of the package during the up-ramp and down-ramp cycles. The computer screen then indicates a characteristic graph for a properly working package and erratic graph for a package having a short circuit or open circuit components.

Abstract: A system and method for managing a cluster of servers each of which operate on a first and second operating system, while enabling a single instance use of a single-licensed second operating system whose utilization is transferred to a second server when a first server has failed.

Abstract: A method and apparatus for operating a data processing system. The data processing system hosts an operating system which is coupled to a management interface processor. The management interface processor is further coupled to a network along with a plurality of workstations. One or more logical console objects are instantiated on the management interface processor. Respectively associated with and coupled to the one or more logical console objects are one or more instances of a system operations program. The instances of the system operations programs provide a user-interface for console level operations of the data processing system. The instances of the system operations program can be rehosted amongst the workstations, thereby aiding in workload balancing and resiliency.

Abstract: The disclosed compressor utilizes a plurality of prefix tables corresponding to respective prefix codes. A string is stored by storing the code associated with the string in a prefix table corresponding to the code of the string prefix at a prefix table location corresponding to the extension character of the string. The input data character stream is searched by comparing the input stream to the stored strings to determine the longest match therewith. The code associated with the longest match is outputted so as to provide the output stream of compressed codes. The stored strings are updated by inserting an extended string into the prefix tables, the extended string comprising the longest match extended by the next data character in the input stream following the longest match, the extended string being stored in the prefix table corresponding to the code of the longest match, a code being assigned to the extended string.

Abstract: An adapter program couples a legacy operating system to a driver program of an I/O channel which has an incompatible interface to a native operating system. The adapter program includes a translator which receives legacy control structures from the legacy operating system that represents a legacy I/O instruction. The adapter program also includes an interface to the driver program which simulates the native operating system interface. The adapter program further includes an emulator for performing the I/O instruction by interacting with the driver program thru the simulated native operating system interface.

Abstract: A generic server and gateway that run within a Distributed Component Object Model (DCOM) environment capable of receiving requests from one or more different types of DCOM clients for service by an On-Line Transaction Processing (OLTP) style application running on an enterprise server. The services on the OLTP system are designed to accomplish a specific task, for example, update a user's bank account balance following a debit or credit. In a preferred embodiment, the OLTP system is X/Open compliant. The DCOM Client can be any type of client, including a Visual Basic client, C++ client, or a Web Browser with Active Server Pages (ASP). The generic server and generic gateway are vendor supplied components which tend to insulate the client developer from the details of the communication protocol with the OLTP system.

Abstract: Methods for converting from a COM interface pointer to an underlying C++ object are described in various embodiments. In the various embodiments, classes are constructed in support of the underlying C++ object. The classes are used to enforce rules safely convert a COM interface pointer. One rule is that a COM interface to be converted cannot be marshaled. A second rule is that an object requesting the C++ object must have legal access to the COM interface (for example, the same execution unit). A third rule is that the object type of the COM interface must be in the inheritance hierarchy of the C++ object.

Abstract: An apparatus for and method of utilizing an internet terminal coupled to the world wide web to request calculations on an existing proprietary data base management system having a dialog-based request format. The user fills in and transmits an HTML form defining the requested calculation. A data wizard converts the requested calculation definition to a script which is executable by the data base management system. The desired calculations are made and the results are returned to the user as one or more HTML pages.

Abstract: A method and apparatus for substantially eliminating ripple and transient voltage using a current controlled voltage regulator. Current control (460) senses load current (iL) changes and produces control voltage (VCONTROL) in response to the load current changes. The control voltage increases the conductivity state of shunt transistor (470) such that any deficit of current caused by load changes at load (420) during a positive voltage transient is conducted through shunt transistor (470). The control voltage decreases the conductivity state of shunt transistor (470) such that any excessive current caused by load (420) during a negative voltage transient is balanced by the reduction of current in shunt transistor (470).